BELLING BL9110

BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
FEATURES
PCMCIA Cards and Wireless LAN
Electrical appliances such as cameras, VCRS
Up to 1A Output Current
70uA Operating Supply Current
Excellent Line Regulation: 0.05%/V
The BL9110 is a low-dropout regulator that operates
Low Dropout: [email protected](VOUT=3.3V)
the input voltage from 2.5V to 6V and delivers 1A
High Power Supply Rejection Ratio
load current. The BL9110 is available in two types,
Wide Operating Voltage Range: 2.5V to 6.0V
either fixed or adjustable output voltage. The output
1V to 5V Factory-Preset Output
voltage of the fixed types is preset at an internally
High Accuracy: ±1% or ±2%
trimmed voltage 1V, 1.2V, 1.3V, 1.5V, 1.8V, 2.5V,
Built-in Auto Discharge Function
2.7V, 2.8V, 2.85V, 3.0V, 3.2V, 3.3V, 5V or can be
500mA in-rush Current Limit
made with options of the output range from 1V to 5V
Fold-back Current Limit Protection
in 50mV increments. The output range of adjustable
Thermal Shutdown Protection
types is from 1V to 5V. The BL9110 consists of a
DFN-6,
SOT-89-5,
SOT-89-3,
DESCRIPTION
SOT-223-5,
voltage reference, an error amplifier, resistor net for
SOT-223-3, TO-263-3, TO-220-3, TO-252-3
setting output voltage, a current limit circuit for
and TO-252-5 Package
over-current and a thermal-shutdown circuit.
RoHS Compliant and 100% Lead (Pb)-Free
A standby mode with ultra low supply current can be
realized with the chip enable function. Since the
APPLICATIONS
packages for BL9110 are DFN-6, SOT-89-5,
Portable Communication Equipment
SOT-223-5,
Battery-Powered Equipment
SOT-89-3, TO-252-3, TO92-3 and TO-252-5 with
Laptop, Palmtops, Notebook Computers
high power dissipation, high density mounting of the
Hand-Held Instruments
IC on board is possible.
ORDERING INFORMATION
BL9110-VVV X X XX
Package:
AA: DFN-6
BA: SOT-89-5-A
CA: TO-252-5
DA: SOT-223-5
EA: TO-252-3-A
FA: SOT-223-3-A
FC: SOT-223-3-C
GA: TO-263-3-A
GC: TO-263-3-C
HA: TO-220-3
IA: SOT-89-3-A
IC: SOT-89-3-C
JA:TO92-3
SOT-223-3,
TO-263-3,
TO-220-3,
TYPICAL APPLICATION
BB: SOT-89-5-B
EB: TO-252-3-B
FB: SOT-223-3-B
FD: SOT-223-3-D
GB: TO-263-3-B
IB: SOT-89-3-B
Features:
P: Standard (default, lead free)
C: Customized
Output Voltage Accuracy
A: ±1%
B: ±2%
Output Voltage
100:1.0V 120:1.2V 130:1.3V 150:1.5V
180:1.8V 250:2.5V 270:2.7V 280:2.8V
285:2.85V 300:3.0V 320:3.2V 330:3.3V
500:5.0V
ADJ: adjustable
PPMIC BU
BL9110 Rev 1.2
07/2011
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1
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Absolute Maximum Rating
Input Supply Voltage (VDD)
CE Input Voltage
Output Voltage
Output Current
(Note 1)
-0.3V to +7V
-0.3V to +7V
-0.3V to VIN+0.3V
1.4A
Maximum Junction Temperature
125°C
(Note2)
Operating Temperature Range
-40°C to 85°C
Storage Temperature Range
-65°C to 125°C
Lead Temperature (Soldering, 10s)
300°C
Package Information
AA
BA
BB
CA
Part Number
BL9110-VVVXXAA
BL9110-VVVXXBA/B
BL9110-VVVXXCA
PPMIC BU
BL9110 Rev 1.2
07/2011
Top Mark
Temp Range
BL9110AA
VVVYWW
(Note3)
BL9110BA/B
-40°C to +85°C
-40°C to +85°C
VVVYWW
BL9110CA
-40°C to +85°C
VVVYWW
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2
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
DA
Part Number
Top Mark
BL9110DA
BL9110-VVVXXDA
VVVYWW
BL9110EA/B
BL9110-VVVXXEA/B
VVVYWW
BL9110FA/B/C/D
BL9110-VVVXXFA/B/C/D
VVVYWW
BL9110GA/B/C
BL9110-VVVXXGA/B/C
VVVYWW
Temp Range
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
HA
Part Number
BL9110-VVVXXHA
BL9110-VVVXXI/A/B/C
BL9110-VVVXXJA
PPMIC BU
BL9110 Rev 1.2
07/2011
Top Mark
Temp Range
BL9110HA
-40°C to +85°C
VVVYWW
BL9110IA/B/C
-40°C to +85°C
VVVYWW
BL9110JA
-40°C to +85°C
VVVYWW
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3
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Pin Descriptions
Symbol
Description
VOUT
Output Pin
GND
Ground Pin
CE
Chip Enable Pin (High active)
VDD
Input Pin
ADJ/NC
Adjustable/No Connection
VVV
100
120
130
…
285
…
495
500
ADJ
Voltage (V)
1.0
1.2
1.3
…
2.85
…
4.95
5.0
Adjustable
Y
9
A
B
C
D
Year
2009
2010
2011
2012
2013
WW
01
…
09
10
11
…
51
52
Week
1
…
9
10
11
…
51
52
Thermal Resistance (Note 4):
Package
ӨJA
ӨJC
DFN-6
95°C/W
10°C/W
SOT-89-5
160°C/W
45°C/W
TO-252-5
90°C/W
10°C/W
SOT-223-5
160°C/W
20°C/W
TO-252-3
90°C/W
10°C/W
SOT-223-3
160°C/W
20°C/W
TO-263-3
65°C/W
7°C/W
TO-220-3
50°C/W
7°C/W
SOT89-3
180°C/W
50°C/W
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: The BL9110 is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to
85°C operating temperature range are assured by design, characterization and correlation with statistical
process controls.
Note 3: VVV: Voltage code (for example 100 stands for 1.0V) Y: Year of wafer manufacturing WW: Week of wafer
manufacturing
Note 4: Thermal Resistance is specified with approximately 1 square of 1 oz copper.
PPMIC BU
BL9110 Rev 1.2
07/2011
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4
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Block Diagram
VDD
Voltage
Reference
--
Voltage
Buffer
EA
ADJ
++
Loop
Compensation
Fold-back
Current Limit
Over
Temperature
Protection
CE
Logic
Control
Power Good
Detector
VOUT
Soft-start
GND
PPMIC BU
BL9110 Rev 1.2
07/2011
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5
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Electrical Characteristics (Note 5)
BL9110-1.2V Electrical Characteristics
(VDD=2.5V, VOUT=1.2V, CE=VDD, CIN=2.2µF, COUT=2.2µF, TA=25°C, unless otherwise noted.)
Parameter
Symbol
Conditions
MIN
TYP MAX
Input Voltage
VDD
2.5
6
-1
+1
(Note 6)
IOUT=1mA
∆VOUT
Output Voltage Accuracy
-2
+2
Current Limit
ILIM
1.0
1.3
Short Circuit Current
ISCC
VOUT=0
250
Quiescent Current
IQ
IOUT=0mA
70
120
Standby Current
ISTBY
VCE=GND, Shutdown
0.01
1
IOUT=300mA
420
(note 7)
VDROP
Dropout Voltage
IOUT=1A
870
(Note 8)
∆VLINE
2.5V≤VDD≤ 6V, IOUT=100mA
0.05
0.5
Line Regulation
(Note 9)
∆V
1mA≤I
≤1A
20
Load Regulation
LOAD
OUT
(Note 10)
IOUT=100mA
Output Voltage
TCVOUT
±100
-40°C≤T≤85°C
Temperature Coefficient
CE
Logic Low
VIL
Shutdown
0.4
Input Threshold
Start up
1.0
Logic High
VIH
CE Pull-down Resistance
RCE
5
Output Noise Voltage
eNO
10Hz to100KHz, IOUT=1mA
45
f=1kHz
70
(VOUT≤3.3V)
Power Supply
0.2VP-P Ripple
PSRR
Rejection Ratio
IOUT=100mA
f=1kHz
60
(VOUT>3.3V)
Thermal Shutdown Temperature
TSD
Shutdown, Temp increasing
165
Thermal Shutdown Hysteresis
TSDHY
30
Output Discharge Resistance
RDSC
50
unit
V
%
A
mA
uA
uA
mV
%/V
mV
ppm/°C
V
V
MΩ
VRMS
dB
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
 VOUT 1 − VOUT 2 
Note 8: Line regulation is calculated by ∆V
 ×100
LINE = 
 ∆VDD × VOUT 
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
VDD=VDD1-VDD2.
△
Note 9: Load regulation is calculated by ∆VLOAD = VOUT 1 − VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1A.
Note 10: The temperature coefficient is calculated by TC
VOUT =
PPMIC BU
BL9110 Rev 1.2
07/2011
∆ VOUT
∆ T × VOUT
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©2011 Belling All Rights Reserved
6
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-1.5V Electrical Characteristics
(VDD=2.5V, VOUT=1.5V, CE=VDD, CIN=2.2µF, COUT=2.2µF, TA=25°C, unless otherwise noted.)
Parameter
Symbol
Conditions
MIN
TYP MAX
Input Voltage
VDD
2.5
6
-1
+1
(Note 6)
IOUT=1mA
∆VOUT
Output Voltage Accuracy
-2
+2
Current Limit
ILIM
1.0
1.3
Short Circuit Current
ISCC
VOUT=0
250
Quiescent Current
IQ
IOUT=0mA
70
120
Standby Current
ISTBY
VCE=GND, Shutdown
0.01
1
I
=300mA
260
OUT
(note 7)
VDROP
Dropout Voltage
700
IOUT=1A
(Note 8)
∆VLINE
2.5V≤VDD≤ 6V, IOUT=100mA
0.05
0.5
Line Regulation
(Note 9)
∆VLOAD
1mA≤IOUT≤1A
20
Load Regulation
(Note 10)
I
=100mA
Output Voltage
OUT
TCVOUT
±100
-40°C≤T≤85°C
Temperature Coefficient
CE
Logic Low
VIL
Shutdown
0.4
Input Threshold
Logic High
VIH
Start up
1.0
CE Pull-down Resistance
RCE
5
Output Noise Voltage
eNO
10Hz to100KHz, IOUT=1mA
45
f=1kHz
70
(VOUT≤3.3V)
Power Supply
0.2VP-P Ripple
PSRR
Rejection Ratio
IOUT=100mA
f=1kHz
60
(VOUT>3.3V)
Thermal Shutdown Temperature
TSD
Shutdown, Temp increasing
165
Thermal Shutdown Hysteresis
TSDHY
30
Output Discharge Resistance
RDSC
50
unit
V
%
A
mA
uA
uA
mV
%/V
mV
ppm/°C
V
V
MΩ
VRMS
dB
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
 VOUT 1 − VOUT 2 
Note 8: Line regulation is calculated by ∆V
 ×100
LINE = 
 ∆VDD × VOUT 
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
VDD=VDD1-VDD2.
△
Note 9: Load regulation is calculated by ∆VLOAD = VOUT 1 − VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
Note 10: The temperature coefficient is calculated by TC
VOUT =
PPMIC BU
BL9110 Rev 1.2
07/2011
∆ VOUT
∆ T × VOUT
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7
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-1.8V Electrical Characteristics
(VDD=2.8V, VOUT=1.8V, CE=VDD, CIN=2.2µF, COUT=2.2µF, TA=25°C, unless otherwise noted.)
Parameter
Symbol
Conditions
MIN
TYP MAX
Input Voltage
VDD
2.5
6
-1
+1
(Note 6)
IOUT=1mA
∆VOUT
Output Voltage Accuracy
-2
+2
Current Limit
ILIM
1.0
1.3
Short Circuit Current
ISCC
VOUT=0
250
Quiescent Current
IQ
IOUT=0mA
70
120
Standby Current
ISTBY
VCE=GND, Shutdown
0.01
1
I
=300mA
180
OUT
(note 7)
VDROP
Dropout Voltage
570
IOUT=1A
(Note 8)
∆VLINE
2.5V≤VDD≤ 6V, IOUT=100mA
0.05
0.5
Line Regulation
(Note 9)
∆VLOAD
1mA≤IOUT≤1A
20
Load Regulation
(Note 10)
I
=100mA
Output Voltage
OUT
TCVOUT
±100
-40°C≤T≤85°C
Temperature Coefficient
CE
Logic Low
VIL
Shutdown
0.4
Input Threshold
Logic High
VIH
Start up
1.0
CE Pull-down Resistance
RCE
5
Output Noise Voltage
eNO
10Hz to100KHz, IOUT=1mA
45
f=1kHz
70
(VOUT≤3.3V)
Power Supply
0.2VP-P Ripple
PSRR
Rejection Ratio
IOUT=100mA
f=1kHz
60
(VOUT>3.3V)
Thermal Shutdown Temperature
TSD
Shutdown, Temp increasing
165
Thermal Shutdown Hysteresis
TSDHY
30
Output Discharge Resistance
RDSC
50
unit
V
%
A
mA
uA
uA
mV
%/V
mV
ppm/°C
V
V
MΩ
VRMS
dB
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
 VOUT 1 − VOUT 2 
Note 8: Line regulation is calculated by ∆V
 ×100
LINE = 
 ∆VDD × VOUT 
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
VDD=VDD1-VDD2.
△
Note 9: Load regulation is calculated by ∆VLOAD = VOUT 1 − VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
Note 10: The temperature coefficient is calculated by TC
VOUT =
PPMIC BU
BL9110 Rev 1.2
07/2011
∆ VOUT
∆ T × VOUT
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8
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-2.5V Electrical Characteristics
(VDD=3.5V, VOUT=2.5V, CE=VDD, CIN=2.2µF, COUT=2.2µF, TA=25°C, unless otherwise noted.)
Parameter
Symbol
Conditions
MIN
TYP MAX
Input Voltage
VDD
2.5
6
-1
+1
(Note 6)
IOUT=1mA
∆VOUT
Output Voltage Accuracy
-2
+2
Current Limit
ILIM
1.0
1.3
Short Circuit Current
ISCC
VOUT=0
250
Quiescent Current
IQ
IOUT=0mA
70
120
Standby Current
ISTBY
VCE=GND, Shutdown
0.01
1
I
=300mA
140
OUT
(note 7)
VDROP
Dropout Voltage
440
IOUT=1A
(Note 8)
∆VLINE
3.0V≤VDD≤ 6V, IOUT=100mA
0.05
0.5
Line Regulation
(Note 9)
∆VLOAD
1mA≤IOUT≤1A
20
Load Regulation
(Note 10)
I
=100mA
Output Voltage
OUT
TCVOUT
±100
-40°C≤T≤85°C
Temperature Coefficient
CE
Logic Low
VIL
Shutdown
0.4
Input Threshold
Logic High
VIH
Start up
1.0
CE Pull-down Resistance
RCE
5
Output Noise Voltage
eNO
10Hz to100KHz, IOUT=1mA
45
f=1kHz
70
(VOUT≤3.3V)
Power Supply
0.2VP-P Ripple
PSRR
Rejection Ratio
IOUT=100mA
f=1kHz
60
(VOUT>3.3V)
Thermal Shutdown Temperature
TSD
Shutdown, Temp increasing
165
Thermal Shutdown Hysteresis
TSDHY
30
Output Discharge Resistance
RDSC
50
unit
V
%
A
mA
uA
uA
mV
%/V
mV
ppm/°C
V
V
MΩ
VRMS
dB
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
 VOUT 1 − VOUT 2 
Note 8: Line regulation is calculated by ∆V
 ×100
LINE = 
 ∆VDD × VOUT 
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
VDD=VDD1-VDD2.
△
Note 9: Load regulation is calculated by ∆VLOAD = VOUT 1 − VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
Note 10: The temperature coefficient is calculated by TC
VOUT =
PPMIC BU
BL9110 Rev 1.2
07/2011
∆ VOUT
∆ T × VOUT
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Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited
©2011 Belling All Rights Reserved
9
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-3.3V Electrical Characteristics
(VDD=4.3V, VOUT=3.3V, CE=VDD, CIN=2.2µF, COUT=2.2µF, TA=25°C, unless otherwise noted.)
Parameter
Symbol
Conditions
MIN
TYP MAX
Input Voltage
VDD
2.5
6
-1
+1
(Note 6)
IOUT=1mA
∆VOUT
Output Voltage Accuracy
-2
+2
Current Limit
ILIM
1.0
1.3
Short Circuit Current
ISCC
VOUT=0
250
Quiescent Current
IQ
IOUT=0mA
70
120
Standby Current
ISTBY
VCE=GND, Shutdown
0.01
1
I
=300mA
110
OUT
(note 7)
VDROP
Dropout Voltage
350
IOUT=1A
(Note 8)
∆VLINE
3.8V≤VDD≤ 6V, IOUT=100mA
0.05
0.5
Line Regulation
(Note 9)
∆VLOAD
1mA≤IOUT≤1A
20
Load Regulation
(Note 10)
I
=100mA
Output Voltage
OUT
TCVOUT
±100
-40°C≤T≤85°C
Temperature Coefficient
CE
Logic Low
VIL
Shutdown
0.4
Input Threshold
Logic High
VIH
Start up
1.0
CE Pull-down Resistance
RCE
5
Output Noise Voltage
eNO
10Hz to100KHz, IOUT=1mA
45
f=1kHz
70
(VOUT≤3.3V)
Power Supply
0.2VP-P Ripple
PSRR
Rejection Ratio
IOUT=100mA
f=1kHz
60
(VOUT>3.3V)
Thermal Shutdown Temperature
TSD
Shutdown, Temp increasing
165
Thermal Shutdown Hysteresis
TSDHY
30
Output Discharge Resistance
RDSC
50
unit
V
%
A
mA
uA
uA
mV
%/V
mV
ppm/°C
V
V
MΩ
VRMS
dB
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
 VOUT 1 − VOUT 2 
Note 8: Line regulation is calculated by ∆V
 ×100
LINE = 
 ∆VDD × VOUT 
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
VDD=VDD1-VDD2.
△
Note 9: Load regulation is calculated by ∆VLOAD = VOUT 1 − VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
Note 10: The temperature coefficient is calculated by TC
VOUT =
PPMIC BU
BL9110 Rev 1.2
07/2011
∆ VOUT .
∆ T × VOUT
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10
BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-5.0V Electrical Characteristics
(VDD=6.0V, VOUT=5.0V, CE=VDD, CIN=2.2µF, COUT=2.2µF, TA=25°C, unless otherwise noted.)
Parameter
Symbol
Conditions
MIN
TYP MAX
Input Voltage
VDD
2.5
6
-1
+1
(Note 6)
IOUT=1mA
∆VOUT
Output Voltage Accuracy
-2
+2
Current Limit
ILIM
1.0
1.3
Short Circuit Current
ISCC
VOUT=0
250
Quiescent Current
IQ
IOUT=0mA
70
120
Standby Current
ISTBY
VCE=GND, Shutdown
0.01
1
I
=300mA
100
OUT
(note 7)
VDROP
Dropout Voltage
340
IOUT=1A
(Note 8)
∆VLINE
5.5V≤VDD≤ 6V, IOUT=100mA
0.05
0.5
Line Regulation
(Note 9)
∆VLOAD
1mA≤IOUT≤1A
20
Load Regulation
(Note 10)
I
=100mA
Output Voltage
OUT
TCVOUT
±100
-40°C≤T≤85°C
Temperature Coefficient
CE
Logic Low
VIL
Shutdown
0.4
Input Threshold
Logic High
VIH
Start up
1.0
CE Pull-down Resistance
RCE
5
Output Noise Voltage
eNO
10Hz to100KHz, IOUT=1mA
45
f=1kHz
70
(VOUT≤3.3V)
Power Supply
0.2VP-P Ripple
PSRR
Rejection Ratio
IOUT=100mA
f=1kHz
60
(VOUT>3.3V)
Thermal Shutdown Temperature
TSD
Shutdown, Temp increasing
165
Thermal Shutdown Hysteresis
TSDHY
30
Output Discharge Resistance
RDSC
50
unit
V
%
A
mA
uA
uA
mV
%/V
mV
ppm/°C
V
V
MΩ
VRMS
dB
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
 VOUT 1 − VOUT 2 
Note 8: Line regulation is calculated by ∆V
 ×100
LINE = 
 ∆VDD × VOUT 
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
VDD=VDD1-VDD2.
△
Note 9: Load regulation is calculated by ∆VLOAD = VOUT 1 − VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
Note 10: The temperature coefficient is calculated by TC
VOUT =
PPMIC BU
BL9110 Rev 1.2
07/2011
∆ VOUT .
∆ T × VOUT
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Typical Performance Characteristic
(VDD=VOUT+1V, and if VOUT<1.5V, VDD=2.5V CE=VDD, CIN=2.2µF, COUT=2.2µF, TA=25°C, unless
otherwise noted.)
Output Voltage VS. Input Voltage
Dropout Voltage VS. Output Current
BL9110-1.0V
1.2
1.2
1.0
1.0
0.8
0.8
BL9110-3.3V
550
-40oC
25oC
85oC
IOUT=1mA
0.6
0.6
IOUT=99mA
IOUT=300mA
0.4
0.4
IOUT=1A
0.2
0.2
Dropout Voltage (mV)
Output Voltage (V)
500
450
400
350
300
250
200
150
100
0.0
50
0.0
0
1
2
3
4
5
6
0
0.0
Input Voltage (V)
0.2
0.4
0.6
0.8
1.0
Output Current (A)
Output Voltage VS. Input Voltage
Output Voltage VS. Temperature
BL9110-3.3V
3.5
BL9110-3.3V
3.40
IOUT=1mA
Output Voltage (V)
2.5
2.0
IOUT=1mA
1.5
IOUT=99mA
IOUT=300mA
1.0
IOUT=100mA
3.35
3.30
3.25
0.5
0.0
0.0
3.20
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Input Voltage (V)
-40
-20
0
20
40
60
80
Temperature (oC)
Quiescent Current VS. Input Voltage
Quiescent Current VS. Temperature
BL9110-3.3V
BL9110-3.3V
100
80
95
Quiescent Current (uA)
Quiescent Current (uA)
Output Voltage (V)
3.0
60
40
20
90
85
80
75
70
65
0
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
60
3.5
4.0
Temperature (oC)
PPMIC BU
BL9110 Rev 1.2
07/2011
4.5
5.0
5.5
6.0
Input Voltage (V)
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Turn on Transient Response
Output Voltage VS. Output Current
BL9110-3.3V
BL9110-3.3V
3.5
CH1: EN Pin Voltage (V)
Output Voltage (V)
3.0
2.5
CH4: Output Voltage (V)
2.0
1.5
1.0
0.5
CH2: Input Inrush Current (mA)
0.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
Output Current (A)
Turn off Transient Response
Turn off Transient Response
BL9110-3.3V
BL9110-3.3V
100mA, resistive load
No load
CH1: EN Pin Voltage (V)
CH1: EN Pin Voltage (V)
CH4: Output Voltage (V)
CH4: Output Voltage (V)
Load Transient Response
Load Transient Response
BL9110-3.3V
BL9110-3.3V
500mA
CH2: Output Current (mA)
100mA
50mA
CH2: Output Current (mA)
100mA
CH4: Output Voltage (mV)
PPMIC BU
BL9110 Rev 1.2
07/2011
CH4: Output Voltage (mV)
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Line Transient Response
Line Transient Response
BL9110-3.3V
BL9110-3.3V
IOUT=1mA
PPMIC BU
BL9110 Rev 1.2
07/2011
IOUT=100mA
CH2: Input Voltage (V)
CH2: Input Voltage (V)
CH4: Output Voltage (mV)
CH4: Output Voltage (mV)
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Applications Information
The BL9110 is a low dropout CMOS-based
positive voltage regulator that operates the
input voltage from +2.5V to 6.0V. Output
voltages are optional ranging from 1.0V to
5.0V, and can supply current up to 1.0 A.
is to choose R2=20kΩ to set the divider
current at 50uA, and then calculate R1
using Equation as below:
Enable Function
A small compensation capacitor C3 placed
between VOUT and ADJ may improve the
stability of the adjustable. The suggested
value of this capacitor is about 10pF to
22pF.
The BL9110 is shutdown by pulling the CE
input low, and turn on by driving the input
high. If this feature is not be used, the CE
input should be floating or tied to VDD to
keep the regulator on at all times.
Programming the BL9110 Adjustable
LDO regulator
The BL9110 is available in two types, either
fixed or adjustable output voltage. The
output range of the adjustable types is from
1V to 5V. The output voltage of the BL9110
adjustable regulator is programmed using
an external resistor divider as show in
Figure as below. The output voltage is
calculated using equation as below:
 VOUT 
R1 = 
− 1 × R 2
 VREF 
OUTPUT VOLTAGE
PROGRAMMING GUIDE
OUTPUT
VOLTAGTE
R1
R2
1.8V
16 kΩ
20 kΩ
2.5V
30 kΩ
20 kΩ
3.3V
51 kΩ
22 kΩ
3.6V
62 kΩ
24 kΩ
BL9110 Adjustable LDO regulator
Programming
R1 

VOUT = VREF × 1 +

 R2 
Where VREF=1V is the internal reference
voltage.
Resistors R1 and R2 should be chosen for
approximately 50uA divider current. Lower
value resistors can be used for improved
noise performance, but the solution
consumes more power. Higher resistor
values should be avoided as leakage
current at ADJ increases the output voltage
error. The recommended design procedure
PPMIC BU
BL9110 Rev 1.2
07/2011
Thermal Protection
Thermal overload protection limits total
power dissipation in the BL9110. When the
junction temperature exceeds TJ=165°C,
the OTP circuit starts the thermal shutdown
function and turns the pass element off
allowing the IC to cool. The OTP circuit
turns on the pass element again after IC’s
junction temperature cool by 30°C, result in
a pulsed output during continuous thermal
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
overload conditions. Thermal-overloaded
protection is designed to protect the
BL9110 in the event of fault conditions. Do
not exceed the absolute maximum junction
temperature rating of TJ=125°C for
continuous
operation.
The
build-in
fold-back current limit protection circuit will
reduce current value as output voltage
drops. When output is shorted to ground,
current limit is reduced to 250mA, avoiding
damaging the device.
Operating Region and Power
Dissipation
The maximum power dissipation of BL9110
depends on the thermal resistance of the
case and circuit board, the temperature
difference between the die junction and
ambient air, and the rate of airflow. The
power dissipation across the device is
PD = (VDD−VOUT) ×IOUT + VDD×IQ
The maximum power dissipation is:
PD (MAX) = (TJ (MAX) − TA) /θJA
Where TJ (MAX) is the maximum operation
junction temperature 125°C, TA is the
ambient temperature and the θJA is the
junction to ambient thermal resistance. The
GND pin of the BL9110 performs the dual
function of providing an electrical
connection to ground and channeling heat
away. Connect the GND pin to ground
using a large pad or ground plane.
Capacitor Selection and Regulator
Stability
Like any low-dropout regulator, the external
PPMIC BU
BL9110 Rev 1.2
07/2011
capacitors used with the BL9110 must be
carefully selected for regulator stability and
performance. The BL9110 requires an
output capacitor between the VOUT and
GND pins for phase compensation. Using a
capacitor whose value is ≥1µF on the
BL9110 input and the amount of
capacitance can be increased without limit.
The input capacitor must be located a
distance of not more than 0.5 inch from the
input pin of the IC and returned to a clean
analog ground. Any good quality ceramic or
tantalum can be used for this capacitor.
The capacitor with larger value and lower
ESR
(equivalent
series
resistance)
provides better PSRR and line-transient
response. The output capacitor must meet
both requirements for minimum amount of
capacitance and ESR in all LDO
applications. The BL9110 is designed
specifically to work with low ESR ceramic
output capacitor in space-saving and
performance consideration. In the BL9110,
phase compensation is made with the
output capacitor for securing stable
operation even if the load current is varied.
For this purpose, use a 2.2uF capacitor
between VOUT pin and GND pin as close
as possible.
Load-Transient Considerations
The BL9110 load-transient response
graphs show two components of the output
response: a DC shift from the output
impedance due to the load current change,
and the transient response. The DC shift is
quite small due to the excellent load
regulation of the IC. Typical output voltage
transient spike for a step change in the load
current from 0mA to 50mA is tens of mV,
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
depending on the ESR of the output
capacitor. Increasing the output capacitor's
value and decreasing the ESR attenuates
the overshoot.
Input-Output (Dropout) Voltage
A regulator's minimum input-output voltage
differential (or dropout voltage) determines
the lowest usable supply voltage. In
battery-powered
systems,
this
will
determine the useful end-of-life battery
voltage. Because the BL9110 uses a
P-Channel MOSFET pass transistor, the
dropout voltage is a function of
drain-to-source on resistance [RDS(ON)]
multiplied by the load current.
Layout Considerations
To improve AC performance such as PSRR,
output noise, and transient response, it is
recommended that the PCB be designed
with separate ground planes for VDD and
VOUT, with each ground plane connected
only at the GND pin of the device. Make
VDD and GND lines sufficiently wide. If
their impedance is high, noise pickup or
unstable operation may result. Connect a
capacitor C1 between VDD and GND pin,
as close as possible to the pins. Set
external components, especially the output
capacitor C2, as close as possible to the IC,
and make wiring as short as possible.
BL9110 SOT89-5 PCB Layout for Reference
Top Layer
PPMIC BU
BL9110 Rev 1.2
07/2011
Bottom Layer
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Package Description
DFN-6
Dimensions In Millimeters
Symbol
A
A1
b
c
D
D2
e
Nd
E
E2
L
h
Min
NOM
Max
0.7
0.75
0.8
0.02
0.05
0.25
0.3
0.35
0.18
0.2
0.25
1.95
2
2.05
1
1.45
0.65BSC
1.30BSC
1.95
2
0.50
2.05
0.85
0.25
0.30
0.40
0.1
0.15
0.2
DFN-6 Surface Mount Package
PPMIC BU
BL9110 Rev 1.2
07/2011
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
SOT89-5
Symbol
A
b
b1
B
C
C1
D
D1
e
H
Dimensions In Millimeters
Dimensions In Inches
Min
Max
1.397
1.600
0.356
0.508
0.406
0.533
2.388
2.591
3.937
4.242
0.787
1.194
4.394
4.597
1.397
1.702
1.500 TYP.
0.356
0.432
Min
Max
0.055
0.063
0.014
0.020
0.016
0.021
0.094
0.102
0.155
0.167
0.031
0.047
0.173
0.181
0.055
0.067
0.060 TYP.
0.014
0.017
SOT89-5 Surface Mount Package
PPMIC BU
BL9110 Rev 1.2
07/2011
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
SOT-223-3
Package
PPMIC BU
BL9110 Rev 1.2
07/2011
SOT223-3
Devices per reel
2500
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
SOT-223-5
PPMIC BU
BL9110 Rev 1.2
07/2011
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
Package
PPMIC BU
BL9110 Rev 1.2
07/2011
TO252-3
TO-252-3
Devices per reel
2500
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
TO-252-5
Symbol
A1
A2
A3
b
b1
c
c1
D
D1
E1
e
L
L1
L2
Θ
PPMIC BU
BL9110 Rev 1.2
07/2011
Dimensions In Millimeters
MIN
0.05
2.1
0.5
0.46
0.45
0.49
0.48
6.3
5.30
1.40
3.0
NOM
0.15
2.3
0.6
MAX
0.25
2.5
0.7
0.6
0.5
0.55
0.5
6.5
5.30 REF
5.50
1.27BSC
1.50
3.1
1.40BSC
0
0.56
0.52
6.7
5.70
1.60
3.2
8°
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
TO-263-3
PPMIC BU
BL9110 Rev 1.2
07/2011
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
TO-220-3
PPMIC BU
BL9110 Rev 1.2
07/2011
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
SOT-89-3
PPMIC BU
BL9110 Rev 1.2
07/2011
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BL9110
1A Low Dropout, Low Quiescent
Quiescent Current
High PSRR CMOS Linear Regulator
TO92-3
PPMIC BU
BL9110 Rev 1.2
07/2011
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