CONEXANT CX20805

Audio
Audio/Voice DSP
CX20805
High-Performance Low-Power Digital Audio Signal Processor
The CX20805 is a 32-bit dual core Digital
Signal Processor (DSP), designed using
Conexant Audio Processing Engine
(CAPE) cores. The CX20805 audio
processor offers customers
programmability and flexibility in their
designs by providing a cost- effective
architecture which needs high
performance and low power. CX20805 is
the first high performance, low-power
audio DSP in the audio market that offers
over 800 MIPS(1) to support
computationally intensive audio
processing algorithms with large on-chip
memory 520KB SRAM/352KB ROM and
capable of supporting all major high
sampling rates through various audio
interfaces to external SoCs and Analog
Mixed Signal chipsets.
The device also has a Conexant Audio
Bus (CAB) interface which has been
specially developed to handle high data
rate transfer when interfacing with HD
Audioor external analog codecs. There
are two on-chip tri-color PWM LEDs and
a PIC controller which is retaskable to
support various communication protocols
over 24 programmable GPIOs.
The device features support for up to four
digital microphone inputs, support for dual
bi-directional I2S, PCM, S/PDIF transmit
and receive with independent sampling
rates, and a range of digital input/output
channel selections for flexible routing and
mixing. Different audio sampling rates
ranging from 8 kHz to 96 kHz are
generated directly from the master clock
without the need for external PLL. The
device can be controlled and configured
by both read and write capability through
I2C and Serial Peripheral Interface (SPI).
The USB interface supports both High
speed and Full speed, and is USB2.0
Audio Class compliant for both data and
control. An integrated on-chip 128-bit
AES decoding engine is present for
copyright protection and rendering fullrate, lossless Blu-ray media content.
There are six timers/counters on chip
which can be used for different
application based requirements.
CX20805 comes bundled with advanced
signal processing routines, free of
royalties, for customers interested in
developing their own proprietary
algorithms for different applications. This
package includes CAPE optimized
implementations of filter banks,
Equalizers, Sampling Rate Converter
(SRC), a small footprint Operating
System (etc.).
(1)
The device integrates advanced lowpower techniques, such as DC-DC
converters, Power Gating, Power
Retention, Low-Vdd Standby, Dynamic
Voltage Scaling (DVS) and Adaptive
Voltage Scaling (AVS), which employ
voltage control to manage power. In
addition, frequency scaling mechanisms
can also be used to reduce the power
consumption further.
The Configuration Toolbox allows for fast
configuration of the various signal
processing algorithms and performance
optimization. A complete evaluation kit
with reference board and all the
necessary technical documentation and
software is available. An efficient C
compiler is also available for customers
interested in programming the CAPE
Cores.
Applications
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Unified Communication Peripherals
Telepresence/Unified Communication
Device
All-in-One Speakers/Docking System
LCD Display/Sound Bar
Home Automation/Intercom
Wi-Fi® Phone/Smart Phone Docking
Systems
Mobile Internet Devices, Portable
Navigation Devices, Portable Media
Players
Multimedia IP phone
Embedded applications
Full-duplex Hands-free Telephony
A/V receivers, DVD
Receivers, Set-top Box
After-market Automotive Amplifiers
and Entertainment systems
Bundled DSP Algorithms
(Royalty Free)
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Fast Fourier Transforms (FFT)
Finite Impulse Response (FIR) filters
Infinite Impulse Response (IIR) filters
128 band Analysis and Synthesis
Filterbanks
Dual Knee Dynamic Range
Compression (DRC)
Automatic Gain Control (AGC)
Sampling Rate Converter (SRC &
ASRC)
Equalizer (EQ) with flexible number of
bands
Downmixer (Flexible number of
channels)
Amplifier and Mixer (Side Tone
Generation)
Signal generator
Cyclical Buffering Mechanisms
Samples are available in a small footprint
9x9, 116-pin Dual Row QFN packaging
along with Evaluation kits.
Conexant rates its DSPs based on the chips using standard voltage with 10 percent margin. DSP
cores are often rated at the typical conditions with overvoltage and no margin. Under these
conditions, CX20805 could easily exceed 1000 MIPS.
Part Number CX20805
Description High-Performance LowPower Digital Audio Signal Processor
Peripherals (continued)
CX20805 Features
DSP
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Dual core 32-bit DSP running at 200 MHz, which yields 800 MIPS
DSP has separate X and Y data and P code memory
Fixed point DSP, with floating point assist
Each core is dual MAC and dual memory access.
Each MAC supports 32x24-bit multiplication and 64-bit accumulators.
On Chip Memory
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Large embedded memory 520KB SRAM and 352KB ROM.
Separate X and Y data and P code memory spaces.
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Peripherals
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High Speed USB2.0 Device, supporting up to eight endpoints
Quad Digital microphone PDM interface
SPDIF Transmitter and SPDIF receiver
Full duplex stereo I2S/PCM
Custom Conexant Audio Bus (CAB) to connect to multi-channel
Conexant audio devices
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Software
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PMC
DCDC
PLLs
Six 32-bit timers/counters
Serial peripheral interface (SPI) Master and Slave
Inter-Integrated Circuit (I2C) Master and Slave
1 UART Serial interface
Dedicated peripheral and memory-to-memory DMAs channels
Interrupt controller
24 Flexible I/Os (FlexIO) fully programmable through integrated
PIC processor
2 sets of 3 LED PWM drivers
6 dedicated general-purpose I/Os (GPIOs),
Dedicated AES128 decryption engine.
Debug/JTAG interface and On chip logic analyzer
On-chip programmable PLLs
Advanced power management
Small footprint Real time Operating System
Configuration Toolbox
Details of DSP algorithms coming soon
D MAs
Tim e rs
C o n e xa n t
A u d io B u s
P IC, G P IO,
PWM
OC LA
USB2.0 HS
32-Bit DSP 0
(CAPE 0)
X
Y
P
32-Bit DSP 1
(CAPE 1)
X
Y
S P I M a ste r
P
I2S/PCM
I2C Master
P S R A M/ROM
B rid g e
U AR T
S P D IF TX
X S R A M/ROM
S P D IF R X
I2C/SPI Slave
Y S R A M/ROM
Quad Dig. Mic/
PDM
JTA G
AES Decryptor
Block Diagram
© 2011 Conexant Systems, Inc. All Rights
Reserved. Conexant and the Conexant logo
are registered trademarks of Conexant
Systems, Inc. All other trademarks are owned
by their respective owners. Although
Conexant strives for accuracy in all its
publications, this material may contain errors
or omissions and is subject to change without
notice. THIS MATERIAL IS PROVIDED AS IS
AND WITHOUT ANY EXPRESS OR IMPLIED
WARRANTIES, INCLUDING MERCHANT
ABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NON-INFRINGEMENT.
Conexant shall not be liable for any special,
indirect, incidental or consequential damages
as a result of its use.
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Doc# PBR-202940
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