epc100 Light-Curtain Device with 2-Wire Bus Interface General Description Feature The epc10x chip set is a general purpose CMOS integrated circuit for light-curtain applications. epc100 is used on the receiver side (Rx) whereas epc 101 is on the emitter side (Tx). Up to 1023 devices may be connected to two respectively four wires in parallel. Each device can be individually addressed by an epc100 chip which acts as the interface between a microcontroller and the 2wire bus. It manages the bus traffic between the microcontroller and the individual Rx and Tx elements. Programmable fuses i.e. for the address, sensitivity, LED light pulse width, etc. allow the device to be parametrized in the final system (OTP memory). Light pulse receiver Bus transceiver Advantageous wiring by communication over the power-supply lines High sensitive input for photo-diode current signals, typ. 60nA Scan period down to 30 µs integrated clock generator CSP10 package with very small footprint and standard QFN16 pack age available Applications Each chip can be put into 'standby mode' or 'operating mode' to reduce power consumption. During 'standby mode', power consump- tion is reduced and the photo diode is shorted. Refer to the separate Data Sheet of the epc101 transmitter chip and to the Reference Manual epc10x for implementation, usage and configuration information. Light barriers ranging from millimeters to tens of meters Light curtains Smoke detectors Liquid detectors Functional Block Diagram VDD 2-wire COM Interface Parameter Memory VDD18 Voltage Regulator VDD33 Processor SPI Controller Signal Processor PD f D1 GND © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice CS SI SO 1 SC Datasheet epc100 - V2.1 www.espros.ch epc100 Absolute Maximum Ratings (Notes 1, 2) Recommended Operating Conditions Voltage to any pin except V DD -0.3V to VDD+0.3 V Min. Max. Units Supply Voltage on 2-wire bus V DD -0.3V to +8.0V Operating Voltage on 2-wire bus V DD 4.5 5.5 V Programming Voltage on 2-wire bus V DD -0.3V to +8.0V Programming Voltage on V DD 7.0 8.0 V Power Supply Voltage V DD33 -0.3V to +5.5V Operating Supply Voltage V DD33 3.0 3.6 V Input current at any pin except LED -6mA to +6 mA Power consumption with maximum load 125mW Storage Temperature Range (T S) -55°C to +155°C Operating Temperature (T O) -40° +85 °C Lead Temperature solder, 4 sec. (T L) +260°C Relative Humidity (non-condensing) +5 +95 % Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended operating conditions indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifica tions and test conditions, see Electrical Characteristics. Note 2: This device is a highly sensitive CMOS ac current amplifier with an ESD rating of JEDEC HBM class 0 (<250V). Handling and as sembly of this device should only be done at ESD protected workstations. Electrical Characteristics VDD = 5.0 V, -40°C < T A < +85°C, if not otherwise specified Symbol Parameter Conditions/Comments Values Min. VPP Ripple on supply voltage, peak to peak Typ. Units Max. 2-wire interface Vdet Input pulse I PD NST --- 36nA 70 mV 50mV 48nA 150 mV 100mV 72nA 350 mV 200mV 108nA 600 mV IDD_IDLE Current consumption in idle mode 1.4 mA IDD_OP in operation mode I PD = 0 mA 2.0 mA 200 mV 9.8 mA 2 mA 108 nA Current consumption Vdet Detection level for 2-wire interface 50 IMOD Modulation current for 2-wire interface IPDDC DC Photo Diode Current generated by ambient light 6.4 IPD NST Input Pulse Threshold (Photo Current Sensitivity) Photodiode current pulse to generate an output signal (only OUT=1), configurable (refer to the Reference Manual epc10x) IPD RST Input Pulse Threshold (Photo Current Sensitivity) Photodiode current pulse to generate an output signal (OUT=1 & OUTH=1) IPulse Maximum Input Pulse Current If the input current is above this level, the T Relax is undefined (refer to section 'Other Parameters') TPulse LED pulse length TRelax Relaxation time After a strong current pulse (I pulse = 100µA) IN_Imin Input related noise @ IPDDC =0 IN_Imax 24 90 1 Input related noise @ IPDDC =IPDDC Max fclk Reference clock Internal oscillator dfclk Temperature drift of the oscillator VPUP Power-up Threshold Voltage VIH VIL ILEAKD 8.0 7 nA 100 µA 10 µs 50 µs 15 nARMS 20 nARMS 32 MHz 7 The voltage at VDD33 when the device starts up % 2.4 3 V High level input voltage 0.7 *VDD VDD V Low level input voltage GND 0.3 *VDD V 10 µA Input leakage current VOH Output high voltage @ 4mA sink except pin SCK/LED VOL Output low voltage @ 4mA source ISCK/LED Source current @ PIN SCK / LED VDD- 0.5 0.7 VHist Schmitt Trigger Hysteresis 0.1 RPU Pull-Up Resistor 30 © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 2 V 0.5 V 1.3 mA 200 kΩ V Datasheet epc100 - V2.1 www.espros.ch epc100 Connection Diagrams 12 OUTN/ SO 8 LED/ SCK 11 6 10 7 EN/ SI 13 8 9 9 VDD33 7 14 AOUT/ OUTH Top View 5 6 Top View 15 VDD18 10 5 16 VDD GND PD CS 1 2 3 4 1 10-Pin Chip Scale Package (CSP) Type 2 3 4 16-Pin QFN Package 10-Pin CSP 16-Pin QFN PIN Name Description 1 9 VDD 2 7 GND 3 6 PD Analog Input Photo diode input. 4 4 CS Digital Input SPI Interface: Chip Select. Active low, with pull up 5 2 AOUT OUTH Analog Out Digital Out Amplified and filtered signal of the photo diode (push-pull) or light reserve output (open drain) with 50 % threshold voltage above the threshold of the OUT output. 6 1 SO Digital Output SPI Interface: Serial out 7 15 SI Digital Input SPI Interface: Serial input 8 14 SCK Digital Input SPI Interface: Shift Clock 9 12 VDD33 Power supply Positive power supply for analog and digital. If the the device is supplied by V DDR, a Decoupling power supply filter capacitor is connected to this pin. 10 10 VDD18 Analog Out n/a 3 NC Not connected. Connect this pin with VSS. n/a 5 NC Not connected. Connect this pin with VSS. n/a 8 NC Not connected. Connect this pin with VSS. n/a 11 NC Not connected. Connect this pin with VSS. n/a 13 NC Not connected. Connect this pin with VSS. n/a 16 NC Not connected. Connect this pin with VSS. Power supply Positive power supply for regulator and positive terminal of the 2-wire interface. Power supply Negative power supply pin. 1.8 V regulator output. Do not use this pin, except for a decoupling capacitor. PIN Connections QFN16-VEED1VN4 LST 28.01.2010 Page 1 File: Unbenannt This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission. © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 3 Datasheet epc100 - V2.1 www.espros.ch epc100 Other Parameters (typical values, T amb = 25°C, VDD = 5.0V) 120 110 Sensitivity [nA] 100 90 80 70 60 50 40 0 1 2 3 4 5 6 Pulse width [us] Figure 1: Input Sensitivity vs. LED pulse length Threshold Threshold OUTH OUTH OUTN OUTN OUTN OUTN OUTH OUTH Figure 2: OUTN and OUTH threshold operation Figure 3: Typical light curtain receiver edge circuit © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 4 Datasheet epc100 - V2.1 www.espros.ch epc100 Overview Functional Description Light Curtain Receiver in a 2-Wire Configuration ITE VDD VDD33 µC SI SO SCK CS IF VDD Rx Element 2 epc100 VDD33 PD VDD33 R1 PD VDD18 GND VDD epc100 R2 VDD18 GND GND Rx Element n VDD epc100 VDD33 PD Rn VDD18 GND RTE VDD µC Rx Element 1 Bus Termination VDD epc100 100nF RTE GND Figure 4: Typical light curtain receiver edge circuit The epc100 device can be operated in two different modes: a) Photo Current Receivers It detects current pulses of the photo diode generated by light pulses and transmits the information using the 2-wire bus to a central con troller, i.e. a micro controller. The devices operating as this photo current receivers are designated in the schematic diagram above as R 1 to Rn. b) 2-Wire Bus Interface of the Central Controller It manages the 2-wire bus traffic between the micro controller and the individual photo current receivers. The device operating as the interface unit is designated as I F. From the point of view of the micro controller, the whole system looks like a single device with several addressable photo diodes. The micro controller activates one photo diode and fetches the results after a predefined time. Each sensor device has two different operation modes: A 18.05.2011 LST standbyAN and an operating mode. During the standby mode the power consumption is reduced and the DC current generated in the photo di epc100 light curtain receiver Page 1 ode is shorted. During the operation mode, the micro controller addresses one device after the other and fetches the result. The result con File: tains the information whether a light pulse has been received in a predefined receive window or not. It also contains the time point when the This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission . light pulse has been received in respect to the receive window. The receiver channel detects current pulses which are generated by light pulses in the photo diodes. The detection circuitry has two trigger levels, hereinafter called thresholds, which form a digital signal from the analog current change. The lower threshold is called OUTN (normal) whereas the upper level is called OUTH (high). Both trigger thresholds can be configured individually per chip. Please refer to Figure 2 and to the Reference Manual epc10x which contains the configuration information. © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 5 Datasheet epc100 - V2.1 www.espros.ch epc100 Application Information Schematic Circuit of one Node Figure 5 shows the schematic circuit of one node on a light curtain system. A node consists of four components only: The receiver chip ep c100, a photo diode and two supply voltage decoupling capacitors. 2-wire bus: positive terminal VDD epc100 VDD33 PD VDD18 C1 PD GND C2 2-wire bus: negative terminal Figure 5: Schematic circuit of one node Recommended Components Values PD: PIN photo diode, i.e., epc300, epc310, epc320, epc330 (refer to the separate available data sheet epc3xx), or similar C1: 100nF ceramic capacitor C2: 4.7nF ceramic capacitor Design Precautions The sensitivity at pin PD is very high in order to achieve a long operation range of light curtains even without lenses in front of the IR LED and/or the photo diode. Thus, the pin PD is very sensitive to EMI. Special care should be taken to keep the PCB track at pin PD to the photo diode as short as possible (a few mm only!). This track should be kept away from sources emitting electromagnetic noise which may induce unwanted signals. It is strongly recommended to cover the chip and the photodiode with a metal shield. A recommended part is shown in Figure 6. The pins at the bottom are to solder the shield to the PCB with electrical connection to GND. The hole in the front is the opening window for the photo diode. The back side of the PCB below the sensitive area (PD, epc100) shall be a polygon connected to GND to shield the circuit from the back side. The capacitors shall be of high mechanical stability (no piezoelectric effect) in order to avoid unwanted voltage modulation by mechanical shock or vibration. Figure 6: Recommended EMC shield Ambient Light Photodiode DC current is generated by ambient light, e.g. sun light. DC currents at pin PD do not generate an output signal. However, if I is above the stated value, the input is saturated which blocks the detection of AC current pulses. PDDC Photodiode Capacitance If the photodiode capacitance is below the specified value, the system becomes more sensitive to power supply ripple voltage at higher fre quencies (>200kHz). This sensitivity can be reduced by a parallel capacitor to the photodiode. However, this measure reduces the detection sensitivity. If the photo diode capacity is above the specified value, a lower detection sensitivity and a higher sensitivity spread results. © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 6 Datasheet epc100 - V2.1 www.espros.ch Layout Information (all measures in mm, ) CSP-10 Package Mechanical Dimensions Designed Approved Scale Page Part Name 0.15 1.9 +0.0/-0.1 <Name> 26.02.2009 <Name> <Data> M 1:1 DIN A4 1 Part No. <Partname> <x000 000> This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission . epc100 Layout Recommendations File: Unbenannt 0.1524 Bottom View ∅ 0.12 0.5 0.5 Pin 1 Solder balls Sn97.5Ag2.5 0.5 0.11 ±0.01 0.5 0.3 0.15 2.0 0.5 1.4 +0.0/-0.1 0.5 ∅ 0.3 0.5 2.5 no solder mask inside this area QFN-16 Package Top view 1.9 2.9 - 3.1 1.9 Bottom View 20.12.2011 0.25 <name> <Title> Page 1 e: s document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission. 0.02 0.9 0.1-0.2 0.5 2.9 - 3.1 0.25 LST Mechanical dimension QFN16 Package 0.3 18.05.2011 Page 1 File: This document is confidential and protected by law and international trades. It must not be shown to any third party nor be copied in any form without our written permission. © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 7 Datasheet epc100 - V2.1 www.espros.ch epc100 CSP6 Tape QFN16 Tape Pin 1 Pin 1 12 8 Reflow Solder Profile For infrared or conventional soldering the solder profile has to follow the recommendations of IPC/JEDEC J-STD-020C (min. revision C) for Pb-free assembly for both types of packages. The peak soldering t emperature (TL) should not exceed +260°C for a maximum of 4 sec. Packaging Information (all measures in mm) Tape & Reel Information The devices are mounted on embossed tape for2 automatic placement systems. The tape is wound on 178 mm (7 inch) or 330 mm (13 inch) reels and individually packaged for shipment. General tape-and-reel specification data are available in a separate data sheet and indicate the tape sizes for various package types. Further tape-and-reel specifications can be found in the8Electronic Industries Association (EIA) standard 481-1, 481-2, 481-3. CSP6 Tape QFN16 Tape Pin 1 12 8 Pin 1 4 8 epc does not guarantee that there are no empty cavities. Thus, the pick-and-place machine should do check the presence of a chip during picking. Ordering Information Part Number Package RoHS compliance Packaging Method epc100-CSP10 CSP10 Yes Reel epc100-QFN16 QFN16 Yes Reel epc101-CSP10 CSP10 Yes Reel epc101-QFN16 QFN16 Yes Reel © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 8 Datasheet epc100 - V2.1 www.espros.ch epc100 IMPORTANT NOTICE ESPROS Photonics AG and its subsidiaries (epc) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, epc will not be responsible for any failure to meet such requirements. © 2011 ESPROS Photonics Corporation Characteristics subject to change without notice 9 Datasheet epc100 - V2.1 www.espros.ch