ALPHA-TX ALPHA-RX ALPHA RF MODULES FM Transmitter & Receiver Modules Available as 433 or 915MHz Transmit Range up to 300m Miniature SMT Packages Data Rate up to 256Kbps Programmable Output Power 2.2 – 5.4Vdc Operating Voltage Standby Current <300nA Programmable Freq Deviation SPI Interface (for Config) Clock and Reset Signal for External MCU Wakeup Timer Automatic Antenna Tuning Differential Antenna Output Low Battery Detection EMC Compliant , FCC Compliant • Operates from -45 to +85oC • • • • • • • • • • • • • • • • Transmitter • 3-12 Supply Voltage • Programmable Output Power Receiver • • • • • Standby current < 0.3uA Wake up timer function PLL Design Analog and Digital Signal Strength indicator Programmable receive bandwidth (67 to 400KHz) Applications Wireless Security Systems Car Alarms Remote Gate Controls Remote Sensing Data Capture Sensor Reporting Introduction The Alpha Modules are extremely cost effective but high performance radio modules. Supplied in a miniature Surface mount package these modules can Transmit/Receive at upto 115Kbps at upto 300m range. Operating at 2-5V, both transmitter and receiver monitor their battery voltage and can sleep with very low standby current. The modules can wake intermittently and provide direct control outputs to a microcontroller, ideally suited to battery applications. (Especially receivers!) These Modules will suit one to one multi-node wireless links in applications including car and building security, POS and inventory tracking, remote process monitoring. Part Numbers Part Number ALPHA-TX433S ALPHA-RX433S ALPHA-TX915S ALPHA-RX915S DSALPHA-3 Jul 09 Description FM Transmitter Module, 433MHz FM Receiver Module, 433MHz FM Transmitter Module, 915MHz FM Receiver Module, 915MHz 2009 RF Solutions Ltd. Page 1 ALPHA-TX ALPHA-RX ALPHA RF MODULES Transmitter Pin Description Pin Definition Direction Description 13 4 11 14 1 2 3 8 5-7, 9,10,12 FSK CLK VDD nIRQ SDI SCK nSEL ANT GND IN OUT IN OUT IN IN IN OUT - FSK Data Input Clock out for MCU (1-10MHz) Positive Power Supply Interrupt Request Out (Active Low) SPI Data Input SPI Clock Input Chip select (Active Low) Antenna Connection Ground Connection DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 2 ALPHA-TX ALPHA-RX ALPHA RF MODULES Receiver Pin Description Pin Definition Direction Description 11 9 12 13 14 1 VDI VDD SDI SCK nSEL FFIT/SDO OUT IN IN IN IN OUT 6 7,10 2 3 4 nRES GND nIRQ DATA/nFFS DATA/CFIL/FFIT OUT IN OUT IN IN/OUT 5 8 CLK ANT OUT IN FSK Data Input Positive Power Supply SPI Data Input SPI Clock Input Chip select (Active Low) FIFO fill interrupt (Active Low) / status read data output Clock out for MCU (1-10MHz) Ground Connection Interrupt Request Output (Active Low) Data Input (non FIFO Mode) / FIFO Select Clock Output (noFIFO) / External filter Capacitor(analog mode) / FIFO interrupt (active High) when FIFO level set to 1, FIFO Empty interruption can be achieved. Clock Output for external microcontroller Antenna input DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 3 ALPHA-TX ALPHA-RX ALPHA RF MODULES Transmitter Mechanical Dimensions Receiver Mechanical Dimensions 15.9mm R 9.0mm IC DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 4 ALPHA-TX ALPHA-RX ALPHA RF MODULES Receiver Technical Specifications Maximum Ratings (not Operating) Symbol VDD VIN IIN TST TID Parameter Minimum Maximum Unit -0.5 -0.5 -25 -55 6.0 Vdd +0.5 +25 125 260 V V mA o C o C Minimum Maximum Unit 2.2 5.4 85 Positive Supply All pin input level Input current except power Storage Temp Soldering Temp Maximum Working Range Symbol VDD TOP Parameter Positive Supply Operating Temp -40 V C o DC Characteristics Symbol IDD Parameter Min Current Consumption @ 433 @ 915 Stand by Current Sleep Mode Current Low Battery Detection Low Battery Step (0.1V steps) Low Battery accuracy Low Level Input High Level Input Leakage Current, VIL = 0V Leakage Current, VIH = VDD, VDD = 5.4V Low Level output, IOL = 2mA High Level output, IOH = 2mA IX IPD ILB VLB VLBA VIL VIH IIL IIH VOL VOH Typical Max Unit 9 10.5 3.0 0.3 0.5 11 12.5 3.5 mA 2.2 5.3 75 0.3 x VDD 0.7 x VDD -1 -1 1 1 0.4 VDD-0.4 mA uA uA V mV V V uA uA V V AC Characteristics Symbol FLO Min @433MHz @915MHz Bandwidth 1 2 3 4 5 6 PLL Lock time, after 10Mhz step hopping. PLL Start time, after crystal stabilised Data Rate Sensitivity @433MHz @915MHz RSSI Accuracy RSSI Range RSSI Programmable Step ARSSI Filter DRSSI Response Time, C Capacitor Bank PWR time, power up time (VDD to 90%) Wake up timer period Programmable Wake up time BW TLOCK TST,P BR PMIN RSA RSR RSSTEP RSARSSI RSRESP CXL TPOR TPBT TWAKEUP DSALPHA-3 Parameter Frequency Jul 09 430.24 900.72 60 120 180 240 300 360 Typical 67 134 200 270 350 400 20 250 -109 -105 -5 Max Unit 439.75 929.27 75 150 225 300 375 450 MHz 115.2 -100 -98 +5 46 6 1 500 8.5 50 .96 1 2009 RF Solutions Ltd. 16 100 1.08 11 5x10 Page 5 KHz uS uS Kbps dBm dB dB dB nF us pF mS mS mS ALPHA-TX ALPHA-RX ALPHA RF MODULES Transmitter Technical Specifications Maximum Ratings (not Operating) Symbol VDD VIN IIN TST TID Parameter Minimum Maximum Unit -0.5 -0.5 -25 -55 6.0 Vdd +0.5 +25 125 260 V V mA o C o C Minimum Maximum Unit 2.2 -40 5.4 85 Positive Supply All pin input level Input current except power Storage Temp Soldering Temp Maximum Working Range Symbol VDD TOP Parameter Positive Supply Operating Temp V C o DC Characteristics Symbol IDD Parameter Minimum Current Consumption @ 433MHz @ 915MHz @ 0dBm Power output Current Consumption @ max power output Sleep Mode Current Wake up timer consumption Low Battery Detector Current Idle Mode (crystal only) Low Battery Detect range (0.1V steps) Low Level Input High Level Input Leakage Current, VIL = 0V Leakage Current, VIH = VDD, VDD = 5.4V Low Level output, IOL = 2mA High Level output, IOH = 2mA IDD IPD IWT ILB IX VLB VIL VIH IIL IIH VOL VOH Typical Maximum Unit 12 15 mA 23 mA 0.3 1.5 0.5 1.5 uA uA uA mA mV V V uA uA V V 2.2 5.3 0.3 x VDD 0.7xVDD -1 -1 1 1 0.4 VDD-0.4 AC Characteristics Symbol FREF FO Minimum @433MHz 2.5KHz Step @915MHz 7.5KHz Step PLL Lock time, after 10Mhz step hopping. PLL Start time, after crystal stabilised Max Available Power Output @433MHz @915MHz Q Factor of Output capacitance FSK Data Rate FSK Deviation, 30KHz step Period for Wake Up timer Wake Up Timer Power up time 430.24 900.72 Frequency TLOCK TSP PMAX QO BRFSK DFFSK TPBT TWAKEUP TPQR DSALPHA-3 Parameter Jul 09 Typical Maximum Unit 439.75 929.27 MHz 20 250 5 2 16 7 4 18 30 0.95 1 2009 RF Solutions Ltd. 22 115.2 210 1.05 9 2x10 100 Page 6 uS uS dBm kbps KHz mS mS mS ALPHA-TX ALPHA-RX ALPHA RF MODULES Transmitter Programming Guide 1． ． Brief description The ALPHA Transmitter is a low cost FSK transmitter. It needs only an MCU, crystal, decoupling capacitor and antenna to build a high reliability FSK transmitter. The operation frequency can cover 300 to 1000MHz. The module supports a command interface to setup frequency, deviation, output power and also data rate. 2． ． Commands bit 1 ． Timing diagram 2 ． Configuration Setting Command 15 1 14 0 13 0 12 b1 11 b0 10 d2 9 d1 8 d0 7 x3 6 x2 5 x1 4 x0 3 ms 2 m2 1 m1 0 m0 POR 8080h b1..b0: band select： b1 0 1 1 b0 1 0 1 band[MHz] 433 868 915 d2..d0: select frequency of CLK pin d2 0 0 0 0 1 1 1 1 d1 0 0 1 1 0 0 1 1 d0 0 1 0 1 0 1 0 1 CLK frequency[MHz] 1 1.25 1.66 2 2.5 3.33 5 10 CLK signal is derived from the crystal oscillator and can be applied to the MCU clock in to save a second crystal. If not used, please set bit “dc” to disable CLK output DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 7 ALPHA-TX ALPHA-RX ALPHA RF MODULES x3..x0: select crystal load capacitor x3 0 0 0 0 …… x2 0 0 0 0 x1 0 0 1 1 …… x0 0 1 0 1 Load capacitor [pF] 8.5 9.0 9.5 10.0 1 1 1 1 1 1 0 1 15.5 16.0 To integrate the load capacitor internal can not only save cost, but also adjust reference frequency by software ms: select modulation polarity m2..m0: select frequency deviation m2 m1 m0 frequency deviation[kHz] 0 0 0 0 1 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 30 60 90 120 150 180 210 . 3 bit ． Power Management Command 15 1 14 1 13 0 12 0 11 0 10 0 9 0 8 0 7 a1 6 a0 5 ex 4 es 3 ea 2 eb 1 et 0 dc POR C000h a1： Crystal oscillator and synthesizer are enabled by Data transmit Command and disable by Sleep command. a0： Power amplifier is enabled by Data transmit Command and disable by Sleep Command. ex：Enable crystal oscillator es：Enable synthesizer ea：Enable power amplifier eb：Enable low battery detection funciton et：Enable wake-up timer dc：Disable output of CLK pin 4 bit ． Frequency Setting Command 15 1 14 0 13 1 12 0 11 f11 10 f10 9 f9 8 f8 7 f7 6 f6 5 f5 4 f4 3 f3 2 f2 1 f1 0 f0 f11..f0: set operation frequency: 433band: Fc=430+F*0.0025 MHz 868band: Fc=860+F*0.0050 MHz 915band: Fc=900+F*0.0075 MHz Fc is carrier frequency DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 8 POR A7D0h ALPHA-TX ALPHA-RX ALPHA RF MODULES 5 bit ． Data Rate Command 15 1 14 1 13 0 12 0 11 1 10 0 9 0 8 0 7 r7 6 r6 5 r5 4 r4 3 r3 2 r2 1 r1 0 r0 POR C800h p2..p0: set relative output power: Pout=Pmax-P*3 [dBm] Pmax is the max output power; it is related to the antenna impedance. 7 Low Battery Detector and Tx bit Synchronization Command 15 14 13 12 11 10 9 8 7 6 5 4 3 1 1 0 0 0 0 1 0 dwc 0 ebs t4 t3 2 t2 1 t1 0 t0 POR C200h 2 s2 1 s1 0 s0 POR C400h r7..r0: set data rate BR=10000000/29/：R+1： BR is data rate 6 bit bit ． Power Setting Command 7 6 5 4 3 2 1 0 POR 1 0 1 1 0 p2 p1 p0 B0h ． dwc：Disable wake-up timer periodical calibration ebs：Enable TX bit synchronization function t4..t0: Set threshold voltage of Low battery detector Vlb=2.2+T*0.1 [V] 8 bit ． Sleep Command 15 1 14 1 13 0 12 0 11 0 10 1 9 0 8 0 7 s7 6 s6 5 s5 4 s4 3 s3 If crystal oscillator, synthesizer and power amplifier are auto-controlled, this command will close power amplifier and synthesizer immediately, then stop crystal oscillator after S periods of CLK signal bit ． 9 Wake-Up Timer Command 15 14 13 12 11 10 9 1 1 1 r4 r3 r2 r1 8 r0 7 m7 6 m6 5 m5 4 m4 3 m3 2 m2 1 m1 0 m0 POR E000h The wake-up timer period is determined by: R Twake-up = M * 2 [ms] For continual operation, bit ‘et’ must be cleared and set bit ． 10 7 1 6 1 Data Transmit Command 5 4 3 2 1 0 0 0 1 1 0 0 This command indicate that the following data on SDI pin is to be transmitted, the transmission stops if nSel return to hi. ． 11 bit 15 1 Status Register Read Command 14 13 12 11 10 9 1 0 0 1 1 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 0 This command is used to read internal status register content, output starts at 8th clock of SCK. DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 9 POR -- ALPHA-TX ALPHA-RX ALPHA RF MODULES 3． ． Transmitter Operation flow Start Initialise ALPHA Module Open Tx Send Data Close Tx Send Data Wait nIRQ Low Write a byte Package send Over? Return DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 10 ALPHA-TX ALPHA-RX ALPHA RF MODULES Receiver Programming Guide 4． ． Brief description The ALPHA Receiver is a low cost FSK Receiver with all RF functions integrated. It needs only an MCU, crystal, decoupling capacitor and antenna to build a high reliability FSK transmitter. The operation frequency can cover 300 to 1000MHz. Although each module can cover all frequencies, better performance is obtained by using the module at the preset frequency The module supports a command interface to setup frequency, deviation, output power and also data rate. 5． ． Commands bit 1 ． Timing diagram 2 ． Configuration Setting Command 15 1 14 0 13 0 12 b1 11 b0 10 eb 9 et 8 ex 7 x3 6 x2 5 x1 4 x0 3 i2 2 i1 1 i0 b1..b0: select band b1 0 0 1 1 b0 0 1 0 1 band[MHz] 315 433 868 915 eb：Enable low battery detection function et：Enable wake-up timer ex：Enable crystal oscillator x3..x0: select crystal load capacitor DSALPHA-3 x3 0 0 0 0 …… x2 0 0 0 0 x1 0 0 1 1 …… x0 0 1 0 1 load capacitor [pF] 1 1 1 1 1 1 0 1 15.5 16.0 Jul 09 8.5 9.0 9.5 10.0 2009 RF Solutions Ltd. Page 11 0 dc POR 893Ah ALPHA-TX ALPHA-RX ALPHA RF MODULES i2..i0:select baseband bandwidth i2 i1 i0 Baseband Bandwidth [kHz] 0 0 0 reserved 0 0 1 400 0 1 0 340 0 1 1 270 1 0 0 200 1 0 1 134 1 1 0 67 1 1 1 reserved dc：Disable signal output of CLK pin 3 bit ． Frequency Setting Command 15 1 14 0 13 1 12 0 11 f11 10 f10 9 f9 8 f8 7 f7 6 f6 5 f5 4 f4 3 f3 2 f2 1 f1 0 f0 POR A680h f11..f0: Set operation frequency 315band: Fc=310+F*0.0025 MHz 433band: Fc=430+F*0.0025 MHz 868band: Fc=860+F*0.0050 MHz 915band: Fc=900+F*0.0075 MHz Fc is carrier frequency, F is frequency parameter and 36≤F≤3903 4 bit ． Receiver Setting Command 15 1 14 1 13 0 12 0 11 0 10 0 9 0 8 0 7 d1 6 d0 5 g1 4 g0 3 r2 2 r1 1 r0 0 en d1..d0: select VDI source d1 0 0 1 1 d0 0 1 0 1 VDI output Digital RSSI output(DRSSI) Data quality detection output (DQD) Clock recovery lock output Always on g1..g0: select LNA gain g1 0 0 1 1 DSALPHA-3 Jul 09 g0 0 1 0 1 LNA gain (dBm) 0 -14 -6 -20 2009 RF Solutions Ltd. Page 12 POR C0C1h ALPHA-TX ALPHA-RX ALPHA RF MODULES r2..r0: select DRSSI threshold r2 0 0 0 0 1 1 1 1 r1 0 0 1 1 0 0 1 0 r0 0 1 0 1 0 1 0 1 RSSIsetth [dBm] -103 -97 -91 -85 -79 -73 -67 -61 The actual DRSSI threshold is related to LNA setup: RSSIth = RSSIsetth + GLNA. en: Enable the receiver bit ． 5 Wake-Up Timer Command 15 14 13 12 11 10 9 1 1 1 r4 r3 r2 r1 8 r0 7 m7 6 m6 5 m5 4 m4 3 m3 2 m2 1 m1 0 m0 POR E196h The wake-up period is determined by: Twake-up = M * 2R [ms] For continual operation, bit ‘et’ must be cleared and set 6 bit ． Low Duty-Cycle Command 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 1 0 0 1 1 0 0 d6 d5 d4 d3 d2 d1 d0 en CCOEh d6..d0: Set duty cycle D.C.= (D * 2 +1) / M *100% en：Enable low duty cycle mode 7 bit ． Low Battery Detector and Microcontroller Clock Divider Command 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 1 0 0 0 0 1 0 d2 d1 d0 t4 t3 t2 t1 t0 C200h d2..d0: select frequency of CLK pin d2 0 0 0 0 1 1 1 1 d1 0 0 1 1 0 0 1 1 d0 0 1 0 1 0 1 0 1 Clock frequency[MHz] 1 1.25 1.66 2 2.5 3.33 5 10 CLK signal is derive form crystal oscillator and it can be applied to MCU clock in to save a second crystal. If not used, please set bit “dc” to disable CLK output To integrate the load capacitor internal can not only save cost, but also adjust reference frequency by software t4..t0: Set threshold voltage of Low battery detector： Vlb=2.2+T*0.1 [V] DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 13 ALPHA-TX ALPHA-RX ALPHA RF MODULES 8 bit ． AFC Command 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 1 0 0 0 1 1 0 a1 a0 rl1 rl0 st fi oe en C6F7h a1..a0: select AFC auto-mode： a1 0 0 1 1 a0 0 1 0 1 Controlled by MCU Run once at power on Keep offset when VDI hi Keeps independently from VDI rl1..rl0: select range limit r1 0 0 1 1 range：fres： No restriction +15/-16 +7/-8 +3-4 r0 0 1 0 1 Freq 315：433band: 2.5kHz 868band: 5kHz 915band: 7.5kHz st: st goes hi will store offset into output register fi: Enable AFC hi accuracy mode oe: Enable AFC output register en: Enable AFC funcition 9． Data Filter Command bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 1 0 0 0 1 0 0 al ml 1 s1 s0 f2 f1 f0 C42Ch al: Enable clock recovery auto-lock ml: Enable clock recovery fast mode s1..s0: select data filter type s1 s0 Filter type 0 0 OOK 0 1 Digital filter 1 0 reserved f1..f0: Set DQD threshold DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 14 ALPHA-TX ALPHA-RX ALPHA RF MODULES bit ． 10 15 1 14 1 Data Rate Command 13 12 11 10 0 0 1 0 9 0 8 0 7 cs 6 r6 5 r5 4 r4 3 r3 2 r2 1 r1 0 r0 POR C823h Output and FIFO mode Command 13 12 11 10 9 8 7 0 0 1 1 1 0 f3 6 f2 5 f1 4 f0 3 s1 2 s0 1 ff 0 fe POR CE85h r7..r0: Set data rate BR=10000000/29/：R+1：/：1+cs*7： bit ． 11 15 1 14 1 f3..f0: Set FIFO interrupt level s1..s0: select FIFO fill start condition s1 s0 0 0 VDI 0 1 Sync-word 1 0 VDI & Sync-word 1 1 Always ff: Enable FIFO fill fe: Enable FIFO function 12.Reset Mode Command bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 dr DAOOh Bit 0 (dr): Disables the highly sensitive RESET mode. If this bit is cleared, a 600 mV glitch in the power supply may cause a system reset. For a more detailed description see the Reset modes section. bit 13.Status Read Command 15 14 13 12 11 0 x x x x 10 x 9 x 8 x 7 x 6 x 5 x 4 x 3 x 2 x 1 x 0 x This command starts with a 0 and be used to read internal status register DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 15 POR - ALPHA-TX ALPHA-RX ALPHA RF MODULES 6． ． Receiver Operation flow Start Initialise ALPHA Rx Module Open Rx Receive Data N Check Pass? Y Indicate Receive Receive Data Wait nIRQ Low Read FIFO Data N Data Receive Over? Y Return After Initialisation, open FIFO receive mode and wait for nIRQ low , only then can the MCU read received and stored data in FIFO . For the next received package please reset FIFO DSALPHA-3 Jul 09 2009 RF Solutions Ltd. Page 16