TYSEMI DMN3051L

Product specification
DMN3051L
N-CHANNEL ENHANCEMENT MODE MOSFET
Product Summary
RDS(ON)
ID
TA = 25°C
38mΩ @ VGS = -10V
5.8A
64mΩ @ VGS = -4.5V
4.5A
V(BR)DSS
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•
•
•
•
•
•
•
30V
Description and Applications
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•
This new generation MOSFET has been designed to minimize the
on-state resistance (RDS(on)) and yet maintain superior switching
performance, making it ideal for high efficiency power management
applications.
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•
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Low On-Resistance:
Low Gate Threshold Voltage
Low Input Capacitance
Fast Switching Speed
Low Input/Output Leakage
Lead-Free Finish; RoHS compliant (Note 1)
Halogen and Antimony Free. “Green” Device (Note 2)
Qualified to AEC-Q101 Standards for High Reliability
Mechanical Data
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•
Load Switch
DC-DC Converters
Power management functions
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SOT23
Case: SOT23
Case Material: Molded Plastic, “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminals: Finish – Matte Tin annealed over Copper
leadframe. Solderable per MIL-STD-202, Method 208
Terminal Connections: See Diagram
Weight: 0.008 grams (approximate)
Drain
D
Gate
Top View
Equivalent Circuit
Top View
S
G
Source
Ordering Information (Note 3)
Part Number
DMN3051L-7
Notes:
Case
SOT23
Packaging
3000/Tape & Reel
1. EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. No purposely added lead. Halogen and Antimony free
Marking Information
3N5
Date Code Key
Year
Code
2007
U
2008
V
Month
Code
Jan
1
Feb
2
http://www.twtysemi.com
2009
W
Mar
3
3N5 = Product Type Marking Code
YM = Date Code Marking
Y = Year (ex: U = 2007)
M = Month (ex: 9 = September)
YM
NEW PRODUCT
Features and Benefits
2010
X
Apr
4
2011
Y
May
5
[email protected]
2012
Z
Jun
6
2013
A
Jul
7
Aug
8
2014
B
Sep
9
2015
C
Oct
O
2016
D
Nov
N
2017
E
Dec
D
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Product specification
DMN3051L
Maximum Ratings @TA = 25°C unless otherwise specified
NEW PRODUCT
Characteristic
Symbol
VDSS
VGSS
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (Note 5) VGS = 10V
TA = 25°C
TA = 70°C
TA = 25°C
TA = 70°C
Steady
State
t<5s
Value
30
±20
4.5
3.5
ID
A
5.8
4.9
20
2
ID
Pulsed Drain Current (10μs pulse, duty cycle = 1%)
Maximum Body Diode Forward Current (Note 5)
Units
V
V
IDM
IS
A
A
A
Thermal Characteristics
Characteristic
Symbol
TA = 25°C
TA = 70°C
Steady state
t < 5s
TA = 25°C
TA = 70°C
Steady state
t < 5s
Total Power Dissipation (Note 4)
Thermal Resistance, Junction to Ambient (Note 4)
Total Power Dissipation (Note 5)
Thermal Resistance, Junction to Ambient (Note 5)
Thermal Resistance, Junction to Case (Note 5)
Operating and Storage Temperature Range
Value
0.7
0.44
182
109
1.4
0.85
94
56
25
-55 to +150
PD
RθJA
PD
RθJA
RθJC
TJ, TSTG
Units
W
°C/W
W
°C/W
°C
Electrical Characteristics @TA = 25°C unless otherwise specified
Characteristic
OFF CHARACTERISTICS (Note 6)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage
ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance
Source-Drain Diode Forward Voltage
DYNAMIC CHARACTERISTICS (Note 7)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Notes:
Symbol
Min
Typ
Max
Unit
BVDSS
IDSS
30
⎯
⎯
⎯
V
nA
IGSS
⎯
⎯
⎯
800
±80
±800
VGS(th)
|Yfs|
VSD
1.3
⎯
⎯
⎯
⎯
1.9
33
54
5
0.78
⎯
1.16
S
V
Ciss
Coss
Crss
Rg
Qg
Qgs
Qgd
tD(on)
tr
tD(off)
tf
⎯
⎯
⎯
-
424
115
81
1.51
9.0
1.3
1.3
3.4
6.2
13.9
2.8
⎯
⎯
⎯
-
pF
pF
pF
Ω
nC
nC
nC
ns
ns
ns
ns
RDS (ON)
2.2
38
64
nA
V
mΩ
Test Condition
VGS = 0V, ID = 250μA
VDS = 28V, VGS = 0V
VGS = ±12V, VDS = 0V
VGS = ±20V, VDS = 0V
VDS = VGS, ID = 250μA
VGS = 10V, ID = 5.8A
VGS = 4.5V, ID = 5.0A
VDS = 5V, ID = 3.1A
VGS = 0V, IS = 2.0A
VDS = 5V, VGS = 0V
f = 1.0MHz
VDS = 0V, VGS = 0V, f = 1MHz
VGS = 10V, VDS = 15V, ID = 5.8A
VDD = 15V, VGS = 10V,
RL = 2.6Ω, RG = 3Ω
2. Device mounted on FR-4 PCB with minimum recommended pad layout, single sided.
3. Device mounted on 1” x 1” FR-4 PCB with high coverage 2 oz. Copper, single sided.
4. Short duration pulse test used to minimize self-heating effect.
5. Guaranteed by design. Not subject to production testing.
http://www.twtysemi.com
[email protected]
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