NSC 54AC10F

54AC10
Triple 3-Input NAND Gate
General Description
The ’AC10 contains three, 3-input NAND gates.
Features
n Outputs source/sink 24 mA
n Standard Military Drawing (SMD)
— ’AC10: 5962-87610
n For Military 54ACT10 device see the 54ACTQ10
n ICC reduced by 50% on 54AC only
Logic Symbol
Connection Diagrams
IEEE/IEC
Pin Assignment
for DIP and Flatpak
DS100261-1
Pin Names
Description
An, Bn, Cn
Inputs
On
Outputs
DS100261-3
Pin Assignment
for LCC
DS100261-2
FACT™ is a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100261
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54AC10 Triple 3-Input NAND Gate
July 1998
Absolute Maximum Ratings (Note 1)
Junction Temperature (TJ)
CDIP
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
175˚C
Recommended Operating
Conditions
−0.5V to +7.0V
Supply Voltage (VCC)
’AC
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
54AC
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
VIN from 30% to 70% of VCC
VCC @ 3.3V, 4.5V, 5.5V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
± 50 mA
2.0V to 6.0V
0V to VCC
0V to VCC
−55˚C to +125˚C
125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recommend operation of FACT™ circuits outside databook specifications.
± 50 mA
−65˚C to +150˚C
DC Characteristics for ’AC Family Devices
Symbol
Parameter
VCC
54AC
TA =
(V)
−55˚C to +125˚C
Units
Conditions
Guaranteed Limits
VIH
VIL
VOH
Minimum High Level
3.0
2.1
Input Voltage
4.5
3.15
5.5
3.85
Maximum Low Level
3.0
0.9
Input Voltage
4.5
1.35
5.5
1.65
Minimum High Level
3.0
2.9
Output Voltage
4.5
4.4
5.5
5.4
VOUT = 0.1V
V
or VCC − 0.1V
V
or VCC − 0.1V
VOUT = 0.1V
IOUT = −50 µA
V
(Note 2)
VIN = VIL or VIH
VOL
3.0
2.4
4.5
3.7
5.5
4.7
Maximum Low Level
3.0
0.1
Output Voltage
4.5
0.1
5.5
0.1
IOH = −12 mA
V
IOH = −24 mA
IOH = −24 mA
IOUT = 50 µA
V
(Note 2)
VIN = VIL or VIH
IIN
Maximum Input
3.0
0.5
4.5
0.5
5.5
0.5
5.5
± 1.0
IOL = 12 mA
V
IOL = 24 mA
µA
IOL = 24 mA
VI = VCC, GND
Leakage Current
IOLD
Minimum Dynamic
Output Current (Note 3)
5.5
50
mA
VOLD = 1.65V Max
IOHD
5.5
−50
mA
VOHD = 3.85V Min
ICC
Maximum Quiescent
5.5
40.0
µA
VIN = VCC
Supply Current
or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
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2
DC Characteristics for ’AC Family Devices
(Continued)
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
ICC for 54AC @ 25˚C is identical to 74AC @ 25˚C.
AC Electrical Characteristics
54AC
TA = −55˚C
VCC
Symbol
Parameter
(V)
(Note 5)
tPLH
tPHL
Propagation Delay
Propagation Delay
Fig.
to +125˚C
CL = 50 pF
Units
Min
Max
3.3
1.0
11.0
5.0
1.5
8.5
3.3
1.0
10.0
5.0
1.5
7.0
No.
ns
ns
Note 5: Voltage Range 3.3 is 3.3V ± 0.3V
Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol
CIN
CPD
Typ
Units
Input Capacitance
Parameter
4.5
pF
Power Dissipation
25.0
pF
Conditions
VCC = OPEN
VCC = 5.0V
Capacitance
3
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4
Physical Dimensions
inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
14 Lead Ceramic Dual-In-Line Package (D)
NS Package Number J14A
5
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54AC10 Triple 3-Input NAND Gate
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14 Lead Ceramic Flatpak (F)
NS Package Number W14B
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be reasonably expected to result in a significant injury
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