REGISTRATION PENDING Currently Available as FRM230 (D, R, H) 2N7274D, 2N7274R 2N7274H March 2001 Features Radiation Hardened N-Channel Power MOSFETs Package • 8A, 200V, RDS(on) = 0.50Ω TO-204AA • Second Generation Rad Hard MOSFET Results From New Design Concepts • Gamma • Gamma Dot • Photo Current • Neutron • Single Event - Meets Pre-Rad Specifications to 100KRAD(Si) Defined End Point Specs at 300KRAD(Si) and 1000KRAD(Si) Performance Permits Limited Use to 3000KRAD(Si) Survives 3E9RAD(Si)/sec at 80% BVDSS Typically Survives 2E12 Typically If Current Limited to IDM - 3.0nA Per-RAD(Si)/sec Typically Pre-RAD Specifications for 1E13 Neutrons/cm2 Usable to 1E14 Neutrons/cm2 Typically Survives 1E5ions/cm2 Having an LET ≤ 35MeV/mg/cm2 and a Range ≥ 30µm at 80% BVDSS Symbol Description The Harris Semiconductor Sector has designed a series of SECOND GENERATION hardened power MOSFETs of both N and P channel enhancement types with ratings from 100V to 500V, 1A to 60A, and on resistance as low as 25mΩ. Total dose hardness is offered at 100K RAD(Si) and 1000KRAD(Si) with neutron hardness ranging from 1E13n/cm2 for 500V product to 1E14n/cm2 for 100V product. Dose rate hardness (GAMMA DOT) exists for rates to 1E9 without current limiting and 2E12 with current limiting. Heavy ion survival from signal event drain burn-out exists for linear energy transfer (LET) of 35 at 80% of rated voltage. D G This MOSFET is an enhancement-mode silicon-gate power field effect transistor of the vertical DMOS (VDMOS) structure. It is specially designed and processed to exhibit minimal characteristic changes to total dose (GAMMA) and neutron (no) exposures. Design and processing efforts are also directed to enhance survival to heavy ion (SEE) and/or dose rate (GAMMA DOT) exposure. S This part may be supplied as a die or in various packages other than shown above. Reliability screening is available as either non TX (commercial), TX equivalent of MIL-S-19500, TXV equivalent of MIL-S-19500, or space equivalent of MIL-S19500. Contact the Harris Semiconductor High-Reliability Marketing group for any desired deviations from the data sheet. Absolute Maximum Ratings (TC = +25oC) Unless Otherwise Specified Drain-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain-Gate Voltage (RGS = 20kΩ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = +100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT TC = +100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT Derated Above +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inductive Current, Clamped, L = 100µH, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . . . . . . ILM Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IS Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Operating And Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJC, TSTG Lead Temperature (During Soldering) Distance > 0.063 in. (1.6mm) From Case, 10s Max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL ©2001 Fairchild Semiconductor Corporation 2N7274D, R, H 200 200 UNITS V V 8 5 24 ±20 A A A V 75 30 0.60 24 8 24 -55 to +150 W W W/oC A A A oC 300 oC 2N7274D, 2N7274R, 2N7274H Rev. A Specifications 2N7274D, 2N7274R, 2N7274H - Registration Pending Pre-Radiation Electrical Specifications TC = +25oC, Unless Otherwise Specified LIMITS PARAMETER SYMBOL TEST CONDITIONS MIN MAX UNITS Drain-Source Breakdown Volts BVDSS VGS = 0, ID = 1mA 200 - V Gate-Threshold Volts VGS(th) VDS = VGS, ID = 1mA 2.0 4.0 V Gate-Body Leakage Forward IGSSF VGS = +20V - 100 nA Gate-Body Leakage Reverse IGSSR VGS = -20V - 100 nA Zero-Gate Voltage Drain Current IDSS1 IDSS2 IDSS3 VDS = 200V, VGS = 0 VDS = 160V, VGS = 0 VDS = 160V, VGS = 0, TC = +125oC - 1 0.025 0.25 mA Time = 20µs - 24 A Rated Avalanche Current IAR Drain-Source On-State Volts VDS(on) VGS = 10V, ID = 8A - 4.20 V Drain-Source On Resistance RDS(on) VGS = 10V, ID = 5A - .50 Ω td(on) VDD = 100V, ID = 8A - 30 Pulse Width = 3µs - 130 Period = 300µs, Rg = 25Ω - 150 0 ≤ VGS ≤ 10 (See Test Circuit) - 80 Turn-On Delay Time Rise Time tr ns Turn-Off Delay Time td(off) Fall Time tf Gate-Charge Threshold QG(th) 1 4 Gate-Charge On State QG(on) 15 60 30 120 3 14 VDD = 100V, ID = 8A IGS1 = IGS2 0 ≤ VGS ≤ 20 nc Gate-Charge Total QGM Plateau Voltage VGP Gate-Charge Source QGS 3 14 Gate-Charge Drain QGD 7 29 Diode Forward Voltage VSD 0.6 1.8 V Reverse Recovery Time TT - 600 ns - 1.67 - 60 V nc Junction-To-Case Rθjc Junction-To-Ambient Rθja ID = 8A, VGD = 0 I = 8A; di/dt = 100A/µs oC/W Free Air Operation VDD E1 = 0.5 BVDSS VC = 0.75 BVDSS RL L V1 VDS E1 DUT VC Rg 0.06Ω IL FIGURE 1. SWITCHING TIME TESTING ©2001 Fairchild Semiconductor Corporation FIGURE 2. CLAMPED INDUCTIVE SWITCHING, ILM 2N7274D, 2N7274R, 2N7274H Rev. A 2N7274D, 2N7274R, 2N7274H - Registration Pending Post-Radiation Electrical Specifications TC = +25oC, Unless Otherwise Specified LIMITS PARAMETER Drain-Source Breakdown Volts Gate-Source Threshold Volts Gate-Body Leakage Forward Gate-Body Leakage Reverse Zero-Gate Voltage Drain CurrenT Drain-Source On-state Volts Drain-Source On Resistance SYMBOL TYPE (Note 4, 6) BVDSS 2N7274D, R (Note 5, 6) BVDSS (Note 4, 6) (Note 3, 5, 6) TEST CONDITIONS MIN MAX UNITS VGS = 0, ID = 1mA 200 - V 2N7274H VGS = 0, ID = 1mA 190 - V VGS(th) 2N7274D, R VGS = VDS, ID = 1mA 2.0 4.0 V VGS(th) 2N7274H VGS = VDS, ID = 1mA 1.5 4.5 V (Note 4, 6) IGSSF 2N7274D, R VGS = 20V, VDS = 0 - 100 nA (Note 5, 6) IGSSF 2N7274H VGS = 20V, VDS = 0 - 200 nA (Note 2, 4, 6) IGSSR 2N7274D, R VGS = -20V, VDS = 0 - 100 nA (Note 2, 5, 6) IGSSR 2N7274H VGS = -20V, VDS = 0 - 200 nA (Note 4, 6) IDSS 2N7274D, R VGS = 0, VDS = 160V - 25 µA (Note 5, 6) IDSS 2N7274H VGS = 0, VDS = 160V - 100 µA (Note 1, 4, 6) VDS(on) 2N7274D, R VGS = 10V, ID = 8A - 4.20 V (Note 1, 5, 6) VDS(on) 2N7274H VGS = 16V, ID = 8A - 6.30 V (Note 1, 4, 6) RDS(on) 2N7274D, R VGS = 10V, ID = 5A - 0.500 Ω (Note 1, 5, 6) RDS(on) 2N7274H VGS = 14V, ID = 5A - 0.750 Ω NOTES: 1. Pulse test, 300µs max 2. Absolute value 3. Gamma = 300KRAD(Si) 4. Gamma = 10KRAD(Si) for “D”, 100KRAD(Si) for “R”. Neutron = 1E13 5. Gamma = 1000KRAD(Si). Neutron = 1E13 6. Insitu Gamma bias must be sampled for both VGS = +10V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS 7. Gamma data taken 3/03/90 on TA17632 devices by GE ASTRO SPACE; EMC/SURVIVABILITY LABORATORY; KING OF PRUSSIA, PA 19401 8. Single event drain burnout testing by Titus, J.L., et al of NWSC, Crane, IN at Brookhaven Nat. Lab. Dec 11-14, 1989 9. Neutron derivation, HARRIS Application note AN-8831, Oct. 1988 ©2001 Fairchild Semiconductor Corporation 2N7274D, 2N7274R, 2N7274H Rev. A 2N7274D, 2N7274R, 2N7274H - Registration Pending Typical Performance Characteristics ©2001 Fairchild Semiconductor Corporation 2N7274D, 2N7274R, 2N7274H Rev. A 2N7274D, 2N7274R, 2N7274H - Registration Pending Packaging SEATING PLANE TO-204AA R1 ØP JEDEC TO-204AA HERMETIC STEEL PACKAGE TERM. 3 s Øb R ØD q A1 2 1 Øb1 e A L e1 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-204AA outline dated 11-82. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of seating plane. 5. Controlling dimension: Inch. 6. Revision 1 dated 1-93. ©2001 Fairchild Semiconductor Corporation INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.310 0.330 7.88 8.38 - A1 0.060 0.065 1.53 1.65 - Øb 0.038 0.042 0.97 1.06 2, 3 Øb1 0.138 0.145 3.51 3.68 - ØD - 0.800 - 20.32 - e 0.215 TYP 5.46 TYP 4 e1 0.430 BSC 10.92 BSC 4 L 0.440 0.460 11.18 11.68 ØP 0.155 0.160 3.94 4.06 q R 1.187 BSC 0.495 0.525 30.15 BSC 12.58 13.33 - R1 0.131 0.185 3.33 4.69 - s 0.655 0.675 16.64 17.14 - 2N7274D, 2N7274R, 2N7274H Rev. A ©2001 Fairchild Semiconductor Corporation 2N7274D, 2N7274R, 2N7274H Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ Star* Power™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H1