NSC 54ABT541

54ABT541
Octal Buffer/Line Driver with TRI-STATE ® Outputs
General Description
The ’ABT541 is an octal buffer and line driver with
TRI-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus-oriented transmitter/
receiver. The ’ABT541 is similar to the ’ABT244 with broadside pinout.
Features
n Guaranteed latchup protection
n High impedance glitch free bus loading during entire
power up and power down cycle
n Nondestructive hot insertion capability
n Flow-through pinout for ease of PC board layout
n Disable time less than enable time to avoid bus
contention
n Standard Microcircuit Drawing (SMD) 5962-9471801
n Non-inverting buffers
n Output sink capability of 48 mA, source capability of
24 mA
Ordering Code
Military
Package
Package Description
Number
54ABT541J-QML
J20A
20-Lead Ceramic Dual-In-Line
54ABT541W-QML
W20A
20-Lead Cerpack
54ABT541E-QML
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
Connection Diagram
Pin Names
Pin Assignment
DIP and Cerpack
Description
OE1, OE2
Output Enable Input (Active Low)
I0–I7
Inputs
O0–O7
Outputs
Truth Table
Inputs
DS100217-1
Pin Assignment
LCC
Outputs
OE1
OE2
I
ABT541
L
L
H
H
H
X
X
Z
X
H
X
Z
L
L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
DS100217-30
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100217
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54ABT541 Octal Buffer/Line Driver with TRI-STATE Outputs
August 1998
Absolute Maximum Ratings (Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
Ceramic
VCC Pin Potential to
Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Any Output
in the Disabled or
Power-Off State
in the HIGH State
Current Applied to Output
in LOW State (Max)
DC Latchup Source Current
Over Voltage Latchup (I/O)
−65˚C to +150˚C
−55˚C to +125˚C
twice the rated IOL (mA)
−500 mA
10V
Recommended Operating
Conditions
−55˚C to +175˚C
−0.5V to +7.0V
−0.5V to +7.0V
−30 mA to +5.0 mA
Free Air Ambient Temperature
Military
Supply Voltage
Military
Minimum Input Edge Rate
Data Input
Enable Input
−0.5V to 5.5V
−0.5V to VCC
−55˚C to +125˚C
+4.5V to +5.5V
(∆V/∆t)
50 mV/ns
20 mV/ns
DC Electrical Characteristics
Symbol
Parameter
ABT541
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCD
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
IIH
Input HIGH Current
Typ
Units
VCC
2.0
V
0.8
V
−1.2
V
Recognized HIGH Signal
Min
Recognized LOW Signal
IIN = −18 mA
IOH = −3 mA
54ABT
2.5
V
Min
54ABT
2.0
V
Min
0.55
V
Min
5
µA
Max
7
µA
Max
−5
µA
Max
VIN = 0.5V (Note 4)
V
0.0
VIN = 0.0V
IID = 1.9 µA
µA
0 − 5.5V
54ABT
5
IBVI
Conditions
Max
Input HIGH Current
IOH = −24 mA
IOL = 48 mA
VIN = 2.7V (Note 4)
VIN = VCC
VIN = 7.0V
Breakdown Test
IIL
Input LOW Current
−5
VID
Input Leakage Test
IOZH
Output Leakage Current
IOZL
Output Leakage Current
IOS
Output Short-Circuit Current
ICEX
IZZ
4.75
50
All Other Pins Grounded
VOUT = 2.7V; OEn = 2.0V
−50
µA
0 − 5.5V
−275
mA
Max
Output High Leakage Current
50
µA
Max
Bus Drainage Test
100
µA
0.0
VOUT = 0.5V; OEn = 2.0V
VOUT = 0.0V
VOUT = VCC
VOUT = 5.5V; All Others GND
ICCH
Power Supply Current
50
µA
Max
All Outputs HIGH
ICCL
Power Supply Current
30
mA
Max
ICCZ
Power Supply Current
50
µA
Max
All Outputs LOW
OEn = VCC;
ICCT
Additional ICC/Input
Outputs Enabled
2.5
mA
Outputs TRI-STATE
2.5
mA
Outputs TRI-STATE
50
µA
ICCD
Dynamic ICC
−100
No Load
mA/
(Note 4)
0.1
MHz
All Others at VCC or Ground
VI = VCC − 2.1V
Max
Max
Enable Input VI = VCC − 2.1V
Data Input VI = VCC − 2.1V;
All Others at VCC or Ground
Outputs Open, OEn = GND,
One Bit Toggling (Note 3),
50% Duty Cycle
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions
is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Note 3: For 8 bits toggling, ICCD < 0.8 mA/MHz.
Note 4: Guaranteed, but not tested.
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2
DC Electrical Characteristics
Symbol
Parameter
Min
Max
Units
VCC
VOLP
Quiet Output Maximum Dynamic VOL
1.0
V
5.0
VOLV
Quiet Output Minimum Dynamic VOL
-1.45
V
5.0
Conditions
CL = 50 pF, RL = 500Ω
TA = 25˚C (Note 5)
TA = 25˚C (Note 5)
Note 5: Max number of outputs defined as (n). n − 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
AC Electrical Characteristics
Symbol
54ABT
TA = −55˚C to +125˚C
VCC = 4.5V–5.5V
Parameter
Units
CL = 50 pF
Min
Max
tPLH
Propagation Delay
1.0
5.0
tPHL
Data to Outputs
1.0
5.3
tPZH
Output Enable Time
tPZL
tPHZ
Output Disable Time
tPLZ
1.1
7.2
1.5
7.9
1.5
7.5
1.5
7.9
ns
ns
ns
Capacitance
Symbol
Parameter
Typ
Units
Conditions
TA = 25˚C
VCC = 0.0V
VCC = 5.0V
CIN
Input Capacitance
5.0
pF
COUT (Note 6)
Output Capacitance
9.0
pF
Note 6: COUT is measured at frequency of f = 1 MHz, per MIL-STD-883B, Method 3012.
3
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Capacitance
(Continued)
tPLH vs Temperature (TA)
CL = 50 pF, 1 Output Switching
tPHL vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100217-11
tPLH vs Load Capacitance
1 Output Switching, TA = 25˚C
DS100217-12
tPHL vs Load Capacitance
1 Output Switching, TA = 25˚C
DS100217-13
tPLH vs Load Capacitance
8 Outputs Switching, TA = 25˚C
DS100217-14
tPHL vs Load Capacitance
8 Outputs Switching, TA = 25˚C
DS100217-15
DS100217-16
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
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4
Capacitance
(Continued)
tPZL vs Temperature (TA)
CL = 50 pF, 1 Output Switching
tPLZ vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100217-17
tPZL vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
DS100217-18
tPLZ vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
DS100217-19
tPZH vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100217-20
tPHZ vs Temperature (TA)
CL = 50 pF, 1 Output Switching
DS100217-21
DS100217-22
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
5
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Capacitance
(Continued)
tPZH vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
tPHZ vs Temperature (TA)
CL = 50 pF, 8 Outputs Switching
DS100217-23
tPZH vs Load Capacitance
8 Outputs Switching, TA = 25˚C
DS100217-24
tPZL vs Load Capacitance
8 Outputs Switching, TA = 25˚C
DS100217-25
tPLH and tPHL vs Number Outputs Switching
VCC = 5.0V, TA = 25˚C, CL = 50 pF
DS100217-26
ICC vs Frequency,
Average, TA = 25˚C,
All Outputs Unloaded/Unterminated
DS100217-27
DS100217-28
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
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6
AC Loading
DS100217-3
DS100217-4
FIGURE 2. Test Input Signal Levels
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
Amplitude
Rep. Rate
tw
tr
tf
3.0V
1 MHz
500 ns
2.5 ns
2.5 ns
FIGURE 3. Test Input Signal Requirements
AC Waveforms
DS100217-5
DS100217-7
FIGURE 4. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
FIGURE 5. TRI-STATE Output HIGH and LOW
Enable and Disable Time
7
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8
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Terminal Ceramic Chip Carrier
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package
NS Package Number J20A
9
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54ABT541 Octal Buffer/Line Driver with TRI-STATE Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Ceramic Flatpack
NS Package Number W20A
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1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into
sonably expected to cause the failure of the life support
the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness.
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
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