FINAL Am27C010 1 Megabit (131,072 x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS ■ Fast access time ■ Latch-up protected to 100 mA from –1 V to VCC + 1 V — 45 ns maximum access time ■ High noise immunity ■ Low power consumption ■ Versatile features for simple interfacing — 20 µA typical CMOS standby current — Both CMOS and TTL input/output compatibility ■ JEDEC-approved pinout ■ Single +5 V power supply — Two line control functions ■ ±10% power supply tolerance available ■ 100% Flashrite™ programming — Typical programming time of 16 seconds ■ Compact 32-pin DIP, PDIP, TSOP, PLCC packages GENERAL DESCRIPTION The Am27C010 is a 1 Megabit ultraviolet erasable programmable read-only memory. It is organized as 128K words by 8 bits per word, operates from a single +5 V supply, has a static standby mode, and features fast single address location programming. Products are available in windowed ceramic DIP packages as well as plastic one time programmable (OTP) PDIP, TSOP, and PLCC packages. Typically, any byte can be accessed in less than 45 ns, allowing high-performance microprocessors to operate without wait states. The Am27C010 offers separate Output Enable (OE) and Chip Enable (CE) controls, thus eliminating bus contention in a multiple bus microprocessor system. AMD’s CMOS process technology provides high speed, low power, and high noise immunity. Typical power consumption is only 100 mW in active mode, and 100 µW in standby mode. All signals are TTL levels, including programming signals. Bit locations may be programmed singly, in blocks, or at random. The Am27C010 supports AMD’s Flashrite programming algorithm (100 µs pulses) resulting in a typical programming time of 16 seconds. BLOCK DIAGRAM VCC VSS VPP OE CE PGM A0–A16 Address Inputs Data Outputs DQ0–DQ7 Output Enable Chip Enable and Prog Logic Output Buffers Y Decoder Y Gating X Decoder 1,048,576 Bit Cell Matrix 10205F-1 Publication# 10205 Rev: F Amendment/+2 Issue Date: August 1997 PRODUCT SELECTOR GUIDE Family Part No: Am27C010 Ordering Part No: VCC = 5.0 V ± 5% -45 VCC = 5.0 V ± 10% -255 -45 -55 -70 -90 -120 -150 -200 Max Access Time (ns) 45 55 70 90 120 150 200 250 CE (E) Access (ns) 45 55 70 90 120 150 200 250 OE (G) Access (ns) 25 35 35 40 50 65 75 75 CONNECTION DIAGRAMS Top View 3 30 NC A12 4 29 A14 A7 A6 5 28 6 27 4 3 2 1 32 31 30 NC PGM (P) A15 PGM (P) VCC 31 VPP 32 2 A16 1 A15 VPP A16 VCC PLCC A12 PDIP A13 A7 5 29 A14 A8 A6 6 28 A13 A5 7 26 A9 A5 7 27 A8 A4 8 25 A11 A4 8 26 A9 A3 9 24 OE (G) A3 9 25 A11 A2 10 23 A10 A2 10 24 OE (G) A1 11 22 CE (E) A1 11 23 A10 A0 12 21 DQ7 A0 12 22 CE (E) DQ0 13 20 DQ6 DQ0 13 21 DQ7 DQ1 14 19 DQ5 DQ2 15 18 DQ4 VSS 16 17 DQ3 DQ6 DQ5 DQ4 VSS DQ3 DQ2 10205F-2 DQ1 14 15 16 17 18 19 20 10205F-3 Notes: 1. JEDEC nomenclature is in parenthesis. 2. The 32-pin DIP to 32-pin PLCC configuration varies from the JEDEC 28-pin DIP to 32-pin PLCC configuration. TSOP A11 A9 A8 A13 A14 NC PGM VCC VPP A16 A15 A12 A7 A6 A5 A4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Standard Pinout 2 Am27C010 OE A10 CE DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0 A0 A1 A2 A3 10205F-4 PIN DESIGNATIONS A0–A16 = Address Inputs CE (E) = Chip Enable Input DQ0–DQ7 = Data Input/Outputs OE (G) = Output Enable Input PGM (P) = Program Enable Input VCC = VCC Supply Voltage VPP = Program Voltage Input VSS = Ground LOGIC SYMBOL 17 A0–A16 DQ0–DQ7 8 CE (E) PGM (P) OE (G) 10205F-5 Am27C010 3 ORDERING INFORMATION UV EPROM Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: AM27C010 -45 D C 5 B OPTIONAL PROCESSING Blank = Standard Processing B = Burn-In VOLTAGE TOLERANCE 5 = VCC ± 5%, 45 ns only See Product Selector Guide and Valid Combinations TEMPERATURE RANGE C = Commercial (0°C to +70°C) I = Industrial (–40°C to +85°C) E = Extended (–55°C to +125°C) PACKAGE TYPE D = 32-Pin Ceramic DIP (CDV032) SPEED OPTION See Product Selector Guide and Valid Combinations DEVICE NUMBER/DESCRIPTION Am27C010 1 Megabit (128K x 8-Bit) CMOS UV EPROM Valid Combinations Valid Combinations AM27C010-45 VCC = 5.0 V ± 5% Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. DC5, DC5B, DI5, DI5B AM27C010-45 VCC = 5.0 V ± 10% AM27C010-55 DC, DCB, DI, DIB AM27C010-70 AM27C010-90 AM27C010-120 AM27C010-150 DC, DCB, DE, DEB, DI, DIB AM27C010-200 AM27C010-255 VCC = 5.0 V ± 5% 4 DC, DCB, DI, DIB Am27C010 ORDERING INFORMATION OTP EPROM Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: AM27C010 -45 J 5 C OPTIONAL PROCESSING Blank = Standard Processing VOLTAGE TOLERANCE 5 = VCC ± 5%, -45 ns only See Product Selector Guide and Valid Combinations TEMPERATURE RANGE C = Commercial (0°C to +70°C) I = Industrial (–40°C to +85°C) PACKAGE TYPE P = 32-Pin Plastic DIP (PD 032) J = 32-Pin Rectangular Plastic Leaded Chip Carrier (PL 032) E = 32-Pin Thin Small Outline Package (TSOP) Standard Pinout (TS 032) SPEED OPTION See Product Selector Guide and Valid Combinations DEVICE NUMBER/DESCRIPTION Am27C010 1 Megabit (128K x 8-Bit) CMOS OTP EPROM Valid Combinations Valid Combinations AM27C010-45 VCC = 5.0 V ± 5% PC5, PI5, JC5, JI5, EC5, EI5 AM27C010-45 VCC = 5.0 V ± 10% Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. AM27C010-55 AM27C010-70 AM27C010-90 PC, PI, JC, JI, EC, EI AM27C010-120 AM27C010-150 AM27C010-200 AM27C010-255 VCC = 5.0 V ± 5% Am27C010 5 FUNCTIONAL DESCRIPTION Erasing the Am27C010 In order to clear all locations of their programmed contents, it is necessary to expose the Am27C010 to an ultraviolet light source. A dosage of 15 W seconds/ cm2 is required to completely erase an Am27C010. This dosage can be obtained by exposure to an ultraviolet lamp — wavelength of 2537 Å — with intensity o f 1 2 , 0 0 0 µ W / c m 2 fo r 1 5 t o 2 0 m i nu t e s. T h e Am27C010 should be directly under and about one inch from the source and all filters should be removed from the UV light source prior to erasure. It is important to note that the Am27C010, and similar devices, will erase with light sources having wavelengths shorter than 4000 Å. Although erasure times will be much longer than with UV sources at 2537Å, exposure to fluorescent light and sunlight will eventually erase the Am27C010 and exposure to them should be prevented to realize maximum system reliability. If used in such an environment, the package window should be covered by an opaque label or substance. Programming the Am27C010 Upon delivery, or after each erasure, the Am27C010 has all 1,048,576 bits in the “ONE”, or HIGH state. “ZEROs” are loaded into the Am27C010 through the procedure of programming. The programming mode is entered when 12.75 V ± 0.25V is applied to the VPP pin, CE and PGM are at VIL and OE is at VIH. For programming, the data to be programmed is applied 8 bits in parallel to the data output pins. The Flashrite algorithm reduces programming time by using 100 µs programming pulse and by giving each address only as many pulses as are necessary in order to reliably program the data. After each pulse is applied to a given address, the data in that address is verified. If the data does not verify, additional pulses are given until it verifies or the maximum is reached. This process is repeated while sequencing through each address of the Am27C010. This part of the algorithm is done at VCC = 6.25 V to assure that each EPROM bit is programmed to a sufficiently high threshold voltage. After the final address is completed, the entire EPROM memory is verified at VCC = VPP = 5.25 V. Please refer to Section 6 for programming flow chart and characteristics. Program Inhibit Programming of multiple Am27C010s in parallel with different data is also easily accomplished. Except for CE, all like inputs of the parallel Am27C010 may be common. A TTL low-level program pulse applied to an 6 Am27C010 CE input and VPP = 12.75 V ± 0.25 V, PGM LOW, and OE HIGH will program that Am27C010. A high-level CE input inhibits the other Am27C020s from being programmed. Program Verify A verify should be performed on the programmed bits to determine that they were correctly programmed. The verify should be performed with OE and CE at VIL, PGM at VIH, and VPP between 12.5 V and 13.0 V. Auto Select Mode The auto select mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the Am27C010. To activate this mode, the programming equipment must force 12.0 V ± 0.5 V on address line A9 of the Am27C010. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during auto select mode. Byte 0 (A0 = VIL) represents the manufacturer code, and byte 1 (A0 = VIH), the device identifier code. For the Am27C010, these two identifier bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (DQ7) defined as the parity bit. Read Mode The Am27C010 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs tOE after the falling edge of OE, assuming that CE has been LOW and addresses have been stable for at least tACC – tOE. Standby Mode The Am27C010 has a CMOS standby mode which reduces the maximum VCC current to 100 µA. It is placed in CMOS-standby when CE is at V CC ± 0.3 V. The Am27C010 also has a TTL-standby mode which reduces the maximum VCC current to 1.0 mA. It is placed in TTL-standby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input. Am27C010 Output OR-Tieing System Applications To accommodate multiple memory connections, a two-line control function is provided to allow for: During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 µF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and VSS to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be used between VCC and VSS for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array. ■ Low memory power dissipation ■ Assurance that output bus contention will not occur It is recommended that CE be decoded and used as the primary device-selecting function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the outut pins are only active when data is desired from a particular memory device. MODE SELECT TABLE Pins CE OE PGM A0 A9 VPP Outputs VIL VIL X X X X DOUT Output Disable X VIH X X X X High-Z Standby (TTL) VIH X X X X X High-Z VCC ± 0.3 V X X X X X High-Z Program VIL VIH VIL X X VPP DIN Program Verify VIL VIL VIH X X VPP DOUT Program Inhibit VIH X X X X VPP High-Z Manufacturer Code VIL VIL X VIL VH X 01H Device Code VIL VIL X VIH VH X 0E Mode Read Standby (CMOS) Auto Select (Note 3) Notes: 1. VH = 12.0 V ± 0.5 V. 2. X = Either VIH or VIL. 3. A1–A8 = A10–A16 = VIL. 4. See DC Programming Characteristics for VPP voltage during programming. Am27C010 7 ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage Temperature Commercial (C) Devices OTP Products . . . . . . . . . . . . . . . . –65°C to +125°C Ambient Temperature (TA). . . . . . . . . . . .0°C to +70°C All Other Products. . . . . . . . . . . . . –65°C to +150°C Industrial (I) Devices Ambient Temperature with Power Applied. . . . . . . . . . . . . .–55°C to + 125°C Ambient Temperature (TA). . . . . . . . . .–40°C to +85°C Voltage with Respect to VSS Ambient Temperature (TA). . . . . . . . .–55°C to +125°C All pins except A9, VPP, VCC . . –0.6 V to VCC +0.5 V Extended (E) Devices Supply Read Voltages A9 and VPP (Note 2). . . . . . . . . . . . . –0.6 V to +13.5 V VCC for Am27C010-45, 255 . . . . . +4.75 V to +5.25 V VCC (Note 1). . . . . . . . . . . . . . . . . . . . –0.6 V to +7.0 V VCC for Am27C010-45, 55, 70, 90, 120, 150, 200 . . . . . . . . . . . . . +4.50 V to +5.50 V Notes: 1. Minimum DC voltage on input or I/O pins is –0.5 V. During voltage transitions, inputs may overshoot VSS to –2.0 V for periods of up to 20 ns. Maximum DC voltage on input and I/O pins is VCC + 0.5 V. During voltage transitions, input and I/O pins may overshoot to VCC + 2.0 V for periods up to 20ns. Operating ranges define those limits between which the functionality of the device is guaranteed. 2. Minimum DC input voltage on A9 pin is –0.5 V. During voltage transitions, A9 and VPP may overshoot VSS to –2.0 V for periods of up to 20 ns. A9 and VCC must not exceed +13.5 V at any time. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability. 8 Am27C010 DC CHARACTERISTICS over operating ranges unless otherwise specified (Notes 1, 2, axnd 4) Parameter Symbol Parameter Description Test Conditions VOH Output HIGH Voltage IOH = –400 µA VOL Output LOW Voltage IOL = 2.1 mA VIH Input HIGH Voltage VIL Input LOW Voltage ILI Input Load Current ILO Min Max 2.4 Unit V 0.45 V 2.0 VCC + 0.5 V –0.5 +0.8 V VIN = 0 V to VCC 1.0 µA Output Leakage Current VOUT = 0 V to VCC 5.0 µA ICC1 VCC Active Current (Note 3) CE = VIL, f = 10 MHz, IOUT = 0 mA ICC2 VCC TTL Standby Current CE = VIH 1.0 mA ICC3 VCC CMOS Standby Current CE = VCC ± 0.3 V 100 µA IPP1 VPP Current During Reading CE = OE = VIL, VPP = VCC 100 µA C/I Devices 30 E Devices 60 mA Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. Caution: The Am27C010 must not be removed from (or inserted into) a socket when VCC or VPP is applied. 3. ICC1 is tested with OE = VIH to simulate open outputs. 30 30 25 25 Supply Current in mA Supply Current in mA 4. Minimum DC Input Voltage is –0.5 V. During transitions, the inputs may overshoot to –2.0 V for periods less than 20 ns. Maximum DC Voltage on output pins is VCC + 0.5 V, which may overshoot to VCC + 2.0 V for periods less than 20 ns. 20 15 10 1 2 3 4 5 6 7 Frequency in MHz 8 9 10 20 15 10 –75 –50 –25 0 25 50 75 100 125 150 Temperature in °C 10205F-7 10205F-6 Figure 2. Typical Supply Current vs. Temperature VCC = 5.5 V, f = MHz Figure 1. Typical Supply Current vs. Frequency VCC = 5.5 V, T = 25°C Am27C010 9 CAPACITANCE Parameter Symbol Parameter Description Test Conditions CDV032 PL 032 PD 032 TS 032 Typ Max Typ Max Typ Max Typ Max Unit CIN Input Capacitance VIN = 0 9 12 8 12 8 12 10 12 pF COUT Output Capacitance VOUT = 0 13 15 11 14 11 14 12 14 pF Notes: 1. This parameter is only sampled and not 100% tested. 2. TA = +25°C, f = 1 MHz. AC CHARACTERISTICS Parameter Symbols Parameter Description Test Conditions JEDEC Standard tAVQV tACC Address to Output Delay CE, OE = VIL tELQV tCE Chip Enable to Output Delay tGLQV tOE Output Enable to Output Delay tEHQZ tGHQZ tDF (Note 3) tAXQX tOH Am27C010 -45 -55 -70 -90 -120 -150 -200 -255 Unit Max 45 55 70 90 120 150 200 250 ns OE = VIL Max 45 55 70 90 120 150 200 250 ns CE = VIL Max 25 35 35 40 50 65 75 75 ns Chip Enable High or Output Enable High to Output Float, Whichever Occurs First Max 25 25 25 25 35 35 40 40 ns Output Hold from Addresses, CE, or OE, Whichever Occurs First Min 0 0 0 0 0 0 0 0 ns Notes: 1. Caution: Do not remove the Am27C010 from (or insert it into) a socket or board that has VPP or VCC applied. 2. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 3. This parameter is sampled and not 100% tested. 4. Switching characteristics are over operating range, unless otherwise specified. 5. Test Conditions for Am27C010-45 and -55: Output Load: 1 TTL gate and CL = 30 pF Input rise and fall times: 20 ns Input pulse levels: 0.0 V to 3.0 V Timing measurement reference level Inputs and Outputs: 1.5 V Test Conditions for all others: Output Load: 1 TTL gate and CL = 100 pF Input rise and fall times: 20 ns Input pulse levels: 0.45 V to 2.4 V Timing measurement reference level Inputs and Outputs: 0.8 and 2.0 V 10 Am27C010 SWITCHING TEST CIRCUIT 5.0 V IN3064 or Equivalent Device Under Test CL 2.7 kΩ 6.2 kΩ Diodes = IN3064 or Equivalent Notes: For -45 and -55: CL = 30 pF including jig capacitance For all others: CL = 100 pF including jig capacitance 10205F-8 Figure 1. Test Conditions SWITCHING TEST WAVEFORM 3V 2.4 V 2.0 V 2.0 V Test Points 1.5 V Test Points 1.5 V 0.8 V 0V 0.8 V 0.45 V Input Output Input AC Testing for -45 and -55 devices: Inputs are driven at 3.0 V for a logic “1” and 0 V for a logic “0”. Input pulse rise and fall times are ≤20 ns. Output AC Testing (except for -45 and -55 devices): Inputs are driven at 2.4 V for a logic “1” and 0.45 V for a logic “0”. Input pulse rise and fall times are ≤20 ns. 10205F-9 Am27C010 11 REVISION SUMMARY FOR AM27C010 Operating Ranges: Distinctive Characteristics: Changed Supply Read Voltages listings to match those in the Product Selector Guide. The fastest speed grade available is now 45 ns. AC Characteristics: Product Selector Guide: Added column for 45 ns speed grade, rearranged notes, moved text from table title to Note 4, renamed table. Added 45 ns column. The VCC operating range for the 55 ns speed grade changed from ±5% to ±10%. The part number designation remains the same (-55). Switching Test Circuit: Added 45 ns to the CL note on 30 pF test condition. Ordering Information, UV EPROM Products: Switching Test Waveform: The 45 ns part number is now listed in the example. The nomenclature now has a method of clearly designating the voltage operating range and speed grade. Added the 3 V test waveform. Valid Combinations: The 45 ns and 55 ns speed grades are now also available in the industrial temperature range and can be burned in. Introduction: This amendment will be available through the Web in addition to, not instead of, the literature ordering hotline. Switching Test Waveform: The caption now reads “... Inputs are driven at ... 0 V for a logic “0”...”. Ordering Information, OTP EPROM Products: Changed the part number example from -55 to -45. The nomenclature now has a method of clearly designating the voltage operating range and speed grade. Valid Combinations: Added the 45 ns and 55 ns speed grades to the table. Trademarks Copyright © 1997 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Flashrite is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 12 Am27C010