ETC AVIIVA

Features
•
•
•
•
•
•
•
•
•
•
•
•
•
High Sensitivity and High SNR Performance Linear CCD
1024, 2048 or 4096 Resolution with 10 µm Square Pixels
512, 1024 or 2048 Resolution with 14 µm Square Pixels
100% Aperture, Built-in Anti-Blooming, No Lag
EIA-644 (LVDS) Data Format (Base Configuration)
High Data Rate up to 60 Mpixels/s
Flexible and Easy to Operate via RS232 Control:
– Gain: 0 dB to 40 dB by Step of 0.05 dB
– Output Format: 8-, 10- or 12-bit Data
– Offset (for Contrast Expansion)
– Trigger Mode: Free Run or External Trigger Modes
– Data Output Mode (Dual, Single)
Multi Camera Synchronization
Single Power Supply: DC 12V to 24V
Very Compact Design: 56 x 60 x 39.4 mm (w, h, l)
High Reliability – CE and FCC Compliant
C or F (Nikon) Mount Adapter (Lens Not Supplied)
T2 (M42 x 0.75) or M42 x 1 Mount Adapter (Lens Not Supplied)
AViiVA™ M2 LV
LVDS
Linescan
Camera
Description
This camera is designed with three concepts in mind: accuracy, versatility and easy
implementation.
•
The same compact mechanical design incorporates all the sensors, from 512 to
4096 pixels.
•
Atmel manages the whole chain, from the sensor to the camera. The result is a
camera able to work up to 12-bit, with dedicated electronics offering an excellent
signal to noise ratio.
•
The programmable settings let the user work at different integration time, gain and
offset. The external clock and trigger allow the user to synchronize several
cameras.
Applications
Performance and reliability of this camera make it well suited for the most demanding
industrial applications, from web inspection to document scanning, from surface
inspection to metrology.
Rev. 2161B–IMAGE–04/03
1
Typical Performances
Table 1. Typical Performances
Parameter
Value
Unit
Sensor Characteristics at Maximum Pixel Rate
Resolution
512
1024
2048
4096
pixels
Pixel size (square)
14
–
14
10
14
10
–
10
µm
µm
Max Line rate
98
53
28
14
kHz
Anti blooming
x 150
–
Radiometric Performances (maximum Pixel Rate, Tamb = 25°C)
Output Format
12 (also configurable in 8 or 10)
bit
Spectral range
250 - 1100
nm
<1
%
Linearity
Gain range
(step of 0.047 dB)
Peak response
(1)(2)
with 14 µm pitch
10 µm pitch
SNR
Effective bit
Gmin
0
Gnom
18
Gmax
30
dB
130
50
1040
400
4180
1600
LSB/(nJ/cm2)
LSB/(nJ/cm2)
67.4
11.2
49
8.2
37
6.2
dB
bit
14
37
pJ/cm2
pJ/cm2
± 3 (± 10 max)
%
56 x 60 x 39.4
mm
C, F, T2, M42 x 1
–
∆x,y = ±50 – ∆z = ±30 – ∆tiltz = 0-35
∆θx,y = ±0.2
µm
°
DC, single 12 to 24V
V
<8
W
0 to 65 (non condensing)
°C
-40 to 75 (non condensing)
°C
Input RMS Noise with 14 µm pitch
10 µm pitch
PRNU (Pixel Response Non Uniformity
Mechanical and Electrical Interface
Size (w x h x l)
Lens mount
Sensor alignment
(See “Sensor Alignment” on page 16)
Power supply
Power dissipation
Operating temperature(3)
Spectral Response
Notes:
2
Relative response (%)
Storage temperature
100%
pixel 10x10 µm
pixel 14x14 µm
80%
60%
40%
20%
0%
200
400
600
800
Wave length (nm)
1000
1. LSB are given for 12-bit configuration
2. nJ/cm² measured on the sensor
3. Camera front face temperature
AViiVA M2 LV
2161B–IMAGE–04/03
AViiVA M2 LV
Camera
Description
Figure 1. Camera Synoptic
Power supplies
DC power
LVDS
transceiver
Even pixels analog chain
PGA, CDS, ADC
12-bit at 30 Mpixels/s
DATA
STROBE,
LVAL
Sequencer
controller
TX
TRIG1,
TRIG2
LVDS I/F
RX
Linear CCD
2 taps
Odd pixels analog chain
PGA, CDS, ADC
12-bit at 30 Mpixels/s
CLOCK_IN
CCD Drivers
Serial line
Microcontroller
The LVDS linescan camera is based on a two-tap linear CCD. Therefore, two analog chains
process odd and even pixel outputs of the linear sensor. The CCD signal processing encompasses the correlated double sampling (CDS), the dark level correction (dark pixel clamping),
the gain (PGA) and offset correction and finally the analog to digital conversion on 12-bit.
Note:
PGA stands for Programmable Gain Array.
The camera is powered by a single DC power supply from 12V to 24V.
The functional interface (data and control) is provided with LVDS transceivers.
The data can be delivered either on two channels or on a single multiplexed channel. The data
format can be configured in 8-, 10- or 12-bit.
The camera can be used with external triggers (TRIG1 and TRIG2 signals) in different trigger
modes (see “Synchronization Mode” on page 6). The camera can be also clocked externally,
allowing system synchronization and/or multi-camera synchronization.
The camera configuration and settings are performed via a serial line.
This interface is used for:
•
Gain, offset setting.
•
Dynamic range, data rate setting.
•
Trigger mode setting: free run or external trigger modes.
•
Integration time setting: in free running and external trigger mode.
3
2161B–IMAGE–04/03
Standard
Conformity
The cameras have been tested in the following conditions:
•
Shielded power supply cable.
•
Shielded and twisted pairs data transfer cable.
•
Linear AC-DC power supply.
Atmel recommends using the same configuration to ensure the compliance with the following
standards.
CE Conformity
AViiVA Cameras comply with the requirements of the EMC (European) directive 89/336/CEE
(EN 50081-2, EN 61000-6-2)
FCC Conformity
AViiVA Cameras comply with Part 15 of FCC rules.
Operation is subject to the following two conditions:
•
This device may not cause harmful interference, and
•
This device must accept any interference received, including interference that may cause
undesired operation.
This equipment has been tested and found to comply with the limits for a Class A digital
device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference
to radio communications. Operation of this equipment in a residential area is likely to cause
harmful interference in which case the user will be required to correct the interference at his
own expense.
Warning: Changes or modifications to this unit not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment.
Camera
Command and
Control
4
Camera configuration is set through the serial interface. Please refer to “Serial Communication” on page 10 for the detailed protocol of the serial line.
AViiVA M2 LV
2161B–IMAGE–04/03
AViiVA M2 LV
Table 2. Camera Command and Control
Setting
Command
Parameter
Configuration record
E=
0
1
Gain(2)
G=
0 to 851
Gain setting from 0 to 40 dB (~0.047dB steps)
A=
0 to 20
Even pixels gain adjustment (odd – even mismatch adjustment)
B=
0 to 20
Odd pixels gain adjustment (odd – even mismatch adjustment)
H=
0
1
2
3
4
5
6
7
8
9
10
Two outputs on external clock
One output (multiplexed) on external clock
Two outputs at 10 MHz data rate
One output (multiplexed) at 20 MHz data rate
Two outputs at 15 MHz data rate
One output (multiplexed) at 30 MHz data rate
Two outputs at 20 MHz data rate
One output (multiplexed) at 40 MHz data rate
Two outputs at 30 MHz data rate
One output (multiplexed) at 60 MHz data rate
(1)
Even Gain(2)
Odd Gain
(2)
Data transfer
Description
The camera configuration is recorded on each change
The camera configuration is recorded only on request (! = 4)
One output (multiplexed) on external clock (data frequency / 2)(6)
Output format(3)
S=
0
1
2
12-bit Output data
10-bit Output data
8-bit Output data
Special 2 x 8-bit mode
Y=
0
1
Standard: All dual output modes use the two data connectors
Special: Dual 2 x 8-bit data output on a single 44-pin connector
Pattern(4)
T=
0
1
Standard
Test pattern
Integration Time
I=
5 to 13000
Trigger mode
M=
1
2
3
4
O=
0 to 15
Even Offset setting from 0 to approx. 200 LSB
P=
0 to 15
Odd Offset setting from 0 to approx. 200 LSB
Special commands
!=
0
1
2
3
4
5
User camera ID
$=
String of Char.
Even data Offset(5)
Odd data Offset
Notes:
(5)
Integration time (µs) in free run or external triggered mode
Free run with integration time setting (see timing diagram)
External trigger with integration time setting (see timing diagram)
Trigger and Integration time controlled
Trigger and integration time controlled by two inputs
Camera identification readout
User camera identification readout
Software version readout
Camera configuration readout
Current camera configuration record
Default camera configuration restoration
Writing and record of the user camera identification
1. ATMEL commends to use E = 1 because of the limited EEPROM write cycles refer on page 10.
2. Camera gain (dB) = G x 0.047. A and B gain value are set in manufacturing but can be adjust if necessary.
3. Corresponding pinout in “Connector Description” on page 11. If 8- or 10-bit are needed, the user can also select “S = 0” and
make the cable for using the MSB.
4. The test pattern is useful to check if the interfacing is well done. The user should see a jagged image of 256 pixels steps.
5. The offset is set in manufacturing to balance both the channels. The initial setting is about 8 (~ 130 LSB). In some cases, the
user may have to change it (for example if the ambient temperature is very high).
6. To be used for multi-camera synchronisation. Refer to Figure 6.
5
2161B–IMAGE–04/03
Timing
Synchronization
Mode
Four different modes may be defined under user control. The TRIG1 and TRIG2 signals may
be used to trigger external events and to control the integration time. The Master clock is
either external or internal clock.
Free Run Mode with
Integration Time
Setting
The integration and readout periods start automatically and immediately after the previous
period. The read-out time depends on pixel number and pixel rate.
Table 3. Free Run Mode with Integration Time Setting
Label
Description
Min
Typ
Max
–
13 ms
ti
Integration time duration
(1)
tg
Consecutive integration period gap (at maximum
frequency)
–
6 µs
–
tt
Integration period stop to read-out start delay
–
1 µs
–
Note:
1. The integration time is set by the serial line and should be higher than the read-out time
(otherwise it is adjusted to the readout time).
Figure 2. Timing Diagram
tt
Readout N
Readout N-1
Integration N
Integration N+1
tg
ti
Triggered Mode with
Integration Time
Setting
The integration period starts immediately after the rising edge of TRIG1 input signal. The Integration time is set by the serial line. This integration period is immediately followed by a
readout period. The read-out time depends on pixel number and the pixel rate.
Table 4. Triggered Mode with Integration Time Setting
Label
Description
Min
Typ
Max
ti
Integration time duration
5 µs
–
13 ms
td
TRIG1 rising to integration period start delay
–
5.5 µs
–
tt
Integration period stop to read-out start delay
–
1 µs
–
ts
Integration period stop to TRIG1 rising set-up time
4 µs
–
–
th
TRIG1 hold time (pulse high duration)
1 µs
–
–
Figure 3. Timing Diagram
ti
ts
td
th
tt
TRIG1
Integration N
Integration N+1
Readout N
6
AViiVA M2 LV
2161B–IMAGE–04/03
AViiVA M2 LV
Trigger and
Integration Time
Controlled by One
Input
The integration period starts immediately after the falling edge of TRIG1 input signal, stops
immediately after the rising edge of TRIG1 input signal, and is immediately followed by a readout period. The read-out time depends on pixel number and pixel rate.
Table 5. Trigger and Integration Time Controlled by One Input
Label
ti
Description
Min
Typ
Max
Integration time duration
5 µs
–
–
td1
TRIG1 falling to integration period start delay
–
100 ns
–
td2
TRIG1 rising to integration period stop delay
–
1.3 µs
–
tt
Integration period stop to read-out start delay
–
1 µs
–
th
TRIG1 hold time (pulse high duration)
1 µs
–
–
Figure 4. Timing Diagram
th
ti
TRIG1
td1
td2
Readout N-1
Readout N
Integration N
Integration N+1
tt
Trigger and
Integration Time
Controlled by Two
Inputs
The TRIG2 rising edge starts the integration period. The TRIG1 rising edge stops the integration period.
This period is immediately followed by a readout period.
Table 6. Trigger and Integration Time Controlled by Two Inputs
Label
ti
Description
Min
Typ
Max
Integration time duration
5 µs
–
–
td1
TRIG2 rising to integration period start delay
–
100 ns
–
td2
TRIG1 rising to integration period stop delay
–
1.3 µs
–
tt
Integration period stop to read-out start delay
–
1 µs
–
th
TRIG1 and TRG2 hold time (pulse high duration)
1 µs
–
–
Figure 5. Timing Diagram
ti
TRIG2
td1
td2
TRIG1
Integration N
Integration N+1
Readout N-1
Readout N
tt
7
2161B–IMAGE–04/03
Output Data
Timing
Table 7. Output Data Timing
Label
Description
tp
Input falling edge to output clock propagation delay
td
STROBE to synchronized signals delay
Min
Typ
Max
–
7 ns
–
-5 ns
–
+5 ns
Figure 6. Timing Diagram
Internal Clock
or
CLK_IN
CLK_IN
(case H = 10)
tp
LVAL
td
STROBE
DATA
First valid pixel
Note:
Last valid pixel
CLOCK_IN input frequency must be in the range 5 to 60 MHz. Out of this range, the performances may be decreased.
In case of multi-cameras synchronisation (means more than one camera on one acquisition
board):
8
•
the "master" camera will provide DATA, STROBE and LVAL signals to the acquisition
board. The others will only provide DATA.
•
the external clock CLK_IN must be input on each cameras to guaranty perfect data
synchronisation.
•
the trigger(s) input (TRIG1 and/or TRIG2) must be input on each cameras. It is
recommended to synchronise the rising edge of these signals on the CLK_IN falling edge.
•
cables must be balanced between each cameras (same quality, same length) to ensure
perfect cameras synchronisation.
•
the CLK_IN frequency must be equal to the two CCD register frequency. It means that the
user shall use either H=2 (2 taps at CLK_IN data rate) or H=10 (1 tap at 2xCLK_IN data
rate). Using H=1 clock mode will provide LVAL jitter on the "slave" camera.
•
Only "trigged and integration time controlled" (M=3 or M=4) can be used. These modes
ensure perfect readout phase starting for each cameras.
AViiVA M2 LV
2161B–IMAGE–04/03
AViiVA M2 LV
Electrical
Interface
Power Supply
It is recommended to insert a 1A fuse between the power supply and the camera.
Table 8. Power Supply
Signal Name
I/O
Type
Description
PWR
P
–
DC power input: +12V to +24V (±0.5V)
GND
P
–
Electrical and Mechanical ground
I = input, O = output, IO = bi-directional signal, P = power/ground, NC = not connected
Camera Control
The Camera interface provides three LVDS signals dedicated to camera control.
Table 9. Camera Control
Signal Name
I/O
Type
Description
TRIG1
I
RS644
Synchronization input (refer to “Synchronization Mode” on
page 6)
TRIG2
I
RS644
Start Integration period in dual synchro mode (refer to
“Synchronization Mode” on page 6)
CLOCK_IN
I
RS644
External clock for (multi-)camera synchronization (refer to
“Synchronization Mode” on page 6)
I = input, O = output, IO = bi-directional signal, P = power/ground, NC = not connected
Video Data
Table 10. Video Data
Signal Name
I/O
Type
Description
ODD[11-0]
O
RS644
Odd pixel data (refer to “Output Data Timing” on page 8),
ODD-00 = LSB, ODD-11 = MSB
EVEN[11-0]
O
RS644
Even pixel data (refer to “Output Data Timing” on page 8),
EVEN-00 = LSB, EVEN-11 = MSB
STROBE
O
RS644
Output data clock (refer to “Output Data Timing” on page 8),
data valid on the rising edge
LVAL
O
RS644
Line valid (refer to “Output Data Timing” on page 8), active
high signal
I = input, O = output, IO = bi-directional signal, P = power/ground, NC = not connected
Note:
In case of Single output, the data (multiplexed) are output in place of Odd data.
9
2161B–IMAGE–04/03
Serial
Communication
The RS-232 interface allows to parameter the camera.
The RS-232 configuration is:
•
Full duplex/without handshaking. The camera is configured in DCE/Modem
•
9600 bauds, 8-bit data, no parity bit, 1 stop bit.
Table 11. Serial Communication
Command Syntax
Signal Name
I/O
Type
Description
TX
O
RS232
Transmitted data
RX
I
RS232
Received data
The valid syntax is "S = n(CR)" with:
•
S: command identification as per “Camera Command and Control” on page 4. S is a single
character in upper case.
•
n: setting value.
•
(CR): means "carriage return".
no space, nor tab may be inserted between S, =, n and (CR).
Example of a valid command:
•
G = 3(CR): sets the camera to gain 3 (refer to “Camera Command and Control” on page 4
for exact value calculation).
Example of non valid commands:
Command Processing
•
G = 3(CR): spaces.
•
g = 3(CR): g instead of G.
•
G = 1040(CR): 1040 is outside of range.
Each command received by the camera is processed:
•
•
If the command is valid:
–
the setting is done in case of a write command.
–
the camera returns the data separated by (CR) in case of the read command.
–
the camera returns: >OK(CR).
If the command is not valid:
–
nothing is done.
–
the camera returns: >1 = out of range; >2 = syntax error; >3 = command too long;
>4,>6,>7 = internal error; >5 undefined function.
Example: when receiving "! = 3(CR)’’ the camera returns its current settings:
•
Storage of the
Settings in
EEPROM
10
A = 0(CR); B = 0(CR); ....; E = 0(CR); >OK(CR).
ATMEL recommends to use "E = 1" for settings that are often changed (check the maximum
number of write cycles above) and when the time required by the camera to process a command is critical. The maximum number of write cycles allowed for the EEPROM is: 100 000.
AViiVA M2 LV
2161B–IMAGE–04/03
AViiVA M2 LV
Connector
Description
All connectors are on the rear panel.
Power Supply
Camera connector type: Hirose HR10A-7R-6PB (male).
Note: Cables for digital signals shall be shielded twisted pairs.
Cable connector type: Hirose HR10A-7P-6S (female).
Table 12. Power Supply Connector Pin-out
Signal
Pin
Signal
Pin
PWR
1
GND
4
PWR
2
GND
5
PWR
3
GND
6
Figure 7. Receptacle Viewed from Camera Back
1
6
2
5
3
RS232 Connector
4
Camera connector type: D-Sub 9-pin female.
RTS (pin 4) and CTS (pin 6) are connected together inside the camera.
DTR (pin 7) and DSR (pin 8) are connected together inside the camera.
Table 13. RS232 Connector Pin-out
Signal
Pin
Signal
Pin
Signal
Pin
NC
1
RTS
4
DTR
7
TX
2
GND
5
DSR
8
RX
3
CTS
6
NC
9
11
2161B–IMAGE–04/03
44-pin Data and
Synchro
Connector
Camera connector type: D-Sub HD 44-pin female.
Warning: Unused pins must be kept open.
When used in Single (multiplexed) output, the multiplexed data are output in place of ODD
data.
Table 14. 44-pin Data and Synchro Connector when Used in 12-bit Output Format (S = 0)
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
1
GND
12
–
23
ODD-03+
34
ODD-06-
2
CLOCK_IN+
13
–
24
ODD-08+
35
ODD-07+
3
ODD-04-
14
LVAL+
25
ODD-10-
36
ODD-01+
4
ODD-05-
15
STROBE+
26
ODD-11-
37
ODD-02+
5
ODD-07-
16
CLOCK_IN-
27
–
38
ODD-03-
6
ODD-00+
17
TRIG1+
28
–
39
ODD-09+
7
ODD-02-
18
TRIG1-
29
LVAL-
40
ODD-10+
8
ODD-08-
19
ODD-05+
30
STROBE-
41
–
9
ODD-09-
20
ODD-06+
31
TRIG2-
42
–
10
ODD-11+
21
ODD-00-
32
TRIG2+
43
–
11
–
22
ODD-01-
33
ODD-04+
44
GND
Table 15. 44-pin Data and Synchro Connector when Used in 10-bit Output Format (S = 1)
Pin
12
Signal
Pin
Signal
Pin
Signal
Pin
Signal
1
GND
12
–
23
ODD-03+
34
ODD-06-
2
CLOCK_IN+
13
–
24
ODD-08+
35
ODD-07+
3
ODD-04-
14
LVAL+
25
–
36
ODD-01+
4
ODD-05-
15
STROBE+
26
–
37
ODD-02+
5
ODD-07-
16
CLOCK_IN-
27
–
38
ODD-03-
6
ODD-00+
17
TRIG1+
28
–
39
ODD-09+
7
ODD-02-
18
TRIG1-
29
LVAL-
40
–
8
ODD-08-
19
ODD-05+
30
STROBE-
41
–
9
ODD-09-
20
ODD-06+
31
TRIG2-
42
–
10
–
21
ODD-00-
32
TRIG2+
43
–
11
–
22
ODD-01-
33
ODD-04+
44
GND
AViiVA M2 LV
2161B–IMAGE–04/03
AViiVA M2 LV
Table 16. 44-pin Data and Synchro Connector when Used in 8-bit Output Format (S = 2)
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
1
GND
12
–
23
ODD-03+
34
ODD-06-
2
CLOCK_IN+
13
–
24
–
35
ODD-07+
3
ODD-04-
14
LVAL+
25
–
36
ODD-01+
4
ODD-05-
15
STROBE+
26
–
37
ODD-02+
5
ODD-07-
16
CLOCK_IN-
27
–
38
ODD-03-
6
ODD-00+
17
TRIG1+
28
–
39
–
7
ODD-02-
18
TRIG1-
29
LVAL-
40
–
8
–
19
ODD-05+
30
STROBE-
41
–
9
–
20
ODD-06+
31
TRIG2-
42
–
10
–
21
ODD-00-
32
TRIG2+
43
–
11
–
22
ODD-01-
33
ODD-04+
44
GND
Table 17. 44-pin Data and Synchro Connector when Used in Special 2 x 8-bit Output on a
Single Connector (Y = 1)
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
1
GND
12
EVEN-06-
23
ODD-03+
34
ODD-06-
2
CLOCK_IN+
13
EVEN-07-
24
EVEN-00+
35
ODD-07+
3
ODD-04-
14
LVAL+
25
EVEN-02-
36
ODD-01+
4
ODD-05-
15
STROBE+
26
EVEN-03-
37
ODD-02+
5
ODD-07-
16
CLOCK_IN-
27
EVEN-05+
38
ODD-03-
6
ODD-00+
17
TRIG1+
28
EVEN-06+
39
EVEN-01+
7
ODD-02-
18
TRIG1-
29
LVAL-
40
EVEN-02+
8
EVEN-00-
19
ODD-05+
30
STROBE-
41
EVEN-04-
9
EVEN-01-
20
ODD-06+
31
TRIG2-
42
EVEN-05-
10
EVEN-03+
21
ODD-00-
32
TRIG2+
43
EVEN-07+
11
EVEN-04+
22
ODD-01-
33
ODD-04+
44
GND
13
2161B–IMAGE–04/03
26-pin Data
Connector
Camera connector type: D-Sub HD 26-pin female.
In case of single (multiplexed) or special 2 x 8-bit mode, the output on this connector are all
fixed to low level.
Table 18. 26-pin Data Connector when Used in 12-bit Output Format (S = 0)
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
1
GND
8
EVEN-10+
15
EVEN-07+
22
EVEN-05+
2
EVEN-01-
9
EVEN-11-
16
EVEN-08+
23
EVEN-06+
3
EVEN-03+
10
EVEN-00-
17
EVEN-10-
24
EVEN-08-
4
EVEN-04+
11
EVEN-01+
18
EVEN-11+
25
EVEN-09-
5
EVEN-06-
12
EVEN-02+
19
EVEN-00+
26
GND
6
EVEN-07-
13
EVEN-04-
20
EVEN-02-
7
EVEN-09+
14
EVEN-05-
21
EVEN-03-
Table 19. 26-pin Data Connector when Used in 10-bit Output Format (S = 1)
Pin
Signal
Pin
Signal
Pin
Signal
Pin
Signal
1
GND
8
–
15
EVEN-07+
22
EVEN-05+
2
EVEN-01-
9
–
16
EVEN-08+
23
EVEN-06+
3
EVEN-03+
10
EVEN-00-
17
–
24
EVEN-08-
4
EVEN-04+
11
EVEN-01+
18
–
25
EVEN-09-
5
EVEN-06-
12
EVEN-02+
19
EVEN-00+
26
GND
6
EVEN-07-
13
EVEN-04-
20
EVEN-02-
7
EVEN-09+
14
EVEN-05-
21
EVEN-03-
Table 20. 26-pin Data Connector when Used in 8-bit Output Format (S = 2)
Pin
14
Signal
Pin
Signal
Pin
Signal
Pin
Signal
1
GND
8
–
15
EVEN-07+
22
EVEN-05+
2
EVEN-01-
9
–
16
–
23
EVEN-06+
3
EVEN-03+
10
EVEN-00-
17
–
24
–
4
EVEN-04+
11
EVEN-01+
18
–
25
–
5
EVEN-06-
12
EVEN-02+
19
EVEN-00+
26
GND
6
EVEN-07-
13
EVEN-04-
20
EVEN-02-
7
–
14
EVEN-05-
21
EVEN-03-
AViiVA M2 LV
2161B–IMAGE–04/03
AViiVA M2 LV
Mechanical
Characteristics
Weight
The camera typical weight (without lens nor lens adapter) is 220 g/7.7 ounces (typical).
Dimensions
The camera dimensions (without lens) are W = 56 mm, H = 60 mm, L = 39.4 mm.
Figure 8. Mechanical Box Drawing and Dimensions
Reference mounting
plane
Mechanical
reference point
39.4
56
12
48
1
y = 30 ± 0.05
15
Sensor
60
52
1st pixel
15
Reference mounting
plane
Reference mounting
plane
∅ 46
4 x M3
x = refer to "Mechanical Mounting
Reference"
∅ 42 H7
6
4 x 2 holes M4
(on the 4 sides)
3 x M2.5 at 120°
X axis
X, Y plan
Y axis
Z axis
All dimensions in millimeters
Mechanical
Mounting
Reference
z = 10.3 ± 0.03
Optical sensor plane to front face
The front panel mechanical part is designed to support the mounting of the camera. On this
mechanical part, three surfaces are considered as mounting reference surface: i.e. the distance between these surfaces and the first active pixel are known very precisely (better than
±50 µm).
Table 21. Mechanical Mounting Reference
Number of Pixel
512
1024
2048
4096
x with 14 µm sensor (nm)
24.416
20.832
13.664
–
x with 10 µm sensor (nm)
–
22.880
17.760
7.520
15
2161B–IMAGE–04/03
Sensor Alignment
Figure 9. Sensor Alignment Diagram
Y axis
First pixel center
y + ∆y
∆θx, y
Active area
Mechanical
reference point
x + ∆x
X axis
Z axis
Active area center
z + ∆z
∆tiltz
Mechanical
reference point
X, Y plans
Lens Mounting
(Lens Not
Supplied)
The camera can be provided with three different lens adapter, corresponding to three different
options. The customer has to selected the correct adapter. The following table gives recommendation according to the sensor size.
Table 22. Lens Mounting
Number of Pixel
512/14 µm
1024/10 µm
1024/14 µm
2048/10 µm
2048/14 µm
4096/10 µm
C mount
OK
OK
~OK(1)
~OK(1)
not usable
not usable
F mount
OK
OK
OK
OK
OK
OK
Note:
1. Depends on the lens quality.
Heat-sink
Mounting
16
In order to improve the power dissipation, the camera can be delivered with heat-sink to be
mounted by the user on the side faces of the camera. The delivery of the heat-sinks corresponds to a dedicated option.
AViiVA M2 LV
2161B–IMAGE–04/03
AViiVA M2 LV
Ordering Code
Table 23. Ordering Code
Part Number
Resolution
Pixels size
Description
AT71M2LV1010-BA0
1K
10 µm
AViiVA M2 LV 1010
AT71M2LV2010-BA0
2K
10 µm
AViiVA M2 LV 2010
AT71M2LV4010-BA0
4K
10 µm
AViiVA M2 LV 4010
AT71M2LV0514-BA0
512
14 µm
AViiVA M2 LV 0514
AT71M2LV1014-BA0
1K
14 µm
AViiVA M2 LV 1014
AT71M2LV2014-BA0
2K
14 µm
AViiVA M2 LV 2014
AT71KFPAVIVA-ABA
–
–
F mount (NIKON)
AT71KFPAVIVA-AKA
–
–
T2 mount (M42 x 0.75)
AT71KFPAAVIVA-ADA
–
–
M42 x 1 mount
AT71KFPAVIVA-ACA
–
–
C mount
AT71KAVIVAP2C0D4A0
–
–
Cables kit: 10m power supply and
5m LVDS data transmission cables
17
2161B–IMAGE–04/03
Atmel Corporation
2325 Orchard Parkway
San Jose, CA 95131
Tel: 1(408) 441-0311
Fax: 1(408) 487-2600
Regional Headquarters
Europe
Atmel Sarl
Route des Arsenaux 41
Case Postale 80
CH-1705 Fribourg
Switzerland
Tel: (41) 26-426-5555
Fax: (41) 26-426-5500
Asia
Room 1219
Chinachem Golden Plaza
77 Mody Road Tsimshatsui
East Kowloon
Hong Kong
Tel: (852) 2721-9778
Fax: (852) 2722-1369
Japan
9F, Tonetsu Shinkawa Bldg.
1-24-8 Shinkawa
Chuo-ku, Tokyo 104-0033
Japan
Tel: (81) 3-3523-3551
Fax: (81) 3-3523-7581
Atmel Operations
Memory
2325 Orchard Parkway
San Jose, CA 95131
Tel: 1(408) 441-0311
Fax: 1(408) 436-4314
Microcontrollers
2325 Orchard Parkway
San Jose, CA 95131
Tel: 1(408) 441-0311
Fax: 1(408) 436-4314
La Chantrerie
BP 70602
44306 Nantes Cedex 3, France
Tel: (33) 2-40-18-18-18
Fax: (33) 2-40-18-19-60
ASIC/ASSP/Smart Cards
RF/Automotive
Theresienstrasse 2
Postfach 3535
74025 Heilbronn, Germany
Tel: (49) 71-31-67-0
Fax: (49) 71-31-67-2340
1150 East Cheyenne Mtn. Blvd.
Colorado Springs, CO 80906
Tel: 1(719) 576-3300
Fax: 1(719) 540-1759
Biometrics/Imaging/Hi-Rel MPU/
High Speed Converters/RF Datacom
Avenue de Rochepleine
BP 123
38521 Saint-Egreve Cedex, France
Tel: (33) 4-76-58-30-00
Fax: (33) 4-76-58-34-80
Zone Industrielle
13106 Rousset Cedex, France
Tel: (33) 4-42-53-60-00
Fax: (33) 4-42-53-60-01
1150 East Cheyenne Mtn. Blvd.
Colorado Springs, CO 80906
Tel: 1(719) 576-3300
Fax: 1(719) 540-1759
Scottish Enterprise Technology Park
Maxwell Building
East Kilbride G75 0QR, Scotland
Tel: (44) 1355-803-000
Fax: (44) 1355-242-743
e-mail
literature@atmel.com
Web Site
http://www.atmel.com
Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard
warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any
errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and
does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are
granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use
as critical components in life support devices or systems.
© Atmel Corporation 2003. All rights reserved. Atmel ® and combinations thereof, are the registered trademarks, and AViiVA ™ is the trademark of Atmel Corporation or its subsidiaries. Other terms and product names
may be the trademarks of others.
Printed on recycled paper.
2161B–IMAGE–04/03
0M