FM75
Low Voltage 2-Wire Digital Temperature
Sensor with Thermal Alarm
General Description
Features
The FM75 is a high-precision CMOS temperature sensor with a
Delta-Sigma analog-to-digital converter and a SMBus compatible
serial digital interface. The FM75 is typically accurate to ±2°C over
the full temperature range of -40°C to 125°C and to ±1°C over the
range of 0°C to 100°C. The FM75 provides digital temperature
data with 9 to 12-bit resolution. The default resolution is 9 bits, but
for applications requiring higher resolution, the user can program
the FM75 to provide 10, 11, or 12 bit data.
■ User Configurable to 9, 10, 11 or 12-bit Resolution
■ Precision Calibrated to ±1°C from 0°C to 100°C Typical
■ Temperature Range: -40°C to 125°C
■ Low Operating Current (less than 250µA)
■ Low Self Heating (0.2°C max in still air)
■ Operating Voltage Range: 2.7V to 5.5V
Applications
The FM75 features a thermal alarm function with a user-programmable trip temperature and turn-off temperature. This alarm can
operate in two modes — interrupt mode and comparator mode —
which allows flexibility for many types of applications.
■ Battery Management
■ FAX Management
■ Printers
The FM75 is available in SOP-8 and MSOP-8 surface mount
packages.
■ Portable Medical Instruments
■ HVAC
■ Power Supply Modules
■ Disk Drives
■ Computers
■ Automotive
Pin Configuration
Application Diagram
2.7 to 5.5V
SDA
SCL
1
8
2
7
VDD
8
A0
A0
User
Programmable
Address
FM75
O.S.
GND
3
4
6
5
A1
A1
A2
SMBus
Interface
A2
SDA
SCL
7
6
5
1
FM75
3
O.S.
8 Pin
Configuration
2
4
© 2001 Fairchild Semiconductor Corporation
FM75 Rev. A.4
1
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
PRELIMINARY
July 2001
Parameter
Supply Voltage
Rating
Storage Temperature Range
-60°C to +150°C
+7V
Lead Soldering Temperature
220°C
Output Voltage
VCC + 0.5V
Output Current
10mA
ESD2
Human Body Model
Machine Model
2000V
250V
Notes:
1. Absolute maximum ratings are limits beyond which operation may cause permanent damage to the device. These are stress ratings only; functional operation at or above
these limits is not implied.
2. Human Body Model: 100pF capacitor discharged through a 1.5kOhm resistor into each pin. Machine Model: 200pF capacitor discharged directly into each pin.
Electrical Characteristics3
(-40°C ≤ TA ≤ +125°C, VCC = 5.0V unless otherwise noted. Specifications subject to change
without notice.)
Parameter
Symbol
Specified Temperature Range
Temperature Conversion
Conditions
Min
TMIN, TMAX
Typ
-40
Time4
Max
Units
+125
°C
90
Accuracy5
TA = 0°C
TA = +25°C
TA = +100°C
TA = -40°C (TMIN)
TA = +125°C (TMAX)
-1
-1
-1
-3
-3
ms
+1
+1
+1
+3
+3
°C
°C
°C
°C
°C
Notes:
3. These specifications are guaranteed only for the test conditions listed.
4. This specification only indicates how often temperature information is updated to the Temperature Register. The FM75 can be read at any time without interrupting the
temperature conversion process.
5. Accuracy (expressed in °C) = Difference between the FM75 output temperature and the measured temperature.
Logic Electrical Characteristics
Parameter
Min. Input Voltage Logic High
Symbol
Conditions
VIH
Min
Typ
Max
Units
VDD x 0.7
VDD + 0.5
V
-0.3
VDD x 0.3
V
0.36
0.36
V
V
Max. Input Voltage Logic Low
VIL
Max. Output Voltage Logic Low
VOL
VDD = 5V, IOL = -3mA
VDD = 3V, IOL = -1.5mA
Quiescent Supply Current
IDD
Interface inactive
R/W Activity on SDA
220
350
250
500
µA
µA
IDD-SD
Interface inactive
R/W Activity on SDA
0.15
83
1
150
µA
µA
±0.1
±1.0
µA
µA
3
mA
Shutdown Current
Input Leakage Current
IIN
VIN = 0V or 5V, TA = 25°C
-40°C < TA < 125°C
Output Sink Current
IOL
TA = 25°C, VOL = 0.4V
Output Leakage Current
ILEAK
Output Transition Time
tF
Input Capacitance
CIN
5
µA
CL = 400pF, IOL = -3mA
250
ns
All Digital Inputs
20
pF
VOH = 5V, VDD = 0V
2
FM75 Rev. A.4
0.001
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Absolute Maximum Ratings (Note 1)
Parameter
Symbol
SCL Clock Period
Conditions
Min
tSCL
SCL Clock Transition Time
Typ
Max
Units
2.5
ms
tT:LH, tT:HL
300
ns
µs
SCL Clock Low Period
tLOW
0.470
SCL Clock High Period
tHIGH
0.400
Bus free time between a Stop and
a new Start Condition
tBUF
1.0
µs
Data in Set-up to SCL High
tSU:DAT
100
ns
Data Out Stable after SCL Low
tHD:DAT
0
ns
SCL Low Set-up to SDA Low
(Repeated Start Condition)
tSU:STA
100
ns
SCL High Hold after SDA Low
(Start Condition)
tHD:STA
100
ns
SDA High after SCL High
(Stop Condition)
tSU:STO
100
ns
Time in which a FM75 must be
operational after a power-on reset
µs
50
tPOR
500
ms
tSCL
SCL
tSU:STA
tHD:STA
tSU:DAT
tSU:STO
SDA
Data In
tBUF
tLOW
tHIGH
tT:HL
tT:LH
90%
SCL
90%
10%
10%
SDA
Data Out
tHD:DAT
Pin Descriptions
Pin #
Name
Direction
1
SDA
Input/Output
Description
2
SCL
Input
3
O.S.
Output
Over-Limit Signal-Open drain thermostat output that indicates if the
temperature has exceeded user-programmable limits.
4
GND
Supply
Ground
5, 6, 7
A0, A1, A2
Input
8
VDD
Supply
Serial Data-Open drain to I/O-data pin for two-wire interface.
Serial Clock-Clock for 2-wire serial interface.
Address LSBs-User selectable address pins for the 3 LSBs of the
serial interface address.
Supply Voltage
3
FM75 Rev. A.4
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Serial Port Timing
The FM75 temperature sensing circuitry continuously produces
an analog voltage that is proporational to the device temperature.
At regular intervals the FM75 converts the analog voltage to a
two’s complement digital value, which is placed into the temperature register.
Temperature
Digital Output
Sig
The FM75 has an SMBus compatible digital serial interface which
allows the user to access the data in the temperature register at
any time. In addition, the serial interface gives the user easy
access to all other FM75 registers to customize operation of the
device.
Number of
bits used
by
conversion
resolution
bit
9
bit
10
bit
11
bit
12
12-Bit Resolution
0000
11-Bit Resolution
All
Temperatures
The FM75 temperature-to-digital conversion can have 9, 10, 11,
or 12-bit resolution as selected by the user, providing 0.5°C,
0.25°C, 0.125°C, and 0.0625°C temperature resolution, respectively. At power-up the default conversion resolution is 9-bits. The
conversion resolution is controlled by the R0 and R1 bits in the
Configuration Register.
0
0000
0
0
0000
0
0
0
0000
10-Bit Resolution
9-Bit Resolution
Always
zero
+125° C
0
111
1101
0
0
0
0
0000
+100.0625° C
0
110
0100
0
0
0
1
0000
+50.125° C
0
011
0010
0
0
1
0
0000
+12.25° C
0
000
1100
0
1
0
0
0000
0° C
0
000
0000
0
0
0
0
0000
-20.5° C
1
110
1011
1
0
0
0
0000
The FM75 has a Shutdown Mode that reduces the operating
current of the FM75 to 150nA. This mode is controlled by the SD
bit in the configuration register.
-33.25° C
1
101
1110
1
1
0
0
0000
-45.0625° C
1
101
0010
1
1
1
1
0000
Power Up Default Conditions
-55° C
1
100
1001
0
0
0
0
0000
Table 1 gives examples of the relationship between the output
digital data and the external temperature. The 9-bit, 10-bit, 11-bit
and 12-bit columns in Table 1 indicate the right-most bit in the
output data stream that can contain temperature information for
each conversion accuracy. Since the output digital data is in two’scomplement format, the most significant bit of the temperature is
the “sign” bit. If the sign bit is a zero, the temperature is positive and
if the sign bit is a one, the temperature is negative.
The FM75 always powers up in the following default state:
The O.S. polarity is controlled by the POL bit in the Configuration
Register. The user-programmable upper trip-point temperature
for the thermal alarm is stored in the TOS Register, and the userprogrammable hysteresis temperature (i.e., the lower trip point) is
stored in the THYST Register.
■ Thermostat mode: Comparator Mode
■ O.S. polarity: active low
■ Fault tolerance: 1 fault (i.e., F0 = 0 and F1 = 0 in the
Configuration Register)
The thermal alarm has two modes of operation: Comparator Mode
and Interrupt Mode. At power-up the default is Comparator Mode.
The alarm mode is controlled by the CMP/INTR bit in the Configuration Register.
■ TOS = 80°C
■ THYST = 75°C
■ Register pointer: 00 (Temperature Register)
■ Conversion resolution: 9 bits (i.e., R0 = 0 and R1 = 0 in the
Configuration Register)
Fault Tolerance
In both modes the alarm “fault tolerance” setting plays a role in
determining when the O.S. output will be activated. Fault tolerance refers to the number of consecutive times an error condition
must be detected before the user is notified. Higher fault tolerance
settings can help eliminate false alarms caused by noise in the
system. The alarm fault tolerance is controlled by bits F0 and F1
in the Configuration Register. These bits can be used to set the
fault tolerance to 1, 2, 4 or 6 as shown in Table 4. At power-up,
these bits both default to 0 (fault tolerance = 1).
After power up these conditions can be reprogrammed via the
serial interface. Refer to the Serial Data Bus Operation section
for FM75 programming instructions.
Thermal Alarm Function
The FM75 thermal alarm function provides user programmable
thermostat capability and allows the FM75 to function as a stand
alone thermostat without using the serial interface. The Over-Limit
Signal (O.S.) output is the alarm output. This signal is an open
drain output, and at power-up this pin is configured with active-low
polarity.
4
FM75 Rev. A.4
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Table 1. Relationship Between Temperature
and Digital Output
Basic Operation
Interrupt Mode
In Comparator Mode, each time a temperature-to-digital (T-to-D)
temperature conversion occurs, the new digital temperature is
compared to the value stored in the TOS and THYST registers. If a
fault tolerance number of consecutive temperature measurements are greater than the value stored in the TOS register, the
O.S. output will be activated. For example, if bits F1 and F0 are
equal to “10” (fault tolerance = 4), four consecutive temperature
measurements must exceed TOS to activate the O.S. output. Once
the O.S output is active, it will remain active until the first time the
measured temperature drops below the temperature stored in the
THYST register. The operation of the alarm in Comparator Mode
with fault tolerance=2 is illustrated in Figure 1.
In Interrupt Mode the O.S. output will first become active after a
fault tolerance number of consecutive temperature measurements exceed the value stored in the TOS register (similar to
Comparator Mode). Once O.S. is active, it can only be cleared by
a user read from any of the FM75 registers (Temperature, Configuration, TOS, or THYST) or by putting the FM75 into Shutdown
Mode (i.e., by setting the shutdown bit in the Configuration
Register to “1”). Once cleared, the O.S. output can only be
activated the next time by a fault tolerance number of consecutive
temperature measurements that are lower than the value stored
in THYST. Again, once it is activated the O.S. output can only be
deactivated by a user read or shutdown. Thus, in Interrupt Mode
the activate/clear cycle for O.S. has the following pattern: temperature > TOS, clear, temperature < THYST, clear, temperature >
TOS, clear, etc. The operation of the alarm in Interrupt Mode with
fault tolerance=2 is also illustrated in Figure 1.
Temperature-to-Digital
Conversion
TOS
THYST
O.S. (Comparator Mode)
O.S. (Interrupt Mode)
For this example:
Fault Tolerance = 2
Output Polarity = Active Low
Read (or Shutdown
Figure 1. Thermal Alarm Operation in Comparator and Interrupt Modes
5
FM75 Rev. A.4
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Comparator Mode
Command Register
The FM75 contains the following five registers:
The Command Register is a one-byte (8-bit) write-only register.
The data stored in the Command Register indicates which of the
other four registers (Temperature, Configuration, TOS, or THYST)
the user intends to read from or write to during an upcoming
operation. In other words the Command Register “points” to the
selected register as shown in Figure 2
1) Command Register
2) Temperature Register
3) Configuration Register
4) Over-Limit-Signal Temperature Register (TOS)
The Command Register is illustrated in Figure 3. The P1 and P0
bits of the Command Register determine which register is to be
accessed as shown in Table 2. The six MSBs of the Command
Register must always be zero. Writing a 1 into any of these bits will
cause the current operation to be terminated.
5) Hysteresis Temperature Register (THYST)
All of these registers can be accessed by the user via the digital
serial interface at any time (see Serial Interface Operation for
instructions). A detailed description of these registers and their
functions is provided in the following paragraphs. A diagram of the
register hierarchy is shown in Figure 2
SDA
The Command Register retains pointer information between
operations. Therefore, this register only needs to be updated once
for consecutive read operations from the same register. All bits in
the Command Register default to zero at power-up.
SCL
Temperature Register
Serial Interface
2-byte Read Only
Command Reg. = 00000000
Read/Write
Data
Configuration Register
1-byte Read/Write
Command Reg. = 00000001
Command
('Pointer')
Data
THYST Register
2-byte Read/Write
Command Reg. = 00000010
Command Register
1-byte Write Only
TOS Register
2-byte Read/Write
Command Reg. = 00000011
1
Figure 2. FM75 Register Hierarchy
MSB
0
Table 2. Register Assignments for
Command Bits P1 and P2
LSB
0
0
0
0
0 P1 P0
Register
Figure 3. Command Register Format
6
FM75 Rev. A.4
P1
P0
Temperature Register
0
0
Configuration Register
0
1
THYST Register
1
0
TOS Register
1
1
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Registers
Configuration Register
The Temperature Register is a two-byte (16-bit) read-only register. Digital temperatures from the T-to-D converter are stored in
the Temperature Register in two’s complement format, and the
contents of this register are updated at regular intervals—i.e.,
each time the T-to-D conversion is finished.
The Configuration Register is a one-byte (8-bit) read/write register
(see Figure 5). This register allows the user to control the FM75
Shutdown Mode as well as the following thermal alarm features:
polarity, operating mode, and fault tolerance. The Configuration
Register contains two bits that set the fault tolerance trip point. The
fault tolerance trip point is the number of consecutive times the
internal circuit reads the temperature and finds the tempterature
outside the limits programmed. The programmed limited are
defined by the TOS Register for the upper limit, and by the THYST
Register for the lower limit. Table 4 shows the relationship
between F1 and F0 and the number of consecutive errors or "trips"
needed to activate the alarm. The Configuration Register also
contains the two bits that set the T-to-D conversion resolution to
9, 10, 11, or 12 bits. Table 3 shows the relationship between R1
and T0 and the conversion resolution. All bits in the configuration
register default to zero at power-up.
The user can read data from the Temperature Register at any
time. When a T-to-D conversion is completed, the new data is
loaded into a comparator buffer to evaluate fault conditions, and
will update the Temperature Register is a read cycle is not
ongoing. The FM75 is continuously evaulating fault conditions
regardless of read or write activity on the bus. If a read is ongoing,
the previous temperature will be read. The readable temperature
will be updated upon the completion of the next T-to-D conversion
that is not masked by a read cycle.
The Temperature Register is illustrated in Figure 4. Depending on
the resolution of the T-to-D conversion, the 9, 10, 11 or 12 MSBs
of the register will contain temperature data. All unused bits
following the digital temperature will be zero. The MSB position of
the Temperature Register always contains the sign bit for the
digital temperature and bit 14 contains the temperature MSB. All
bits in the Temperature Register default to zero at power-up.
MSB 14
13
SB
T
TMSB
12
T
11
T
MSB
5
6
4
3
X R1 R0 F1 F0
2
1
POL CMP/
INT
LSB
SD
R1 = Resolution bit 1. (See Table 3)
R0 = Resolution bit 0. (See Table 3)
F1 = Fault tolerance bit 1. (See Table 4)
10
9
8
T
T
T
F0 = Fault tolerance bit 0. (See Table 4)
POL = O.S. output polarity. 0 = active low, 1 = active high.
CMP/INT = Thermostat mode. 0 = comparator mode, 1 = interrupt mode.
SD = Shutdown. 0 = normal operation, 1 = shutdown mode.
Figure 5. Configuration Register Format
7
6
5
4
3
2
1
LSB
9-bit
LSB
10-bit
LSB
11-bit
LSB
12-bit
LSB
0
0
0
0
Table 3. Conversion Resolution Settings
SB = Two's complement sign bit
TMSB = Temperature MSB
T = Temperature data
9-bit LSB = Temperature LSB for 9-bit conversions
10-bit LSB = Temperature LSB for 10-bit conversions
11-bit LSB = Temperature LSB for 11-bit conversions
A-to-D Conversion
Resolution
R1
R0
9 Bits
0
0
10 Bits
0
1
11 Bits
1
0
12 Bits
1
1
12-bit LSB = Temperature LSB for 12-bit conversions
Figure 4. Temperature Register Format
Table 4. Fault Tolerance Settings
7
FM75 Rev. A.4
Fault Tolerance
F1
F0
1
0
0
2
0
1
4
1
0
6
1
1
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Temperature Register
Hysteresis Temperature Register (THYST)
The TOS Register is a two-byte (16-bit) read/write register that
stores the user-programmable upper trip-point temperature for
the thermal alarm in two’s-complement format. At power-up this
register defaults to 80°C (i.e., 0101 0000 0000 0000).
The THYST Register is a two-byte (16-bit) read/write register that
stores the user programmable lower trip-point temperature for the
thermal alarm in two’s-complement format. At power-up this
register defaults to 75°C (i.e., 0100 1011 0000 0000).
The format of the TOS register is identical to that of the Temperature Register (see Figure 6). The 4 LSBs of the TOS Register are
hardwired to zero, so data written to these register bits will be
ignored. The MSB position of the TOS Register contains the sign
bit for the digital temperature and bit 14 contains the temperature
MSB.
The THYST register is illustrated in Figure 6. The format of this
register is the same as that of the Temperature Register. The 4
LSBs of the THYST register are hardwired to zero, so data written
to these bits is ignored.
The resolution setting for the T-to-D conversion determines how
many bits of the THYST Register are used by the thermal alarm. For
example, for 9-bit conversions the hysteresis temperature is
defined by the 9 MSBs of the THYST Register, and all remaining bits
are "don't cares."
The resolution setting for the T-to-D conversion determines how
many bits of the TOS Register are used by the thermal alarm. For
example, for 9-bit conversions the trip-point temperature is defined by the 9 MSBs of the TOS register, and all remaining bits are
“don’t cares.”
MSB 14
13
12
11
10
9
8
SB
T
T
T
T
T
T
TMSB
7
6
5
4
3
2
1
LSB
9-bit
LSB
10-bit
LSB
11-bit
LSB
12-bit
LSB
0
0
0
0
SB = Two's complement sign bit
TMSB = Hysteresis temperature MSB
T = Temperature data
9-bit LSB = Hysteresis temperature LSB for 9-bit conversions
10-bit LSB = Hysteresis temperature LSB for 10-bit conversions
11-bit LSB = Hysteresis temperature LSB for 11-bit conversions
12-bit LSB = Hysteresis temperature LSB for 12-bit conversions
Figure 6. THYST Register and TOS Register Format
8
FM75 Rev. A.4
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Over-Limit-Signal Temperature Register (TOS)
Slave Address
General Operation
Each slave device on the bus has a unique 7-bit address so the
master can identify which device is being read from or written to.
Writing to and reading from the FM75 registers is accomplished
via the SMBus-compatible two-wire serial interface. SMBus protocol requires that one device on the bus initiates and controls all
read and write operations. This device is called the “master”
device. The master device also generates the SCL signal which is
the clock signal for all other devices on the bus. All other devices
on the bus are called “slave” devices. The FM75 is a slave device.
Both the master and slave devices can send and receive data on
the bus.
The FM75 address is as follows:
1
0
1
A2 A1 A0
The four MSBs of the FM75 address are hardwired to 1001. The
three LSBs are user configurable by tying the A0, A1 and A2 pins
to either VDD or ground. This provides eight different FM75
addresses, which allows up to eight FM75s to be connected to the
same bus.
During SMBus operations, one data bit is transmitted per clock
cycle. All SMBus operations follow a repeating nine clock-cycle
pattern that consists of eight bits (one byte) of transmitted data
followed by an acknowledge (ACK) or not acknowledge (NACK)
from the receiving device. Note that there are no unused clock
cycles during any operation—therefore there must be no breaks
in the stream of data and ACKs/NACKs during data transfers.
Conversely having too few clock cycles can lead to incorrect
operation if an inadverstne 8-bit read from a 16-bit register occurs.
Writing To and Reading From the FM75
All read and write operations must begin with a start signal
generated by the master device. After the start condition, the
master device must immediately send a slave address (7 bits)
followed by a read/write bit. If the slave address matches the
address of the FM75, the FM75 sends an ACK after receiving the
read/write bit by pulling the SDA line low for one clock. See Figure
8 – Figure 13 for timing diagrams for all FM75 operations.
For most operations, SMBus protocol requires the SDA line to
remain stable (unmoving) whenever SCL is high—i.e., transitions
on the SDA line can only occur when SCL is low. The exceptions
to this rule are when the master device issues a start or stop signal.
Note that the slave device cannot issue a start or stop condition.
Setting the Pointer
For all operations the pointer stored in the Command Register
must be pointing to the register (Temperature, Configuration, TOS
or THYST) that is going to be written to or read from. To change the
pointer value in the Command Register, the read/write bit following the address must be 0. This indicates that the master will now
write new information into the Command Register.
The following are definitions for some general SMBus terms:
Start Condition: This condition occurs when the SDA line transitions from high to low while SCL is high. The master device uses
this condition to indicate that a data transfer is about to begin.
After the FM75 sends an ACK in response to receiving the address
and read/write bit, the master device must transmit an appropriate
8-bit pointer value as explained in the Registers section of this
data sheet. The FM75 will send an ACK after receiving the new
pointer data.
Stop Condition: This condition occurs when the SDA line transitions from low to high while SCL is high. The master device uses
this condition to signal the end of a data transfer.
Acknowledge and Not Acknowledge: When data is transferred
to the slave device it sends an acknowledge (ACK) after receiving
every byte of data. A master device sends an acknowledge (ACK)
following only the first byte read from a 2-byte register. The
receiving device sends an ACK by pulling SDA low for one clock.
Following the last byte, a master device sends a “not acknowledge” (NACK) followed by a stop condition. A NACK is indicated
by leaving SDA high during the clock after the last byte.
The pointer set operation is illustrated in Figure 8. Anytime a
pointer set is performed, it must be immediately followed by a read
or write operation. Note that the 6 MSBs of the pointer value must
be zero. If the 6 MSBs are not zero, the FM75 will not send an ACK
and will internally terminate the operation. Also recall that the
Command Register retains the current pointer value between
operations. Therefore, once a register is being pointed to, subsequent read operations do not require a pointer set cycle. Write
operations always require the pointer be reset.
9
FM75 Rev. A.4
0
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Serial Data Bus Operation
Writing
If the pointer is already pointing to the desired register, the master
can read from that register by setting the read/write bit (following
the slave address) to a 1. After sending an ACK, the FM75 will
begin transmitting data during the following clock cycle. If the
Configuration Register is being read, the FM75 will transmit one
byte of data (see Figure 10). The master device should respond
with a NACK followed by a stop condition. If the Temperature, TOS
or THYST Register is being read, the FM75 will transmit two bytes
of data (see Figure 9). The master must respond to the first byte
of data with an ACK and to the second byte of data with a NACK
followed by a stop condition.
All writes must be proceeded by a pointer set as described
previously, even if the pointer is already pointing to the desired
register.
Immediately following the pointer set, the master must begin
transmitting the data to be written. If the master is writing to the
Configuration Register, one byte of data must be sent (see Figure
13). If the TOS or THYST Register is being written to, the master must
send two bytes of data (see Figure 11). After transmitting each
byte of data, the master must release the SDA line for one clock
to allow the FM75 to acknowledge receiving the byte. The write
operation should be terminated by a stop signal from the master.
To read from a register other than the one currently being pointed
to by the Command Register, a pointer set to the desired register
must be done as described previously. Immediately following the
pointer set, the master must perform a repeat start condition (see
Figures 8 and 12) which indicates to the FM75 that a new
operation is about to occur. It is important to note that if the repeat
start condition does not occur, the FM75 will assume that a write
is taking place, and the selected register will be overwritten by the
upcoming data on the data bus. After the start condition, the
master must again send the device address and read/write bit.
This time the read/write bit must be set to 1 to indicate a read. The
rest of the read cycle is the same as described in the previous
paragraph for reading from a preset pointer location.
Inadvertent 8-Bit Read from a 16-Bit
Register: A Caution
An inadvertent 8-bit read from a 16-bit register, with the D7 bit low,
can cause the FM75 to pause in a state where the SDA line is
pulled low by the output data and is incapable of receiving either
a stop or a start condition from the master. The only way to remove
the FM75 from this state is to continue clocking for 9 cycles until
SDA goes high, at which time issuing a stop condition will reset the
FM75. This sequence can be seen in Figure 7 below.
Nine additional clock cycles to reset the FM75
SCL
SDA
1
Start
from
Master
0
0
1
A2 A1 A0 R/W A D7 D6 D5 D4 D3 D2 D1 D0 N
Address Byte
Ack
from
FM75
Most Significant
Data Byte
(from FM75)
D7
D6 D5 D4 D3 D2 D1 D0 N
No Ack
from
Master
Stop intended by
Master, but FM75
SDA line locked
low
Master must
detect error
condition on
FM75
No Ack Stop
from Condition
from
Master
Master
Figure 7. Inadvertent 8-Bit Read from 16-Bit Register Where D7 = 0 and Forces Output Low
10
FM75 Rev. A.4
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Reading
....
SCL
SDA
S
1
0
0
1
A2
A1
A0
A
R/W
0
0
Ack
from
FM75
Address Byte
0
0
0
0
P1
P0
....
A
Ack
from
aTS75
Pointer Byte
.SCL
..
SDA
...
S
1
0
Repeat
Start
from
Master
A2
1
0
A0 R/W
A1
A
D7
Ack
from
FM75
Address Byte
D6
D5
D4
D3
D2
D1
D0
A
Ack
from
Master
Most Significant Data
Byte
(from FM75)
D7
D6
D5
D4
0
0
0
0
N
P
No Ack
from
Master
Least Significant Data Byte
(from FM75)
Figure 8. Pointer set followed by immediate read from a 2-byte register
(Temperature, TOS or THYST Register)
SCL
SDA
S
1
0
0
A2
1
A1
A0
R/W
A
D7
Ack
from
FM75
Address
Byte
D6
D5
D4
D3
D2
D1
D0
A
D7
Ack
from
Master
Most Significant Data
Byte
(from FM75)
D6
D5
D4
0
0
0
Least Significant Data
Byte
(from FM75)
0
N
P
No Ack
from
Master
Figure 9. Two-byte read from preset pointer location (Temperature, TOS or THYST Register)
SCL
SDA
S
1
0
0
1
A2
A1
Address Byte
A0
R/W
A
Ack
from
FM75
X
D6
D5
D4
D3
D2
Data Byte
(from FM75)
D1
D0
N
P
No Ack
from
Master
Figure 10. One-byte read from Configuration Register with preset pointer
11
FM75 Rev. A.4
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Note: This segment of this timing diagram is a generic
pointer set cycle which must be followed by either an
immediate read cycle or write cycle as shown in this
figure and in figures 10, 11, and 12.
1
S
SDA
0
0
A2
1
A1
A0
A
R/W
0
0
0
0
Ack
from
FM75
Address Byte
0
0
P1
P0
....
A
Ack
from
FM75
Pointer Byte
....
....
A
D7
D6
D5
D4
D3
D2
D1
D0
A
D7
Ack
from
FM75
Most Significant Data Byte
(from Master)
D6
D5
D4
0
0
0
0
P
A
Ack
from
FM75
Least Significant Data Byte
(from Master)
Figure 11. Pointer set followed by immediate write to a 2-byte register (TOS or THYST Register)
SCL
SDA
S
1
0
0
A2
1
A1
A0
A
R/W
0
0
0
Ack
from
FM75
Address Byte
0
0
0
P1
A
P0
S
1
0
0
Ack
from Repeat Start
from
FM75
Master
Pointer Byte
A2
1
A1
A0
R/W
Address Byte
....
....
1
0
0
A2
1
A1
A0
R/W
A
X
D6
D5
Ack
from
FM75
Address Byte
(repeated here for
clarity, transmitted only
once in the actual sequence)
D4
D3
D2
D1
D0
N
P
No Ack
from
Master
Data Byte
(from FM75)
Figure 12. Pointer set followed by immediate read from Configuration Register
SCL
S
1
0
0
1
A2
A1
A0
R/W
A
0
0
0
0
0
0
P1
P0
A
X
D6 D5
D4
D3
D2
D1
D0
A
P
SDA
Address Byte
Ack
from
FM75
Pointer Byte
Ack
from
FM75
Ack
from
FM75
Data Byte
(from Master)
Figure 13. Pointer set followed by immediate write to the Configuration Register
12
FM75 Rev. A.4
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
....
SCL
0.189 - 0.197
(4.800 - 5.004)
8 7 6 5
0.228 - 0.244
(5.791 - 6.198)
1 2 3 4
Lead #1
IDENT
0.010 - 0.020
x 45¡
(0.254 - 0.508)
0.0075 - 0.0098
(0.190 - 0.249)
Typ. All Leads
0.150 - 0.157
(3.810 - 3.988)
0.053 - 0.069
(1.346 - 1.753)
8¡ Max, Typ.
All leads
0.004
(0.102)
All lead tips
0.004 - 0.010
(0.102 - 0.254)
Seating
Plane
0.014
(0.356)
0.016 - 0.050
(0.406 - 1.270)
Typ. All Leads
0.050
(1.270)
Typ
0.014 - 0.020 Typ.
(0.356 - 0.508)
Molded Package, Small Outline, 0.15 Wide, 8-Lead (M8)
FS Package Number M08A
8-Lead Molded Mini Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
FS Package Number MA08D
13
FM75 Rev. A.4
www.fairchildsemi.com
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Physical Dimensions inches (millimeters) unless otherwise noted
FM75 Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm
Ordering Information
Part Number
Package
Temperature Range
How Supplied
FM75M8
8-Lead SOP
-40°C to 125°C
95 units in Tube
FM75M8x
8-Lead SOP
-40°C to 125°C
1000 units on T&R
FM75MM8
8-Lead MSOP
-40°C to 125°C
95 units in Tube
FM75MM8x
8-Lead MSOP
-40°C to 125°C
1000 units on T&R
Life Support Policy
Fairchild's products are not authorized for use as critical components in life support devices or systems without the express written
approval of the President of Fairchild Semiconductor Corporation. As used herein:
1. Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body, or (b) support
or sustain life, and whose failure to perform, when properly
used in accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a significant
injury to the user.
Fairchild Semiconductor
Americas
Customer Response Center
Tel. 1-888-522-5372
2. A critical component is any component of a life support device
or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,
or to affect its safety or effectiveness.
Fairchild Semiconductor
Europe
Fax:
+44 (0) 1793-856858
Deutsch
Tel:
+49 (0) 8141-6102-0
English
Tel:
+44 (0) 1793-856856
Français
Tel:
+33 (0) 1-6930-3696
Italiano
Tel:
+39 (0) 2-249111-1
Fairchild Semiconductor
Hong Kong
8/F, Room 808, Empire Centre
68 Mody Road, Tsimshatsui East
Kowloon. Hong Kong
Tel; +852-2722-8338
Fax: +852-2722-8383
Fairchild Semiconductor
Japan Ltd.
4F, Natsume Bldg.
2-18-6, Yushima, Bunkyo-ku
Tokyo, 113-0034 Japan
Tel: 81-3-3818-8840
Fax: 81-3-3818-8841
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
14
FM75 Rev. A.4
www.fairchildsemi.com