IRFR420, IRFU420 Data Sheet 2.5A, 500V, 3.000 Ohm, N-Channel Power MOSFETs These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17405. Ordering Information PART NUMBER July 1999 File Number 2411.3 Features • 2.5A, 500V • rDS(ON) = 3.000Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol PACKAGE D BRAND IRFR420 TO-252AA IRFR420 IRFU420 TO-251AA IRFU420 G NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-252AA variant in the tape and reel, i.e., IRFR4209A. S Packaging JEDEC TO-251AA JEDEC TO-252AA SOURCE DRAIN GATE DRAIN (FLANGE) GATE DRAIN (FLANGE) ©2001 Fairchild Semiconductor Corporation DRAIN SOURCE IRFR420, IRFU420 Rev. A IRFR420, IRFU420 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFR420, IRFU420 500 500 2.5 1.6 8 ±20 50 0.4 210 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER BVDSS ID = 250µA, VGS = 0V (Figure 10) 500 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V - - 25 µA µA Zero Gate Voltage Drain Current SYMBOL IDSS TEST CONDITIONS VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge rDS(ON) gfs td(ON) tr td(OFF) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = ±20V ID = 1.3A, VGS = 10V (Figures 8, 9) VDS ≥ 10V, ID = 2.0A (Figure 12) VDD = 250V, ID ≈ 2.5A, RGS = 18Ω, RL = 100Ω, VGS = 10V MOSFET Switching Times are Essentially Independent of Operating Temperature tf Qg(TOT) Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VGS = 10V, ID = 2.5A, VDS = 0.8 x Rated BVDSS IG(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) Internal Drain Inductance LD Measured From the Drain Lead, 6.0mm (0.25in) From Package to Center of Die Internal Source Inductance LS Measured From the Source Lead, 6.0mm (0.25in) From Package to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D - - 250 2.5 - - A - - ±100 nA Ω - 2.9 3.0 1.5 2.2 - S - 10 15 ns - 12 18 ns - 28 42 ns - 12 18 ns - 13 19 nC - 2.2 3.3 nC - 6.8 10 nC - 350 - pF - 54 - pF - 9.6 - pF - 4.5 - nH - 7.5 - nH - - 2.5 oC/W - - 110 oC/W LD G LS S Thermal Resistance, Junction to Case RθJC Thermal Resistance, Junction to Ambient RθJA ©2001 Fairchild Semiconductor Corporation Mounted on FR-4 Board with Minimum Mounting pad IRFR420, IRFU420 Rev. A IRFR420, IRFU420 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISDM TEST CONDITIONS MIN Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier D TYP MAX UNITS - - 2.5 A - - 8 A G S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge TJ = 25oC, ISD = 2.5A, VGS = 0V (Figure 13) - - 1.6 V trr TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/µs 130 270 540 ns QRR TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/µs 0.57 1.2 2.3 µC VSD NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 60mH, RG = 25Ω, peak IAS = 2.5A. Typical Performance Curves Unless Otherwise Specified 2.5 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 0.2 0 2.0 1.5 1.0 0.5 0 0 50 100 150 25 75 50 TC, CASE TEMPERATURE (oC) 125 100 150 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE ZθJC, THERMAL IMPEDANCE 10 0.5 1 0.2 0.1 0.1 10-2 10-5 PDM 0.05 0.02 0.01 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC SINGLE PULSE 10-4 0.1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (s) 1 10 FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE ©2001 Fairchild Semiconductor Corporation IRFR420, IRFU420 Rev. A IRFR420, IRFU420 Typical Performance Curves Unless Otherwise Specified (Continued) 5 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 100µs 1ms 1.0 OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 0.1 -1 10ms 4 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VGS = 10V VGS = 6.0V 3 VGS = 5.5V 2 VGS = 5.0V 1 VGS = 4.0V TJ = MAX RATED SINGLE PULSE -10 -100 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 -1000 0 50 10 VGS = 5.5V 2 VGS = 5.0V VGS 4.0V 0 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VGS = 6.0V 3 0 1 TJ = 150oC 0.1 20 10-2 0 FIGURE 6. SATURATION CHARACTERISTICS NORMALIZED DRAIN TO SOURCE ON RESISTANCE rDS(ON), DRAIN TO SOURCE ON RESISTANCE (S) 3.0 8 VGS = 10V 6 VGS = 20V 2 0 2.4 2 4 6 ID, DRAIN CURRENT (A) 8 FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT ©2001 Fairchild Semiconductor Corporation 10 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 1.3A 1.8 1.2 0.6 0 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 7. TRANSFER CHARACTERISTICS PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 4 TJ = 25oC VGS = 4.5V 8 12 16 4 VDS, DRAIN TO SOURCE VOLTAGE (V) 10 250 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS ≥ 50V VGS = 10V 1 200 FIGURE 5. OUTPUT CHARACTERISTICS 5 4 150 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 100 VGS = 4.5V -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRFR420, IRFU420 Rev. A IRFR420, IRFU420 Typical Performance Curves Unless Otherwise Specified (Continued) 750 1.25 1.15 1.05 0.95 0.85 0.75 CISS 450 COSS 300 CRSS 150 -40 0 40 80 120 0 160 1 2 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 100 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 3.2 TJ = 25oC 2.4 TJ = 150oC 1.6 0.8 0 0.8 1.6 2.4 ID, DRAIN CURRENT (A) 3.2 VGS, GATE TO SOURCE (V) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 0V TJ = 150oC TJ = 25oC 1 4.0 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 20 102 10 0.1 0 5 10 2 5 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE ISD, SOURCE TO DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) 4.0 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 600 C, CAPACITANCE (nF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250µA 0 0.3 0.6 0.9 1.2 VSD, SOURCE TO DRAIN VOLTAGE (V) 1.5 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE ID = 2.5A VDS = 400V VDS = 250V VDS = 100V 16 12 8 4 0 0 4 8 12 16 20 Qg(TOT) , TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE ©2001 Fairchild Semiconductor Corporation IRFR420, IRFU420 Rev. A IRFR420, IRFU420 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN + RG REQUIRED PEAK IAS VDS IAS VDD VDD - VGS DUT tP 0V IAS 0 0.01Ω tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% + RG - VDD 10% 0 10% DUT 90% VGS VGS 0 FIGURE 17. SWITCHING TIME TEST CIRCUIT 0.2µF 50% PULSE WIDTH 10% FIGURE 18. RESISTIVE SWITCHING WAVEFORMS VDS (ISOLATED SUPPLY) CURRENT REGULATOR 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT ©2001 Fairchild Semiconductor Corporation IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRFR420, IRFU420 Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ Star* Power™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H