WF512K32-XXX5 White Electronic Designs 512Kx32 5V FLASH MODULE, SMD 5962-94612 FEATURES n Access Times of 60, 70, 90, 120, 150ns n Packaging Commercial, Industrial and Military Temperature Ranges n 5 Volt Programming. 5V ± 10% Supply. n Low Power CMOS, 6.5mA Standby 68 lead, 40mm, Low Capacitance Hermetic CQFP (Package 501)1 n Embedded Erase and Program Algorithms n TTL Compatible Inputs and CMOS Outputs n 68 lead, 22.4mm (0.880") Low Profile CQFP (G2U) 3.5mm (0.140") high, (Package 510)1 Built-in Decoupling Caps for Low Noise Opera tion n 68 lead, 23.9mm (0.940") Low Profile CQFP (G1U)1 3.5mm (0.140") high, (Package 519) Page Program Operation and Internal Program Control Time n Weight WF512K32 - XG2UX5 - 8 grams typical WF512K32 - XH1X5 - 13 grams typical WF512K32N - XG4X51 - 20 grams typical WF512K32 - XG4TX51 - 20 grams typical WF512K32 - XG1UX51 - 5 grams typical WF512K32 - XG1TX5 - 5 grams typical WF512K32-XG2LX5 - 8 grams typical 68 lead, 23.9mm (0.940") Low Profile CQFP (G1T), 4.06mm (0.160") high, Package (524) 68 lead, 22.4mm (0.880") CQFP (G2L) 5.08mm (0.200") high, Package (528) n Organized as 512Kx32 n 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP (Package 400(1)). 68 lead, 40mm, Low Profile 3.5mm (0.140"), CQFP (Package 502)1 n n 100,000 Erase/Program Cycles Minimum Note 1: Package Not Recommended for New Design See Flash Programming Application Note 4M5 for algorithms. Sector Architecture 8 equal size sectors of 64KBytes each Any combination of sectors can be concur rently erased. Also supports full chip erase PIN DESCRIPTION FIG. 1 PIN CONFIGURATION FOR WF512K32N-XH1X5 TOP VIEW I/O0-31 Data Inputs/Outputs A0-18 Address Inputs WE 1-4 Write Enables CS 1-4 Chip Selects OE Output Enable VCC Power Supply GND Ground NC Not Connected BLOCK DIAGRAM W E1 CS1 W E2 CS2 W E3 CS3 W E4 CS4 OE A0-18 512K x 8 8 I/O0-7 August 2003 Rev. 6 1 512K x 8 8 I/O8-15 512K x 8 8 I/O16-23 512K x 8 8 I/O24-31 White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com WF512K32-XXX5 White Electronic Designs TOP VIEW PIN DESCRIPTION NC A0 A1 A2 A3 A4 A5 CS1 GND CS3 WE A6 A7 A8 A9 A10 VCC FIG. 2 PIN CONFIGURATION FOR WF512K32F-XG4X51 (LOW CAPACITANCE) A ND WF512K32-XG4TX51 I/O0-31 Data Inputs/Outputs 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 A0-18 Address Inputs WE Write Enable CS1-4 Chip Selects OE Output Enable VCC Power Supply GND Ground NC Not Connected BLOCK DIAGRAM CS 3 CS 2 CS 1 CS 4 WE OE A0-18 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 512K x 8 512K x 8 512K x 8 VCC A11 A12 A13 A14 A15 A16 CS2 OE CS4 A17 A18 NC NC NC NC NC 512K x 8 8 8 I/O8-15 I/O0-7 Note 1: Package not recommended for new designs 8 I/O16-23 8 I/O24-31 NC A0 A1 A2 A3 A4 A5 CS3 GND CS4 WE1 A6 A7 A8 A9 A10 VCC FIG. 3 PIN CONFIGURATION FOR WF512K32-XG2UX5, WF512K32-XG2LX5, WF512K32-XG1TX5 AND WF512K32-XG1UX51 TOP VIEW PIN DESCRIPTION I/O0-31 Data Inputs/Outputs 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 WE1-4 Write Enables CS1-4 Chip Selects OE Output Enable VCC Power Supply GND Ground WE 1 CS 1 WE 2 CS 2 WE 3 CS 3 WE 4 CS 4 OE A0-18 512K x 8 512K x 8 512K x 8 512K x 8 NC NC A18 WE4 OE CS2 A17 WE2 WE3 A16 CS1 A15 A14 A13 A12 A11 Address Inputs BLOCK DIAGRAM 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 VCC A0-18 8 I/O0-7 White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com 2 8 I/O8-15 8 I/O16-23 8 I/O24-31 WF512K32-XXX5 White Electronic Designs CAPACITANCE (TA = +25°C) A BSOLUTE MAXIMUM RATINGS (1) Parameter Unit -55 to +125 °C Parameter Supply Voltage Range (VCC) -2.0 to +7.0 V OE capacitance COE VIN = 0 V, f = 1.0 MHz Signal voltage range (any pin except A9) (2) -2.0 to +7.0 V CWE VIN = 0 V, f = 1.0 MHz Storage Temperature Range -65 to +150 °C Lead Temperature (soldering, 10 seconds) +300 °C Data Retention (Mil Temp) 20 years WE1-4 capacitance HIP (PGA) CQFP G4T CQFP G2U/G1U/G1T/G2L Endurance - write/erase cycles (Mil Temp) 100,000 cycles min. Operating Temperature A9 Voltage for sector protect (VID) (3) -2.0 to +14.0 V NOTES: 1. Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions,inputs may overshoot Vss to -2.0 V for periods of up to 20ns. Maximum DC voltage on output and I/O pins is Vcc + 0.5V. During voltage transitions, outputs may overshoot to Vcc + 2.0 V for periods of up to 20ns. 3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A9 may overshoot Vss to -2V for periods of up to 20ns. Maximum DC input voltage on A9 is +13.5V which may overshoot to 14.0 V for periods up to 20ns. Symbol Min Max Supply Voltage V CC 4.5 5.5 V Input High Voltage VIH 2.0 V CC + 0.5 V Input Low Voltage V IL -0.5 +0.8 V Operating Temp. (Mil.) TA -55 +125 °C Operating Temp. (Ind.) TA -40 +85 °C VID 11.5 12.5 V Max Unit 50 pF pF 20 50 15 CS1-4 capacitance CCS VIN = 0 V, f = 1.0 MHz 20 pF Data I/O capacitance CI/O VI/O = 0 V, f = 1.0 MHz 20 pF Address input capacitance CAD VIN = 0 V, f = 1.0 MHz 50 pF LOW CAPACITANCE CQFP (TA = +25°C) Parameter OE capacitance CQFP G4 capacitance CS1-4 capacitance Data I/O capacitance Symbol COE CWE CCS CI/O Conditions VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz VIN = 0 V, f = 1.0 MHz VI/O = 0 V, f = 1.0 MHz CAD VIN = 0 V, f = 1.0 MHz Address input capacitance Max Unit 32 pF 32 pF 15 pF 15 pF 32 pF This parameter is guaranteed by design but not tested. Unit A9 Voltage for Sector Protect Conditions This parameter is guaranteed by design but not tested. RECOMMENDED OPERATING CONDITIONS Parameter Symbol DC CHARACTERISTICS - CMOS COMPATIBLE (VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C) Parameter Input Leakage Current Symbol Conditions Min Max Unit µA ILI V CC = 5.5, V IN = GND or VCC 10 I LOx32 V CC = 5.5, V IN = GND or VCC 10 µA I CC1 CS = VIL, OE = VIH, f = 5MHz 190 mA VCC Active Current for Program or Erase (2) I CC2 CS = VIL, OE = VIH 240 mA VCC Standby Current ICC4 V CC = 5.5, CS = VIH, f = 5MHz 6.5 mA V CC Static Current ICC3 V CC = 5.5, CS = VIH 0.6 mA Output Low Voltage V OL I OL = 8.0 mA, V CC = 4.5 Output High Voltage V OH1 I OH = 2.5 mA, V CC = 4.5 Output Leakage Current VCC Active Current for Read (1) 0.45 0.85 X V CC Low V CC Lock-Out Voltage V LKO 3.2 4.2 DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V NOTES: 1. The ICC current listed includes both the DC operating current and the frequency dependent component (at 5 MHz). The frequency component typically is less than2 mA/MHz, with OE at VIH. 2. ICC active while Embedded Algorithm (program or erase) is in progress. 3 V V V White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com WF512K32-XXX5 White Electronic Designs AC CHARACTERISTICS WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED (VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C) Parameter Symbol -60 Min -70 Max Min -90 Max Min -120 Max Min -150 Max Min Unit Max Write Cycle Time tAVAV tWC 60 70 90 120 150 ns Write Enable Setup Time tWLEL t WS 0 0 0 0 0 ns Chip Select Pulse Width t ELEH t CP 40 45 45 50 50 ns Address Setup Time t AVEL t AS 0 0 0 0 0 ns Data Setup Time t DVEH tDS 40 45 45 50 50 ns Data Hold Time t EHDX tDH 0 0 0 0 0 ns Address Hold Time tELAX t AH 40 45 45 50 50 ns t EHEL t CPH 20 Chip Select Pulse Width High Duration of Byte Programming Operation (1) t WHWH1 Sector Erase Time (2) t WHWH2 Read Recovery Time t GHEL 20 300 15 0 20 300 20 300 15 15 0 0 20 ns 300 15 0 300 µs 15 sec 0 ns Chip Programming Time 11 11 11 11 11 sec Chip Erase Time (3) 64 64 64 64 64 sec NOTES: 1. Typical value for tWHWH1 is 7µs. 2. Typical value for tWHWH2 is 1sec. 3. Typical value for Chip Erase Time is 8sec. AC TEST CONDITIONS FIG. 4 AC TEST CIRCUIT Parameter Typ Unit Input Pulse Levels VIL = 0, VIH = 3.0 V Input Rise and Fall 5 ns 1.5 V Input and Output Reference Level Output Timing Reference Level 1.5 V Notes: VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75W. VZ is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com 4 WF512K32-XXX5 White Electronic Designs AC CHARACTERISTICS WRITE/ERASE/PROGRAM OPERATIONS, WE CONTROLLED (VCC = 5.0V, TA = -55°C TO +125°C) Parameter Symbol -60 Min Max Max -120 Max -150 Min Max Unit WF512K32-XXX5 120 150 ns t WC Chip Select Setup Time t ELWL tCS 0 0 0 0 0 ns Write Enable Pulse Width t WLWH t WP 40 45 45 50 50 ns Address Setup Time t AVWH t AS 0 0 0 0 0 ns Data Setup Time t DVWH tDS 40 45 45 50 50 ns Data Hold Time t WHDX tDH 0 0 0 0 0 ns Address Hold Time tWHAX t AH 40 45 45 50 50 ns Write Enable Pulse Width High t WHWL t WPH 20 Duration of Byte Programming Operation (1) t WHWH1 t WHWH2 tGHWL 90 Min t AVAV Read Recovery Time before Write 70 -90 Min Write Cycle Time Sector Erase Time (2) 60 -70 Max Min 20 20 300 20 300 15 300 15 20 300 15 15 ns 300 µs 15 sec 0 0 0 0 0 ns tVCS 50 50 50 50 50 µs Output Enable Setup Time tOES 0 0 0 0 0 ns Output Enable Hold Time (4) tOEH 10 10 10 10 10 ns VCC Set-up Time Chip Programming Time 11 Chip Erase Time (3) 11 64 11 64 11 64 11 64 64 sec sec NOTES: 1. Typical value for tWHWH1 is 7µs. 2. Typical value for tWHWH2 is 1sec. 3. Typical value for Chip Erase Time is 8sec. 4. For Toggle and Data Polling. AC CHARACTERISTICS READ ONLY OPERATIONS (VCC = 5.0V, TA = -55°C TO +125°C) Parameter Symbol -60 Min -70 Max 60 Min -90 Max 70 Min -120 Max Max Max t AVAV t RC Address Access Time t AVQV tACC 60 70 90 120 150 ns Chip Select Access Time t ELQV t CE 60 70 90 120 150 ns Output Enable to Output Valid t GLQV tOE 30 35 35 50 55 ns Chip Select to Output High Z (1) t EHQZ t DF 20 20 20 30 35 ns Output Enable High to Output High Z (1) t GHQZ t DF 20 20 20 30 35 Output Hold from Address, CS or OE Change, whichever is First t AXQX tOH 0 0 120 Min Unit Read Cycle Time 0 90 Min -150 0 150 0 ns ns ns 1. Guaranteed by design, but not tested 5 White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com White Electronic Designs FIG. 5 AC WAVEFORMS FOR READ OPERATIONS White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com 6 WF512K32-XXX5 WF512K32-XXX5 White Electronic Designs FIG. 6 WRITE/ERASE/PROGRAM OPERATION, WE CONTROLLED NOTES: 1. PA is the address of the memory location to be programmed. 2. PD is the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to the device (for each chip). 4. DOUT is the output of the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence. 7 White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com WF512K32-XXX5 White Electronic Designs White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com AAH tDS tDH 8 VCC tVCS NOTE: 1. SA is the sector address for Sector Erase. Data WE OE CS Addresses tGHWL tCS tWP tWPH 55H 2AAAH tAS 5555H tAH 5555H 80H 5555H AAH 2AAAH 55H SA 10H/30H FIG. 7 AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS WF512K32-XXX5 White Electronic Designs FIG. 8 AC WAVEFORMS FOR DATA POLLING DURING EMBEDDED A LGORITHM OPERATIONS CS OE WE Data D7 D0-D6 t CH tOEH tCE t OE tWHWH 1 or 2 D7 D0-D6 = Invalid t DF t OH D0-D7 Valid Data D7 = Valid Data t OE High Z 9 White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com White Electronic Designs FIG. 9 A LTERNATE CS CONTROLLED PROGRAMMING OPERATION TIMINGS Notes: 1. PA represents the address of the memory location to be programmed. 2. PD represents the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to the device (for each chip). 4. DOUT is the output of the data written to the device. 5. Figure indicates the last two bus cycles of a four bus cycle sequence. White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com 10 WF512K32-XXX5 WF512K32-XXX5 White Electronic Designs PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1) ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES 11 White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com WF512K32-XXX5 White Electronic Designs PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U) o o The White 68 lead G2U CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2U has the TCE and lead inspection advantage of the CQFP form. 0.940" ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES PACKAGE 519: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1U)1 ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES Note 1: Package Not Recommended for New Design White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com 12 WF512K32-XXX5 White Electronic Designs PACKAGE 524: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1T) 25.27 (0.995) ± 0.13 (0.005) SQ 4.06 (0.160) MAX 23.88 (0.940) ± 0.25 (0.010) SQ 0.25 (0.010) MAX 0.83 (0.033) ± 0.32 (0.013) 00/80 0.84 (0.033) REF DETAIL A SEE DETAIL "A" 1.27 (0.050) 0.38 (0.015) ± 0.05 (0.002) 20.3 (0.800) REF ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES PACKAGE 528: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2L) 25.15 (0.990) – 0.25 (0.010) MAX 5.10 (0.200) MAX 22.36 (0.880) – 0.25 (0.010) MAX 0.25 (0.010) – 0.10 (0.002) 0.23 (0.009) REF 24.0 (0.946) – 0.25 (0.010) R 0.127 (0.005) 1.37 (0.054) MIN 0.004 2O / 9O 0.89 (0.035) – 1.14 (0.045) 1.27 (0.050) TYP 0.38 (0.015) – 0.05 (0.002) 20.31 (0.800) REF 0.940" TYP ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES 13 White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com WF512K32-XXX5 White Electronic Designs PACKAGE 501: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G4)1 5.1 (0.200) MAX 39.6 (1.56) ± 0.38 (0.015) SQ 1.27 (0.050) ± 0.1 (0.005) PIN 1 IDENTIFIER Pin 1 12.7 (0.500) ± 0.5 (0.020) 4 PLACES 5.1 (0.200) ± 0.25 (0.010) 4 PLACES 1.27 (0.050) TYP 0.25 (0.010) ± 0.05 (0.002) 0.38 (0.015) ± 0.08 (0.003) 68 PLACES 38 (1.50) TYP 4 PLACES ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES Note 1: Package Not Recommended for New Design PACKAGE 502: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T)1 5.1 (0.200) MAX 39.6 (1.56) ± 0.38 (0.015) SQ 1.27 (0.050) ± 0.1 (0.005) PIN 1 IDENTIFIER Pin 1 12.7 (0.500) ± 0.5 (0.020) 4 PLACES 5.1 (0.200) ± 0.25 (0.010) 4 PLACES 1.27 (0.050) TYP 0.38 (0.015) ± 0.08 (0.003) 68 PLACES 0.25 (0.010) ± 0.05 (0.002) 38 (1.50) TYP 4 PLACES ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES Note 1: Package Not Recommended for New Design White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com 14 WF512K32-XXX5 White Electronic Designs ORDERING INFORMATION W F 512K32 X - XXX X X 5 X LEAD FINISH: Blank = Gold plated leads A = Solder dip leads VPP PROGRAMMING VOLTAGE 5=5V DEVICE GRADE: Q = MIL-STD-883 Compliant M = Military Screened -55°C to +125°C I = Industrial -40°C to +85°C C = Commercial 0°C to +70°C PACKAGE TYPE: H1 = 1.075" sq. Ceramic Hex In Line Package, HIP (Package 400*) G2U = 22.4mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 510) G2L = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 528) G1T = 23.9mm Low Profile CQFP (Package 524) G1U 1 = 23.9mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 519) G41 = 40 Low Profile CQFP (Package 501) G4T1 = 40mm Low Profile CQFP (Package 502) ACCESS TIME (ns) IMPROVEMENT MARK N = No Connect at pins 21 and 39 in HIP for Upgrade ORGANIZATION, 512K x 32 User configurable as 1M x 16 or 2M x 8 FLASH WHITE ELECTRONIC DESIGNS CORP. Note 1: Package Not Recommended for New Design * Call factory for PGA type (HIP) package options 15 White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com WF512K32-XXX5 White Electronic Designs DEVICE TYPE SPEED PACKAGE SMD NO. 512K x 32 Flash Module 150ns 66 pin HIP (H1) 1.075" sq. 5962-94612 01H4X 512K x 32 Flash Module 120ns 66 pin HIP (H1) 1.075" sq. 5962-94612 02H4X 512K x 32 Flash Module 90ns 66 pin HIP (H1) 1.075" sq. 5962-94612 03H4X 512K x 32 Flash Module 70ns 66 pin HIP (H1) 1.075" sq. 5962-94612 04H4X 512K x 32 Flash Module 150ns 68 lead CQFP Low Profile (G4T)1 5962-94612 01HTX1 512K x 32 Flash Module 120ns 68 lead CQFP Low Profile (G4T)1 5962-94612 02HTX1 512K x 32 Flash Module 90ns 68 lead CQFP Low Profile (G4T) 1 5962-94612 03HTX1 512K x 32 Flash Module 70ns 68 lead CQFP Low Profile (G4T) 1 5962-94612 04HTX1 512K x 32 Flash Module 150ns 68 lead Low Capacitance CQFP (G4) 512K x 32 Flash Module 120ns 512K x 32 Flash Module 90ns 5962-94612 01HNX1 1 68 lead Low Capacitance 5962-94612 02HNX1 CQFP (G4)1 68 lead Low Capacitance CQFP (G4) 512K x 32 Flash Module 70ns 68 lead Low Capacitance CQFP (G4) 5962-94612 03HNX1 1 5962-94612 04HNX1 1 512K x 32 Flash Module 150ns 68 lead CQFP/J (G2U) 512K x 32 Flash Module 120ns 68 lead CQFP/J (G2U) 5962-94612 01HZX 5962-94612 02HZX 512K x 32 Flash Module 90ns 68 lead CQFP/J (G2U) 5962-94612 03HZX 512K x 32 Flash Module 70ns 68 lead CQFP/J (G2U) 5962-94612 04HZX 512K x 32 Flash Module 150ns 68 lead CQFP (G1U)1 5962-94612 01H9X1 512K x 32 Flash Module 120ns 68 lead CQFP (G1U)1 5962-94612 02H9X1 512K x 32 Flash Module 90ns 68 lead CQFP (G1U) 1 5962-94612 03H9X1 512K x 32 Flash Module 70ns 68 lead CQFP (G1U) 1 5962-94612 04H9X1 512K x 32 Flash Module 150ns 68 lead CQFP (G2L) 5962-94612 01HAX 512K x 32 Flash Module 120ns 68 lead CQFP (G2L) 5962-94612 02HAX 512K x 32 Flash Module 90ns 68 lead CQFP (G2L) 5962-94612 03HAX 512K x 32 Flash Module 70ns 68 lead CQFP (G2L) 5962-94612 04HAX White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com 16