October 1995 74VHC943 300 Baud Modem (5V Supply) General Description Features The 74VHC943 is a full duplex low speed modem. It provides a 300 baud bidirectional serial interface for data communication over telephone lines and other narrow bandwidth channels. It is Bell 103 compatible. The 74VHC943 utilizes advanced silicon-gate CMOS technology. Switched capacitor techniques are used to perform analog signal processing. Y MODULATOR SECTION The modulator contains a frequency synthesizer and a sine wave synthesizer. It produces a phase coherent frequency shift keyed (FSK) output. Y Y Y Y Y Y Y Y Y Y LINE DRIVER AND HYBRID SECTION The line driver and hybrid are designed to facilitate connection to a 600X phone line. They can perform two to four wire conversion and drive the line at a maximum of b9 dBm. Applications Y Y DEMODULATOR SECTION The demodulator incorporates anti-aliasing filters, a receive filter, limiter, discriminator, and carrier detect circuit. The nine-pole receive filter provides 60 dB of transmitted tone rejection. The discriminator is fully balanced for stable operation. 5V supply Drives 600X at b9 dBm All filters on chip Transmit level adjustment compatible with universal service order code TTL and CMOS compatible logic All inputs protected against static damage Low power consumption Full duplex answer or originate operation Analog loopback for self test Power down mode Direct Pin and function replacement for the 74HC943 Y Y Y Y Y Y Built-in low speed modems Remote data collection Radio telemetry Credit verification Stand-alone modems Point-of-sale terminals Tone signaling systems Remote process control Commercial Package Number Package Description 74VHC943WM M20B 20-Lead Molded JEDEC SOIC (0.300× Wide) 74VHC943N N20A 20-Lead Molded DIP Note: Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter ‘‘X’’ to the ordering code. Connection Diagram Pin Assignments for SOIC and PDIP TL/F/11679 – 1 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/11679 RRD-B30M125/Printed in U. S. A. 74VHC943 300 Baud Modem (5V Supply) PRELIMINARY Block Diagram TL/F/11679 – 2 2 Description of Pin Functions Pin Pin Name Function 1 DSI 2 ALB Driver Summing Input: This input may be used to transmit externally generated tones such as dual tone multifrequency (DTMF) dialing signals. Analog Loop Back: A logic high on this pin causes the modulator output to be connected to the demodulator input so that data is looped back through the entire chip. This is used as a chip self test. If ALB and SQT are simultaneously held high the chip powers down. No. 3 CD 4 CDT 5 6 RXD VCC 7 CDA 8 XTALD 9 XTALS Name Function 10 FTLC 11 12 13 TXD GND O/A Filter Test/Limiter Capacitor: This is connected to a high impedance output of the receiver filter. It may thus be used to evaluate filter performance. This pin may also be driven to evaluate the demodulator. RXA1 and RXA2 must be grounded during this test. For normal modem operation FTLC is AC grounded via a 0.1 mF bypass capacitor. Transmitted Data: This is the data input. Ground: This defines the chip 0V. 14 SQT 15 RXA2 No. Carrier Detect: This pin goes to a logic low when carrier is sensed by the carrier detect circuit. Carrier Detect Timing: A capacitor on this pin sets the time interval that the carrier must be present before the CD goes low. Received Data: This is the data output pin. Positive Supply Pin: A a 5V supply is recommended. Carrier Detect Adjust: This is used for adjustment of the carrier detect threshold. Carrier detect hysteresis is set at 3 dB. Crystal Drive: XTALD and XTALS connect to a 3.5795 MHz crystal to generate a crystal locked clock for the chip. If an external circuit requires this clock XTALD should be sensed. If a suitable clock is already available in the system. XTALD can be driven. Crystal Sense: Refer to pin 8 for details. 3 16 RXA1 17 TXA 18 EXI 19 GNDA 20 TLA Originate/Answer mode select: When logic high this pin selects the originate mode of operation. Squelch Transmitter: This disables the modulator when held high. The EXI input remains active. If SQT and ALB are simultaneously held high the chip powers down. Receive Analog Ý2: RXA2 and RXA1 are analog inputs. When connected as recommended they produce a 600X hybrid. Receive Analog Ý1: See RXA2 for details. Transmit Analog: This is the output of the line driver. External Input: This is a high impedance input to the line driver. This input may be used to transmit externally generated tones. When not used for this purpose it should be grounded to GNDA. Analog Ground: Analog signals within the chip are referred to this pin. Transmit Level Adjust: A resistor from this pin to VCC sets the transmit level. Functional Description receive filter is an anti-alias filter which attenuates high frequency noise before sampling occurs. The signal then goes to the second stage of the receive filter where the transmitted tones and other noise are filtered from the received signal. This is a switch capacitor nine pole filter providing at least 60 dB of transmitted tone rejection. This also provides high attenuation at 60 Hz, a common noise component. INTRODUCTION A modem is a device for transmitting and receiving serial data over a narrow bandwidth communication channel. The 74VHC943 uses frequency shift keying (FSK) of audio frequency tone. The tone may be transmitted over the switched telephone network and other voice grade channels. The 74VHC943 is also capable of demodulating FSK signals. By suitable tone allocation and considerable signal processing the 74VHC943 is capable of transmitting and receiving data simultaneously. The tone allocation used by the 74VHC943 and other Bell 103 compatible modems is shown in Table I. The terms ‘‘originate’’ and ‘‘answer’’ which define the frequency allocation come from use with telephones. The modem on the end of the line which initiates the call is called the originate modem. The other modem is the answer modem. The Discriminator The first stage of the discriminator is a hard limiter. The hard limiter removes from the received signal any amplitude modulation which may bias the demodulator toward a mark or a space. It compares the output of the receive filter to the voltage on the 0.1 mF capacitor on the FTLC pin. The hard limiter output connects to two parallel bandpass filters in the discriminator. One filter is tuned to the mark frequency and the other to the space frequency. The outputs of these filters are rectified, filtered and compared. If the output of the mark path exceeds the output of the space path the RXD output goes high. The opposite case sends RXD low. The demodulator is implemented using precision switched capacitor techniques The highly critical comparators in the limiter and discriminator are auto-zeroed for low offset. TABLE I. Bell 103 Tone Allocation Data Originate Modem Answer Modem Transmit Receive Transmit Receive Space 1070 Hz 2025 Hz 2025 Hz 1070 Hz Mark 1270 Hz 2225 Hz 2225 Hz 1270 Hz THE LINE INTERFACE The line interface section performs two to four wire conversion and provides impedance matching between the modem and the phone line. Carrier Detector The output of the discriminator is meaningful only if there is sufficient carrier being received. This is established in the carrier detection circuit which measures the signal on the line. If this exceeds a certain level for a preset period (adjustable by the CDT pin) the CD output goes low indicating that carrier is present. Then the carrier detect threshold is lowered by 3 dB. This provides hysteresis ensuring the CD output remains stable. If carrier is lost CD goes high after the preset delay and the threshold is increased by 3 dB. THE LINE DRIVER The line driver is a power amplifier for driving the line. If the modem is operating as an originate modem, the second harmonics of the transmitted tones fall close to the frequencies of the received tones and degrade the received signal to noise ratio (SNR). The line driver must thus produce low second harmonic distortion. MODULATOR SECTION The modulator consists of a frequency synthesizer and a sine wave synthesizer. The frequency synthesizer produces one of four tones depending on the O/A and TXD pins. The frequencies are synthesized to high precision using a crystal oscillator and variable dual modulus counter. The counters used respond quickly to data changes, introducing negligible bit jitter while maintaining phase coherence. The sine wave synthesizer uses switched capacitors to ‘‘look up’’ the voltages of the sine wave. This sampled signal is then further processed by switched capacitor and continuous filters to ensure the high spectral purity required by FCC regulations. THE HYBRID The voltage on the telephone line is the sum of the transmitted and received signals. The hybrid subtracts the transmitted voltage from the voltage on the telephone line. If the telephone line was matched to the hybrid impedance, the output of the hybrid would be only the received signal. This rarely happens because telephone line characteristic impedances vary considerably. The hybrid output is thus a mixture of transmitted and received signals. THE DEMODULATOR SECTION The Receive Filter The demodulator recovers the data from the received signals. The signal from the hybrid is a mixture of transmitted signal, received signals and noise. The first stage of the 4 Absolute Maximum Ratings (Notes 1 & 2) Operating Conditions Supply Voltage (VCC) DC Input Voltage (VIN) Supply Voltage (VCC) b 0.5 to a 7.0V b 1.5 to VCC a 1.5V DC Input or Output Voltage (VIN, VOUT) b 0.5 to VCC a 0.5V DC Output Voltage (VOUT) g 20 mA Clamp Diode Current (IIK, IOK) g 25 mA DC Output Current, per pin (IOUT) g 50 mA DC VCC or GND Current, per pin (ICC) b 65§ C to a 150§ C Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) 600 mW S.O. Package only 500 mW Lead Temp. (TL) (Soldering 10 seconds) 260§ C Operating Temp. Range (TA) 74VHC Input Rise or Fall Times (tr, tf) Crystal frequency Min 4.5 Max 5.5 0 VCC Units V V b 40 a 85 §C 500 3.579 ns MHz DC Electrical Characteristics VCC e 5V g 10% unless otherwise specified Symbol Parameter 74VHC TA e 25§ C Conditions 74VHC TA eb40§ C to a 85§ C Typ Units Guaranteed Limits VIH Minimum High Level Input Voltage 3.15 3.15 V VIL Maximum Low Level Input Voltage 1.1 1.1 V VOH Minimum High Level Output Voltage VIN e VIH or VIL lIOUTl e 20 mA lIOUTl e 4.0 mA, VCC e 4.5V VCCb0.1 3.84 VCCb0.1 3.7 V Maximum Low Level Voltage VIN e VIH or VIL lIOUTl e 20 mA lIOUTl e 4.0 mA, VCC e 4.5V 0.1 0.33 0.1 0.4 V IIN Maximum Input Current VIN e VCC or GND g 0.1 g 1.0 mA IOZ Output TRI-STATEÉ Leakage Current, RXD and CD Outputs ALB e SQT e VCC g5 mA ICC Maximum Quiescent Supply Current IGNDA Analog Ground Current VIH e VCC, VIL e GND ALB or SQT e GND Transmit Level e b9 dBm ICC Power Down Supply Current VOL VCCb0.05 8.0 10.0 10.0 mA 1.0 2.0 2.0 mA 300 mA ALB e SQT e VCC VIH e VCC, VIL e GND Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C. 5 AC Electrical Characteristics Unless otherwise specified, all specifications apply over the range b40§ C to a 85§ C using a VCC of a 5V g 10%, and a 3.579 MHz g 0.1% crystal* Symbol Parameter Conditions Min Typ Max Units 4 Hz b 10.5 b9 dBm b 62 b 56 dBm TRANSMITTER FCE Carrier Frequency Error Power Output VCC e 5.0V RL e 1.2 kX RTLA e 5490X 2nd Harmonic Energy b 12 RTLA e 5490X RECEIVE FILTER AND HYBRID Hybrid Input Impedance (Pins 15 and 16) 50 FTLC Output Impedance Adjacent Channel Rejection 5 RXA2 e GNDA, TXD e GND or VCC Input to RXA1 kX 10 50 60 kX dB DEMODULATOR (INCORPORATING HYBRID, RECEIVE FILTER AND DISCRIMINATOR) Carrier Amplitude Bit Jitter b 38 SNR e 30 dB Input e b38 dBm Baud Rate e 300 Baud Bit Bias Alternating 1–0 Pattern Carrier Detect Trip Points CDA e 1.2V VCC e 5.0V Carrier Detect Hystereisis VCC e 5.0V ( 100 b 12 dBm 200 ms 5 10 % Off to On b 38 b 36 b 34 dBm On to Off b 41 b 39 b 37 dBm 2 3 4 dB *The demodulator specifications apply to the 74VHC943 operating with a modulator having frequency accuracy, phase jitter and harmonic content equal to or better than the 74VHC943 modulator. AC Specification Circuit TL/F/11679 – 3 6 Applications Information TRANSMIT LEVEL ADJUSTMENT CARRIER DETECT THRESHOLD ADJUSTMENT The transmitted power levels of Table II refer to the power delivered to a 600X load from the external 600X source impedance. The voltage on the load is half the TXA voltage. This should be kept in mind when designing interface circuits which do not match the load and source inpedances. The transmit level is programmable by placing a resistor from TLA to VCC. With a 5.5k resistor the line driver transmits a maximum of b9 dBm. Since most lines from a phone installation to the exchange provide 3 dB of attenuation the maximum level reaching the exchange will be b12 dBm. This is the maximum level permitted by most telephone companies. Thus with this programming the 74VHC943 will interface to most telephones. This arrangement is called the ‘‘permissive arrangement.’’ The disadvantage with the permissive arrangement is that when the loss from a phone to the exchange exceeds 3 dB, no compensation is made and SNR may be unnecessarily degraded. The carrier detect threshold is directly proportional to the voltage on CDA. This pin is connected internally to a high impedance source. This source has a nominal Thevenin equivalent voltage of 1.2V and output impedance of 100 kX. By forcing the voltage on CDA the carrier detect threshold may be adjusted. To find the voltage required for a given threshold the following equation may be used: VCDA e 244 c VON VCDA e 345 c VOFF CARRIER DETECT TIMING ADJUSTMENT CDT: A capacitor on Pin 4 sets the time interval that the carrier must be present before CD goes low. It also sets the time interval that carrier must be removed before CD returns high. The relevant timing equations are: TCDL j 6.4 c CCDT for CD going low TCDH j 0.54 c CCDT for CD going high TABLE II. Universal Service Order Code Resistor Values Line Loss (dB) Transmit Level (dBm) Programming Resistor (RTLA) (X) 0 1 2 3 b 12 b 11 b 10 b9 Open 19,800 9,200 5,490 Where TCDL & TCDH are in seconds, and CCDT is in mF. DESIGN PRECAUTIONS Power supplies to digital systems may contain high amplitude spikes and other noise. To optimize performance of the 74VHC943 operating in close proximity to digital systems, supply and ground noise should be minimized. This involves attention to power supply design and circuit board layout. Power supply decoupling close to the device is recommended. Ground loops should be avoided. For further discussion of these subjects see the Audio/Radio Handbook published by National Semiconductor Corporation. 7 Applications Information (Continued) Interface Circuits for 74VHC943 300 Baud Modem 2 Wire Connection TL/F/11679 – 4 4 Wire Connection TL/F/11679 – 5 CCDT and RTLA should be chosen to suit the application. See the Applications Information for more details. 8 Applications Information (Continued) Complete Acoustically Coupled 300 Baud Modem TL/F/11679 – 6 Note: The efficiency of the acoustic coupling will set the values of R1 and R2. 9 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74VHC Temperature Range Family 74VHC e Commercial 54VHC e Military 943 M X Special Variations ‘‘X’’ e Tape and Reel ‘‘ ’’ e Rail/Tube Device Type Package Code N e Dual-In-Line Package WM e (0.300× Wide) Small Outline Package 10 Physical Dimensions inches (millimeters) 20-Lead (0.300× Wide) Molded Small Outline Package JEDEC Order Number 74VHC943WM NS Package Number M20B 11 74VHC943 300 Baud Modem (5V Supply) Physical Dimensions inches (millimeters) (Continued) 20-Lead (0.300× Wide) Molded Dual-In-Line Package Order Number 74VHC943N NS Package Number N20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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