A D V A N C E I N F O R M A T I O N Address Decode Unit Address GP Bus Controller GP Bus Clock Generation External GP Bus Programmable Interrupt Controller Programmable Interval Timer CPU Bus Interface CPU Bus Arbiter Read/Write Buffers ROM/Flash Controller GP-DMA Controller GP-DMA Request and Grant CPU Request CPU Bus Interface CPU Control/Status Bus Control/Status AMDebug™ Technology and JTAG SDRAM Controller CPU Data Bus Data Am5x86 CPU Bus Interface Unit CPU Address Bus Watchdog Timer FIFOs and FIFO Control Real-Time Clock CMOS RAM PCI Master PCI Bus Arbiter PCI Target General-Purpose Timers Software Timer 16550 UART 16550 UART PCI Bus PCI Requests and Grants Synchronous Serial Interface Programmable I/O Controls PC/AT Compatibility Logic Élan™SC520 Microcontroller Figure 1. Élan™SC520 Microcontroller Block Diagram Élan™SC520 Microcontroller Data Sheet 29