ETC CD4030CSJX

Revised April 2002
CD4030C
Quad EXCLUSIVE-OR Gate
General Description
Features
The CD4030C EXCLUSIVE-OR gates are monolithic complementary MOS (CMOS) integrated circuits constructed
with N- and P-channel enhancement mode transistors. All
inputs are protected against static discharge with diodes to
VDD and VSS.
■ Wide supply voltage range:
■ Low power:
3.0V to 15V
100 nW (typ.)
■ Medium speed operation:
tPHL = tPLH = 40 ns (typ.) at CL = 15 pF, 10V supply
■ High noise immunity
0.45 VCC (typ.)
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Industrial controls
• Remote metering
• Computers
Ordering Code:
Order Number
Package Number
Package Description
CD4030CSJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4030CN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
A
B
J
0
0
0
1
0
1
0
1
1
1
1
0
1 = HIGH Level
0 = LOW Level
© 2002 Fairchild Semiconductor Corporation
DS005961
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CD4030C Quad EXCLUSIVE-OR Gate
October 1987
CD4030C
Logic Diagram
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2
CD4030C
Absolute Maximum Ratings(Note 1)
VSS −0.3V to VSS +15.5V
Voltage at Any Pin (Note 2)
Operating Temperature Range
−55°C to +125°C
Storage Temperature Range
−65°C to +150°C
Power Dissipation (PD)
Dual-In-Line
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics tables provide conditions
for actual device operation.
700 mW
Small Outline
500 mW
VSS +3.0V to VSS +15V
Operating VDD Range
Note 2: This device should not be connected to circuits with power on
because high transient voltages may cause permanent damage.
Lead Temperature
260°C
(Soldering, 10 seconds)
DC Electrical Characteristics
Symbol
IL
PD
VOL
VOH
VNL
VNH
IDN
IDP
II
Parameter
Conditions
−55°C
Min
Typ
+25°C
Max
Min
+125°C
Typ
Max
Min
Typ
Max
Quiescent Device
VDD = 5.0V
0.5
0.005
0.5
30
Current
VDD = 10V
1.0
0.01
1.0
60
Quiescent Device
VDD = 5.0V
2.5
0.025
2.5
150
Dissipation Package
VDD = 10V
10
0.1
10
600
Output Voltage
VDD = 5.0V
0.05
0
0.05
0.05
LOW Level
VDD = 10V
0.05
0
0.05
0.05
Output Voltage
VDD = 5.0V
4.95
4.95
5.0
4.95
HIGH Level
VDD = 10V
9.95
9.95
10
9.95
Noise Immunity
VDD = 5.0V
1.5
1.5
2.25
1.4
(All Inputs)
VDD = 10V
3.0
3.0
4.5
2.9
Noise Immunity
VDD = 5.0V
1.4
1.5
2.25
1.5
(All Inputs)
VDD = 10V
2.9
3.0
4.5
3.0
Output Drive Current
VDD = 5.0V
0.75
0.6
1.2
0.45
N-Channel (Note 3)
VDD = 10V
1.5
1.2
2.4
0.9
Output Drive Current
VDD = 5.0V
−0.45
−0.3
−0.6
−0.21
P-Channel (Note 3)
VDD = 10 V
−0.95
−0.65
−1.3
−0.45
Input Current
VI = 0V or VI = VDD
Units
µA
µW
V
V
V
V
mA
mA
10
pA
Note 3: IDN and IDP are tested one output at a time.
AC Electrical Characteristics (Note 4)
Symbol
tPHL
tPLH
tTHL
tTLH
CI
Parameter
Propagation Delay Time
Propagation Delay Time
Conditions
Limits
Min
Typ
Max
VDD = 5.0V
100
300
VDD = 10V
40
150
VDD = 5.0V
100
300
VDD = 10V
40
150
Transition Time
VDD = 5.0V
70
300
HIGH-to-LOW Level
VDD = 10V
25
150
Transition Time
VDD = 5.0V
80
300
LOW-to-HIGH Level
VDD = 10V
30
150
Input Capacitance
VI = 0V or VI = VDD
5.0
Units
ns
ns
ns
ns
pF
Note 4: AC Parameters are guaranteed by DC correlated testing.
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CD4030C
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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CD4030C Quad EXCLUSIVE-OR Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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