100324 Low Power Hex TTL-to-ECL Translator General Description Features The 100324 is a hex translator, designed to convert TTL logic levels to 100K ECL logic levels. The inputs are compatible with standard or Schottky TTL. A common Enable (E), when LOW, holds all inverting outputs HIGH and holds all true outputs LOW. The differential outputs allow each circuit to be used as an inverting/non-inverting translator, or as a differential line driver. The output levels are voltage compensated over the full −4.2V to −5.7V range. When the circuit is used in the differential mode, the 100324, due to its high common mode rejection, overcomes voltage gradients between the TTL and ECL ground systems. The VEE and VTTL power may be applied in either order. The 100324 is pin and function compatible with the 100124 with similar AC performance, but features power dissipation roughly half of the 100124 to ease system cooling requirements. n n n n n n n Pin/function compatible with 100124 Meets 100124 AC specifications 50% power reduction of the 100124 Differential outputs 2000V ESD protection −4.2V to −5.7V operating range Standard Microcircuit Drawing (SMD) 5962-9153001 Logic Diagram Pin Names Description D0–D5 Data Inputs E Enable Input Q0–Q5 Data Outputs Q0–Q5 Complementary Data Outputs DS100313-4 © 1998 National Semiconductor Corporation DS100313 www.national.com 100324 Low Power Hex TTL-to-ECL Translator August 1998 Connection Diagrams 24-Pin DIP 24-Pin Quad Cerpak DS100313-2 DS100313-1 www.national.com 2 Absolute Maximum Ratings (Note 1) ≥2000V ESD (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Recommended Operating Conditions Above which the useful life may be impaired. −65˚C to +150˚C Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Ceramic +175˚C −7.0V to +0.5V VEE Pin Potential to Ground Pin −0.5V to +6.0V VTTL Pin Potential to Ground Pin Input Voltage (DC) −0.5V to +6.0V Output Current (DC Output HIGH) −50 mA Case Temperature (TC) Military Supply Voltage (VEE) −55˚C to +125˚C −5.7V to −4.2V Note 1: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Military Version DC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −55˚C to +125˚C, VTTL = +4.5V to +5.5V Symbol Parameter Min Max Units TC −1025 −870 mV 0˚C to +125˚C −1085 −870 mV −55˚C −1830 −1620 mV 0˚C to +125˚C −1830 −1555 VOH Output HIGH Voltage VOL Output LOW Voltage mV −55˚C VOHC Output HIGH Voltage −1035 mV 0˚C to +125˚C −1085 mV −55˚C −1610 mV 0˚C to +125˚C −1555 mV −55˚C VOLC Output LOW Voltage Conditions Notes VIN = VIH (Max) or VIL (Min) Loading with 50Ω to −2.0V (Notes 3, 4, 5) VIN = VIH (Max) or VIL (Min) Loading with 50Ω to −2.0V (Notes 3, 4, 5) VIH Input HIGH Voltage 2.0 5.0 V −55˚C to +125˚C Over VTTL, VEE, TC Range (Notes 3, 4, 5, 6) VIL Input LOW Voltage 0.0 0.8 V −55˚C to +125˚C Over VTTL, VEE, TC Range (Notes 3, 4, 5, 6) IIH Input HIGH Current 20 µA −55˚C to +125˚C VIN = +2.7V Breakdown Test 100 µA −55˚C to +125˚C VIN = +7.0V mA −55˚C to +125˚C VIN = +0.4V (Notes 3, 4, 5) −1.2 V −55˚C to +125˚C IIN = −18 mA (Notes 3, 4, 5) −22 mA −55˚C to +125˚C All Inputs VIN = +4.0V (Notes 3, 4, 5) 38 mA −55˚C to +125˚C All Inputs VIN = GND (Notes 3, 4, 5) IIL (Notes 3, 4, 5) Input LOW Current Data −0.9 Enable −5.4 VFCD Input Clamp Diode Voltage IEE VEE Power Supply Current ITTL VTTL Power Supply Current −70 Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures. Note 4: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8. Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8. Note 6: Guaranteed by applying specified input condition and testing VOH/VOL. AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND, VTTL = +4.5V to +5.5V Symbol Parameter tPLH Propagation Delay tPHL Data and Enable to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% TC = −55˚C TC = +25˚C TC = +125˚C Min Max Min Max Min Max 0.50 3.00 0.50 2.90 0.30 3.30 Units Conditions ns Notes (Notes 7, 8, 9) Figures 1, 2 0.35 1.80 0.45 1.80 0.45 1.80 ns (Note 10) Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures. Note 8: Screen tested 100% on each device at +25˚C temperature only, Subgroup A9. Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11. Note 10: Not tested at +25˚C, +125˚C, and −55˚C temperature (design characterization data). 3 www.national.com Switching Waveform DS100313-6 FIGURE 1. Propagation Delay and Transition Times Test Circuit DS100313-5 Note: VCC, VCCA = 0V, VEE = −4.5V, VTTL = +5.0V, VIH = +3.0V L1, L2 and L3 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC, VEE and VTTL All unused outputs are loaded with 50Ω to −2V or with equivalent ECL terminator network CL = Fixture and stray capacitance ≤ 3 pF FIGURE 2. AC Test Circuit www.national.com 4 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Ceramic Dual-In-Line Package (0.400" Wide) (D) NS Package Number J24E 24 Lead Quad Cerpak (F) NS Package Number W24B 5 www.national.com 100324 Low Power Hex TTL-to-ECL Translator LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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