ETC IR2137Q

Data Sheet No. PD60170-F
IR2137/IR2237(J)(Q)
3-PHASE BRIDGE DRIVER
Features
• Floating channel up to +600V or +1200V
• “soft” over-current shutdown turns off all six
•
•
•
•
•
•
•
•
Product Summary
outputs
Integrated high side desaturation circuit
Controlled “soft” turn on for EMI reduction
Integrated brake IGBT driver
Three independent low side COM pins
Separate pull-up/pull-down output drive pins
Matched delay outputs
3.3V logic compatible
Under voltage lockout with hysteresis band
VOFFSET
IO+/-
600V max. or 1200V max.
VOUT
220mA / 460mA
12.5V - 20V
Brake Io+/-
40mA/80mA
Matched delay
75nsec
Deadtime (typ.)
Description
300 nsec
DESAT Blanking time (typ.)
The IR2137/IR2237(J)(Q) are a high voltage, high
speed 3-phase IGBT driver best suited for AC motor
drive applications. Integrated desaturation logic provides ground fault protection as well as other mode of
over current protection. Soft shutdown is initiated in
the event of any overcurrent/ground fault conditions,
and all six outputs are simultaneously turned off. Output drivers have separate turn on/off pins to facilitate
independent gate drive impedance with EMI soft turn
on. Optimum matched delays between phases, and
between high/low side enables small deadtime, thus
improving low speed performance. The brake driver
eliminates additional circuits.
DESAT input voltage
threshold (typ.)
2.0usec
Vt+ = 5.0V
Packages
64-Lead MQFP
68-Lead PLCC
Typical Connection
15V
VCC
3
VB1,2,3
LIN1,2,3
HOP1,2,3
3
HIN1,2,3
HON1,2,3
SD
uP,Control
DC
BUS
FLTCLR
ITRIP
W
HSSD1,2,3
FAULT
2137/
2237
V
Motor
DESAT1,2,3
U
VS1,2,3
BRIN
LOP1,2,3
3
BR
COM
GND
VSS
LON1,2,3
LSSD1,2,3
LS1,2,3
Current Feedback
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IR2137/IR2237(J)(Q)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
Definition
Min.
Max.
VB1,2,3 -25
VB1,2,3 +0.3
VS1,2,3
High side offset voltage
VB1,2,3
High side floating supply voltage (IR2137)
-0.3
625
(IR2237)
-0.3
1225
VS1,2,3 - 0.3
VB1,2,3 + 0.3
VHO
High side floating output voltage (HOP, HON, HSSD)
V CC
Low side and logic fixed supply voltage
VSS
Logic ground
VLO1,2,3
VIN
Low side output voltage (LOP, LON, LSSD)
Logic input voltage (HIN, LIN,SD, ITRIP, FLTCLR, BRIN)
-0.3
25
VCC - 25
VCC + 0.3
VLS1,2,3 -0.3
VCC + 0.3
VSS - 0.3
VSS + 15
VFLT
FAULT output voltage
VSS - 0.3
VCC + 0.3
VDESAT
DESAT input voltage
VS1,2,3 - 0.3
VB1,2,3 + 0.3
- 0.3
VCC + 0.3
VCC - 25
VCC + 0.3
V BR
VLS1,2,3
BRAKE output voltage
Low side output return voltage
dV/dt
Allowable offset supply voltage slew rate
PD
Package power dissipation @ TA ≤ +25°C
(MQFP64)
—
50
—
2.0
(PLCC68)
RthJA
Thermal resistance, junction to ambient
—
60
(PLCC68)
40
150
TJ
Junction temperature
—
—
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
V
V/ns
W
3.0
(MQFP64)
Units
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to COM. The VS offset rating is tested with all
supplies biased at 15V differential.
Symbol
Definition
VB1,2,3
High side floating supply voltage
VS1,2,3
High side floating supply offset voltage
(IR2137)
(IR2237)
Min.
Max.
VS1,2,3 + 13
VS1,2,3 + 20
Note 1
Note 1
600
1200
VHO1,2,3
High side output voltage (HOP, HON, HSSD)
VS1,2,3
VS1,2,3 + 20
VLO1,2,3
Low side output voltage (LOP, LON, LSSD)
VLS1,2,3
V CC
V CC
Low side and logic fixed supply voltage
12.5
VSS
Logic ground
20
-5
+5
VIN
Logic input voltage (HIN, LIN,SD, ITRIP, FLTCLR, BRIN)
VSS
VSS + 5
VBR
BRAKE output voltage
0
V CC
VFLT
V CC
V
FAULT output voltage
VSS
VLS1,2,3
Low side output return voltage
-5.0
+5.0
VDESAT
DESAT pin input voltage
VS1,2,3
VB1,2,3
-40
125
TA
Ambient temperature
Units
°C
Note 1: Logic operational for VS of COM -5 to COM +600V/+1200V. Logic state held for VS of COM -5V to -COM VBS.
Note 2: All input pins are internally clamped with a 5.2V zener diode.
2
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IR2137/IR2237(J)(Q)
Static Electrical Characteristics
VBIAS (V CC, VBS 1,2,3) = 15V and TA = 25 oC unless otherwise specified. The V IN, VTH and I IN parameters are
referenced to VSS /COM and are applicable to all six channels (HOP/HON1,2,3 and LOP/LON1,2,3). The VO and IO
parameters are referenced to VLS1,2,3 and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 and
LO1,2,3. VDESAT and IDESAT parameters are referenced to VS1,2,3
Symbol
Definition
Min. Typ. Max. Units Test Conditions
VCCUV+
VCC supply undervoltage positive going threshold
10.3
11.4
12.5
VCCUV-
VCC supply undervoltage negative going threshold
9.5
10.4
11.3
V CCUVH
VCC supply undervoltage lockout hysteresis
—
1.0
—
VBSUV+
VBS supply undervoltage positive going threshold
10.3
11.4
12.5
VBSUV-
VBS supply undervoltage negative going threshold
9.5
10.4
11.3
VBSUVH
VBS supply undervoltage lockout hysteresis
—
1.0
—
Offset supply leakage current
—
—
50
ILK
µA
(IR2137)
(IR2237)
—
—
50
IQBS
Quiescent VBS supply current
—
120
200
IQCC
Quiescent VCC supply current
—
2
6
3.15
—
—
—
—
0.8
1.6
2.5
3.1
0.9
1.5
2.4
0.7
1.0
—
—
—
100
—
—
100
VIH
Logic “0” input voltage (OUT=LO)
V
VB1,2,3 = VS1,2,3
= 600V
VB1,2,3 = VS1,2,3
= 1200V
mA
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
VIL
Logic “1” input voltage (OUT=HI)
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
Vt+
Logic input positive going threshold
V
VCC = 12.5 to 20V
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
Vt-
Logic input negative going threshold
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
VT
Logic input hysteresis
(HIN,LIN,ITRIP,SD,BRIN,FLTCLR)
VOH
High level output voltage, VBIAS - VO
(normal switching) HOP, LOP
VOL
Low level output voltage, VO
mV
IO = 1 mA
(normal switching) HON, LON
IIN+
Logic “1” input bias current
—
150
—
IIN-
Logic “0” input bias current
—
80
—
VIN = 0V
µA
VIN = 5V
IDESAT+
“high” DESAT input bias current
—
—
15
IDESAT-
“low” DESAT input bias current
—
—
.1
VDESAT = 0V
VO = 0V, VIN = 0V
PW ≤ 10 µs
IO+
Output high short circuit pulsed current
220
300
—
IO-
Output low short circuit pulsed current
460
550
—
mA
VDESAT = 15V
VO = 15V, VIN = 5V
PW ≤ 10 µs
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IR2137/IR2237(J)(Q)
Static Electrical Characteristics - cont.
VBIAS (VCC, V BS 1,2,3) = 15V and TA = 25 oC unless otherwise specified. The VIN, VTH and I IN parameters are
referenced to VSS/COM and are applicable to all six channels (HOP/HON1,2,3 and LOP/LON1,2,3). The VO and IO
parameters are referenced to VLS1,2,3 and VS1,2,3 and are applicable to the respective output leads: H O1,2,3 and
LO1,2,3. VDESAT and IDESAT parameters are referenced to VS1,2,3
Symbol
IOBR+
Definition
BR output high short circuit pulsed current
Min. Typ. Max. Units Test Conditions
40
75
—
VBR=0V, VBRIN=0V
mA
IOBR-
BR output low short circuit pulsed current
80
120
—
VOHB
BR high level output voltage, VBIAS-VBR
—
—
300
VOLB
BR low level output voltage, VBR
—
—
150
RON,SS
Soft shutdown on resistance
—
500
—
RON,FLT
FAULT low on resistance
—
60
—
VDESAT+
High DESAT input threshold voltage
—
5.2
—
PW ≤ 10 µs
VBR=15V,VBRIN=5V
PW ≤ 10 µs
4
mV
Ω
IBR = 1mA
ITRIP = 0V
V
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IR2137/IR2237(J)(Q)
AC Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VS1,2,3 = VSS , T A = 25o C and C L = 1000 pF unless otherwise specified.
Symbol
Definition
Propagation Delay Characteristics
Min.
Typ.
Max. Units Test Conditions
ton
Turn-on propagation delay
150
400
600
toff
Turn-off propagation delay
150
400
600
tr
Turn-on rise time
—
115
—
tf
Turn-off fall time
—
25
—
VIN = 0 & 5V
VS1,2,3 = 0 to 600V
or 1200V
HOP=HON,LOP=LON
Figure 4
ITRIP to output shutdown propagation delay
—
1000
1400
VIN,VDESAT=0
tITRIP
VSD = 5V
tSD
tDESAT1
SD to output shutdown propagation delay
DESAT to output shutdown propagation delay
—
1200
1500
1400
2800
4200
600
1150
1700
—
800
1100
VIN,VDESAT = 0
VITRIP = 5V, fig. 7
VS1,2,3
= 0=to5V
600V
ITRIP
or 1200V
VHIN = 0V,
VSD, VITRIP = 5V,
VDESAT = 15V, fig. 5
at HOPx turn-on
tDESAT2
DESAT to output shutdown propagation delay
after blanking
tFLT, IT
ITRIP to FAULT output delay
VIN,VITRIP =0V,
ns
VSD = 5V,
VDESAT= 0V, fig. 7
tFLTCLR
FLTCLR to FAULT output delay
—
1100
1400
VSD = 5V,
VDESAT = 0V, fig. 7
tFLT,DESAT1 DESAT to FAULT output delay propagation delay
at HOPx turn-on
—
2500
—
tFLT,DESAT2 DESAT to FAULT output delay propagation delay
—
850
—
DESAT blanking time at turn-on
—
2000
—
BR output turn-on propagation delay
—
120
200
BR output turn-off propagation delay
—
85
150
BR output turn-on rise time
—
300
—
BR output turn-off fall time
—
150
—
Deadtime
—
300
—
Matching delay, max (ton,toff) - min (ton,t off),
(ton,toff are applicable to all six channels)
—
0
75
Output pulse width matching, IPWin - PWoutl
—
VS1,2,3 = 0 to 600V
or 1200V
VIN = 0V,
VSD, VITRIP = 5V,
VDESAT = 15V,
Figure 5
after blanking
tBL
tonBR
toffBR
trBR
tfBR
Figure 4
Deadtime/Delay Matching Characteristics
DT
MDT
PM
(exclude BRIN/BR)
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Figure 6
External dead time
ns
0
75
>400nsec
External dead time
>400nsec, Fig. 4
5
IR2137/IR2237(J)(Q)
Functional Block Diagram
VB1
HIN1
LIN1
SCHMITT
TRIGGER INPUT
&
SHOOT
THROUGH
PREVENTION
LATCH
HIN1
200nsec
Deadtime
LEVEL
SHIFTERS
HOP1
SOFT
SHUTDOWN
SOFT SHUTDOWN
SOFT
SHUTDOWN
DRIVER
HON1
DESAT
DETECTION
HSSD1
DESAT
VS1
UV DETECT
DESAT1
VB2
SCHMITT
TRIGGER
INPUT &
SHOOT
THROUGH
PREVENTION
HIN2
LIN2
200nsec
Deadtime
LEVEL
SHIFTERS
HIN2
LATCH
SOFT SHUTDOWN
SOFT
SHUTDOWN
DESAT
HOP2
SOFT
SHUTDOWN
DRIVER
HON2
DESAT
DETECTION
HSSD2
UV DETECT
VS2
DESAT2
VB3
HIN3
LIN3
SCHMITT
TRIGGER INPUT
&
SHOOT
THROUGH
PREVENTION
200nsec
Deadtime
LEVEL
SHIFTERS
HIN3
LATCH
SOFT SHUTDOWN
SOFT
SHUTDOWN
DESAT
HOP3
SOFT
SHUTDOWN
DRIVER
HON3
DESAT
DETECTION
HSSD3
UV DETECT
VS3
DESAT3
VSS/LS1
LEVEL
SHIFTER
LOP1
DRIVER
LON1
SOFT SHUTDOWN
SD
SCHMITT
TRIGGER
LSSD1
VSS/LS2
LEVEL
SHIFTER
LS1
VSS/LS3
LEVEL
SHIFTER
LOP2
DRIVER
LON2
SCHMITT
TRIGGER
ITRIP
LS2
FAULT
LOGIC
FLTCLR
LSSD2
SCHMITT
TRIGGER
LOP3
DRIVER
FAULT
LON3
LS3
VCC
LSSD3
BRIN
VSS
UV
DETECT
BRAKE
DRIVER
BR
COM
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IR2137/IR2237(J)(Q)
Driver Output Circuit Block Diagram
VB
HOP
PRE
DRIVER
High Side Gate
LOP
2usec
Blanking
SSD
DESAT
Desat Fault
350nsec
600nsec
Filter
Filter
VS
Soft Shutdown
Soft Shutdown
Impedence =
500 ohms
Lead Definitions
Symbol
Description
VCC
Low side and logic supply voltage
VSS
Logic Ground
HIN1,2,3
Logic inputs for high side gate driver outputs (HOP1,2,3/HON1,2,3, out of phase)
LIN1,2,3
SD
Logic inputs for low side gate driver outputs (LOP1,2,3/LON1,2,3, out of phase)
Logic input for shutdown (hard shutdown, level sensitive signal, negative logic)
ITRIP
FLTCLR
BRIN
Logic input for overcurrent shutdown (soft shutdown, edge sensitive, negative signal)
Logic input for FAULT clear (edge sensitive, negative signal)
Logic input for brake driver, out of phase with BR
FAULT
BR
COM
VB1,2,3
Fault output indicates over current and desaturation shutdown (open drain)
Brake driver output
Brake driver return
HOP1,2,3
High side driver pull up output
HON1,2,3
High side driver pull down output
HSSD1,2,3
High side soft shutdown output
DESAT1,2,3
VS1,2,3
IGBT desaturation protection input
High voltage floating supply return
LOP1,2,3
Low side driver pull up output
High side gate drive floating supply
LON1,2,3
Low side driver pull down output
LSSD1,2,3
Low side soft shutdown output
LS1,2,3
Low side driver returns
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IR2137/IR2237(J)(Q)
VS1
DESAT1
HON1
HSSD1
VB1
1
HIN3
HOP1
HIN1
HIN2
Lead Assignments
68
VB2
LIN1
HOP2
LIN2
HON2
LIN3
HSSD2
SD
DESAT2
VS2
FAULT
FLTCLR
PLCC68
ITRIP
BRIN
MQFP64
VSS
BR
COM
VB3
HOP3
VCC
64 Lead MQFP
LS1
LON1
LSSD1
VS3
LOP1
DESAT3
LS3
LS2
LSSD2
LSSD2
HSSD3
LON2
HON3
LON3
LOP2
LOP3
68 Lead PLCC
IR2137Q/ IR2237Q
IR2137J/IR2237J
HIN1,2,3
LIN1,2,3
SD
ITRIP
DESAT
FAULT
FLTCLR
HO(HOP/HON)
LO(LOP/LON)
Figure 3. Timing Diagram
8
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IR2137/IR2237(J)(Q)
P W in
5V
50%
HIN
50%
LIN
BRIN
t on
t off
tr
tf
P Wout
HO (HOP=HON)
LO (LOP=LON)
BR
90%
10%
90%
10%
Figure 4. Switching Time Waveforms
Blanking
in effect
Blanking
in effect
HIN1,2,3
5V
5V
LIN1,2,3
5V
SD
5V
>2.0usec
(typ)
ITRIP
15V
DESAT
6V
6V
t
FAULT
50%
FLT,DESAT1
FLTCLR
t FLT,DESAT2
5V
t DESAT2
t DESAT1
90%
HO(HOP/HON)
50%
50%
90%
50%
t BL
t BL
SOFT SHUTDOWN
SOFT SHUTDOWN
LO(LOP/LON)
Figure 5. DESAT Timing
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IR2137/IR2237(J)(Q)
HIN
50%
50%
LIN
HO (HOP=HON)
50%
50%
DT
DT
LO (LOP=LON) 50%
50%
Figure 6. Internal Deadtime Timing
SD
5V
50%
ITRIP
5V
50%
t
t SD
ITRIP
90%
90%
LO
HO
5V
FLTCLR
50%
t FLT,ITRIP
90%
FAULT
t FLTCLR
10%
Figure 7. SD, ITRIP Timing
10
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IR2137/IR2237(J)(Q)
Case outlines
64-Lead MQFP
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01-6054 00
01-2023 01 MS-022GA-2
11
IR2137/IR2237(J)(Q)
68-Lead PLCC
01-6055 00
01-3068 01 (MS-018AC)
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 5/22/2001
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