Le79555 Subscriber Line Interface Circuit The Le79555 Subscriber Line Interface Circuit implements the basic telephone line interface functions, and enables the design of low-power, high-performance POTS line interface cards. DISTINCTIVE CHARACTERISTICS ■ Low Overhead Voltage (6 V) ■ Ideal for high-density, low-power linecard applications ■ Programmable loop-detect threshold ■ Control states: Active, Reverse Polarity, Tip Open, Ringing, Standby, and Open Circuit ■ Programmable ring-trip detect threshold ■ Low standby power (35 mW) ■ Current Gain = 500 ■ –16 V to –58 V battery operation ■ Three on-chip relay drivers and relay snubbers, one ringing and two general purpose ■ Ground-start detector ■ No –5 V supply required ■ On-hook transmission ■ Two-wire impedance set by single external impedance ■ Tip Open state for ground-start lines ■ On-chip switching regulator for Low power dissipation ■ Programmable constant-current feed BLOCK DIAGRAM A(TIP) Ring Relay Driver RINGOUT Relay Driver RYOUT1 Relay Driver RYOUT2 HPA C1 C2 C3 Two-Wire Interface D1 D2 Input Decoder and Control HPB DET VTX RSN Signal Transmission B(RING) Off-Hook Detector RD RDC CAS VDC Power-Feed Controller DA DB Ring-Trip Detector Battery Switch L VBAT BGND Switching Regulator CHS QBAT CHCLK VBAT2 BATSW VREG VCC VBREF AGND Publication# 080686 Rev: A3 Amendment: /0 Issue Date: January 2001 ORDERING INFORMATION Standard Products Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Le79555 V –1 C TEMPERATURE RANGE C = Commercial (0°C to +70°C)* PACKAGE TYPE V = 44-pin Thin Plastic Quad Flat Pack (PQT044) PERFORMANCE GRADE –1 52 dB Longitudinal Balance, Polarity Reversal –2 63 dB Longitudinal Balance, Polarity Reversal –3 52 dB Longitudinal Balance, No Polarity Reversal –4 63 dB Longitudinal Balance, No Polarity Reversal DEVICE NUMBER/DESCRIPTION Le79555 Subscriber Line Interface Circuit Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local Legerity sales office to confirm availability of specific valid combinations, to check on newly released combinations. Valid Combinations –1 –2 Le79555 VC –3 –4 Note: * Functionality of the device from 0 °C to +70 °C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. 2 Le79555 Data Sheet DB N/C N/C B(RING) A(TIP) BGND N/C VCC VBAT2 VREG RINGOUT CONNECTION DIAGRAMS Top View 44 43 42 41 40 39 38 37 36 35 34 RYOUT1 1 33 DA RYOUT2 L 2 32 N/C 3 31 RD VBAT 4 30 N/C CHS 5 29 HPB QBAT 6 28 N/C CHCLK BATSW 7 8 27 HPA 26 N/C D2 9 25 VTX D1 10 11 24 N/C 23 VBREF C1 Le79555VC AGND N/C RSN RDC CAS VDC N/C C3 C2 N/C DET 12 13 14 15 16 17 18 19 20 21 22 Notes: 1. Pin 1 is marked for orientation. 2. N/C = No Connect 3. RSVD = Reserved. Do not connect to this pin. SLIC Products 3 PIN DESCRIPTIONS 4 Pin Name Type Description AGND Gnd A(TIP) Output BATSW Input (VREG Switch Control) Input to switch VREG between on-chip switching regulator (input Low) and VBAT2 (input High). BGND Gnd Battery (power) ground. B(RING) Output C3–C1 Input CAS Capacitor CHCLK Input (Chopper Clock) Input to switching regulator. f = 256 kHz (nominal) CHS Input (Chopper Stabilization) Connection for external stabilization components. D2–D1 Input Relay Driver Control. D1 and D2 control the relay drivers RYOUT1 and RYOUT2. Logic Low on D1 activates the RYOUT1 relay driver. Logic Low on D2 activates the RYOUT2 relay driver. DA Input Negative input to ring-trip comparator. DB Input Positive input to ring-trip comparator. DET Output HPA Capacitor A (TIP) side of high-pass filter capacitor. HPB Capacitor B (RING) side of high-pass filter capacitor. Analog and Digital ground. Output of A(TIP) power amplifier. Output of B(RING) power amplifier. SLIC control pins. C3 is MSB and C1 is LSB. Anti-Saturation pin for capacitor to filter reference voltage when operating in antisaturation region. Switchhook Detector. A logic Low indicates that selected condition is detected. The detect condition is selected by the logic inputs (C3–C1). The output is open-collector with a built-in 15 kΩ pull-up resistor. (Switching Regulator Power Transistor) Connection point for filter inductor and anode of catch diode. This pin will have up to 60 V of pulse waveform on it, and it must be isolated from sensitive circuits. Care must be taken to keep the diode connections short because of the high currents and di/dt. L Output N/C — QBAT Battery (Quiet Battery) Filtered battery supply for the signal-processing circuits. RD Resistor Detector threshold set and filter pin. RDC Resistor Connection point for the DC feed current programming network. The other end of the network connects to the receiver summing node (RSN). RINGOUT Output RSN Input Receive Summing Node. The metallic current (both AC and DC) between A(TIP) and B(RING) is equal to 500 times the current into this pin. The networks which program receive gain, two-wire impedance, and feed resistance all connect to this node. RYOUT1 Output Relay/Switch Driver. Open-collector driver with emitter internally connected to BGND. RYOUT2 Output Relay/Switch Driver. Open-collector driver with emitter internally connected to BGND. VBAT Battery Most negative battery. VBAT2 Battery Battery supply to replace the VREG. Can be used to override switching regulator output, enabled by BATSW (high). VBREF — VCC Power Supply No Connect. This pin is not internally connected. Ring Relay Driver. Open-collector driver with emitter internally connected to BGND. This is a Legerity reserved pin and must always be connected to the QBAT pin. +5 V power supply. Le79555 Data Sheet Pin Name Type VDC Output VREG Input VTX Output Description Output that is proportional to the line voltage: VDC = | VA–VB | / 20. (Regulated Voltage) Provides internal negative power supply and connection point for inductor, filter capacitor, and chopper stabilization. VREG is switched between on-chip switching regulator and VBAT2. Transmit Audio. This output is a 0.50 gain version of the A(TIP) and B(RING) metallic voltage. VTX also sources the two-wire input impedance programming network. SLIC Products 5 ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage temperature ......................... –55°C to +150°C Commercial (C) Devices VCC with respect to AGND ................. –0.4 V to +7.0 V Ambient temperature .............................0°C to +70°C* VBAT1, VBAT2 with respect to AGND: Continuous..................................... +0.4 V to –70 V 10 ms ............................................. +0.4 V to –75 V VCC .....................................................4.75 V to 5.25 V BGND with respect to AGND ................... +3 V to –3 V A(TIP) or B(RING) to BGND: Continuous ......................................... VBAT to +1 V 10 ms (f = 0.1 Hz) ............................. –70 V to +5 V 1 µs (f = 0.1 Hz) ................................ –80 V to +8 V 250 ns (f = 0.1 Hz) .......................... –90 V to +12 V Current from A(TIP) or B(RING).....................±150 mA RINGOUT/RYOUT1,2 current............................50 mA RINGOUT/RYOUT1,2 voltage .............. BGND to +7 V VBAT1, VBAT2 .........................................–15 V to –58 V AGND...................................................................... 0 V BGND with respect to AGND ................................... –100 mV to +100 mV Load resistance on VTX to ground .............. 20 kΩ min *The operating ranges define those limits between which the functionality of the device is guaranteed. * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. RINGOUT/RYOUT1,2 transient .......... BGND to +10 V DA and DB inputs Voltage on ring-trip inputs ..................... VBAT to 0 V Current into ring-trip inputs .........................±10 mA C3–C1,D2–D1, BATSW, CHCLK Input voltage .........................–0.4 V to VCC + 0.4 V Maximum power dissipation, continuous, TA = 70°C, No heat sink (See note) In 44-pin TQFP package................................1.4 W Thermal Data:................................................................ θJA In 44-pin TQFP package....................... 52°C/W typ ESD immunity/pin (HBM) ..................................1500 V Note: Thermal limiting circuitry on-chip will shut down the circuit at a junction temperature of about 165°C. The device should never see this temperature and operation above 145°C junction temperature may degrade device reliability. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. 6 Le79555 Data Sheet ELECTRICAL CHARACTERISTICS Description Test Conditions (see Note 1) Min Typ Max Unit Note dB 1, 4 20 Ω 4 +50 mV Transmission Performance 2-wire return loss 200 Hz to 3.4 kHz 26 Analog output (VTX) impedance 1 Analog (VTX) output offset voltage –50 Overload level, 2-wire Active state 2.5 Vpk 2a Overload level On hook, RLAC = 600 Ω 0.77 Vrms 2b THD, Total Harmonic Distortion 0 dBm +7 dBm dB 5 THD, On hook 0 dBm, RLAC = 600 Ω –64 –55 –50 –40 –36 Longitudinal Capability (See Test Circuit D) Longitudinal to metallic L-T, L-4 200 Hz to 1 kHz Longitudinal to metallic L-T, L-4 1 kHz to 3.4 kHz Normal Polarity 0°C to +70°C -40°C to +85°C 0°C to +70°C -40°C to +85°C Reverse Polarity -40°C to +85°C 0°C to +70°C -40°C to +85°C Normal Polarity 0°C to +70°C -40°C to +85°C 0°C to +70°C -40°C to +85°C Reverse Polarity -40°C to +85°C 0°C to +70°C -40°C to +85°C -2,-4 -2,-4 -1,-3 -1,-3 63 58 52 50 -2 -1 -1 54 52 50 -2,-4 -2,-4 -1,-3 -1,-3 58 53 52 50 -2 -1 -1 53 52 50 4 4 4 4 dB Longitudinal signal generation 4-L 200 Hz to 3.4 kHz 40 Longitudinal current per pin (A or B) Active state 17 Longitudinal impedance at A or B 0 to 100 Hz 4 4 4 4 27 mArms 8 25 Ω/pin 4 Idle Channel Noise C-message weighted noise RL = 600 Ω RL = 600 Ω 0°C to +70°C –40°C to +85°C 7 +10 +12 dBrnc Psophometric weighted noise RL = 600 Ω RL = 600 Ω 0°C to +70°C –40°C to +85°C –83 –80 –78 dBmp 4 Insertion Loss and Balance Return Signal (See Test Circuits A and B) Gain accuracy 4- to 2-wire 0 dBm, 1 kHz –0.20 0 +0.20 3 Gain accuracy 2- to 4-wire, 4- to 4-wire 0 dBm, 1 kHz –6.22 –6.02 –5.82 3 Gain accuracy, 4- to 2-wire On hook –0.35 Gain accuracy, 2- to 4-wire, 4- to 4-wire On hook –6.37 Gain accuracy over frequency 300 to 3.4 kHz relative to 1 kHz –0.15 +0.15 Gain tracking +3 dBm to –55 dBm relative to 0 dBm –0.15 +0.15 3,4 Gain tracking On hook 0 dBm to –37 dBm +3 dBm to 0 dBm –0.15 –0.35 +0.15 +0.35 3,4 Group delay 0 dBm, 1 kHz +0.35 –6.02 4 SLIC Products –5.67 3,4 dB µs 3 4, 7 7 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max 22.5 24.5 26.5 22.5 Unit Note Line Characteristics IL, Short Loops, Active state RLDC = 600 Ω IL, Long Loops, Active state RLDC = 2010 Ω, VBAT = –50 V 20 BAT – 3 V IL = ------------------------------R L + 400 16 IL, Accuracy, Standby state T A = 25°C Constant-current region mA 18 30 ILLIM Active, A and B to ground 75 120 VDC Accuracy VDC = |VAB| /20 Ri = 300 to 1500 Ω 0.053 0.055 0.057 VAB, Open Circuit voltage VBAT = VBAT1, VBAT2 = –50 V 42.75 44 IA, Leakage, Tip Open state RL = 0 IB, Current, Tip Open state B to GND VA, Active RA to BAT = 7 kΩ, RB to GND = 100 Ω 15 30 –7.5 –5 mA 9 V 100 µA 56 mA V 4 dB 5 kΩ 4 Power Supply Rejection Ratio VCC 50 Hz to 3.4 kHz (VRIPPLE = 100 mVrms) 30 40 VBAT 50 Hz to 3.4 kHz off-hook constant current (VRIPPLE = 500 mVpp) 28 50 Effective internal resistance CAS pin to VBAT 85 170 255 Power Dissipation On hook, Standby state 45 60 On hook, Active state 130 170 mW Off hook, Standby state RL = 600 Ω 860 1200 Off hook, Active state RL = 600 Ω 230 320 ICC, On-hook VCC supply current Standby state Active state 2.3 4.25 3.2 6.0 IBAT, On-hook VBAT supply current + VREG supply current Standby state Active state 0.65 2.0 0.9 3.0 mA 1.0 mVrms Supply Currents RFI Rejection RFI rejection 100 kHz to 30 MHz, (See Figure F) 4 Receive Summing Node (RSN) RSN DC voltage IRSN = 0 mA 0 RSN impedance 200 Hz to 3.4 kHz 10 V 20 Ω Logic Inputs (C3–C1 and D2–D1) VIH, Input High voltage (except C3) 2.0 VIH, C3 2.5 VIL, Input Low voltage V 0.8 IIH, Input High current –75 IIL, Input Low current –400 40 µA Logic Output (DET) VOL, Output Low voltage IOUT = 0.3 mA, 15 kΩ to VCC VOH, Output High voltage IOUT = –0.1 mA, 15 kΩ to VCC 8 Le79555 Data Sheet 0.40 2.4 V 4 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max Unit 0.40 V Note Switching Regulator Inputs CHCLK, Low Isink < 50 µA, f = 200 kHz to 300 kHz, 50% duty cycle, square wave. CHCLK, High Isource < 1 µA, BATSW, Low Isink < 50 µA BATSW, High Isource < 1 µA 2.5 V 0.40 2.5 V V Ring-Trip Detector Input (DA, DB) Bias current –500 –50 Source resistance = 2 MΩ –50 0 +50 On threshold RD = 35.4 kΩ 9.4 11.7 14.0 Off threshold RD = 35.4 kΩ 8.8 10.4 12.0 mA Hysteresis RD = 35.4 kΩ IGK, Ground-key detector threshold RL from BX to GND Active, Standby, and Tip open 9 13 mA +0.3 +0.7 V 100 µA Offset voltage nA mV 6 Loop Detector 1.3 5 Relay Driver Output (RINGOUT, RYOUT1, RYOUT2) On voltage IOL = 40 mA Off leakage VOH = +5 V Zener breakover IZ = 100 µA Zener On voltage IZ = 30 mA 6 7.2 8 V RELAY DRIVER SCHEMATICS RINGOUT BGND RYOUT1, RYOUT2 BGND BATTERY SWITCH SCHEMATICS VREG BATSW BATZ SLIC Products 9 Notes: 1. Unless otherwise noted, test conditions are VBAT1 = VBAT2 = –52 V, VCC = +5 V, RL = 600 Ω, RDC1 = RDC2 = 13.02K, RD = 35.4 kΩ, no fuse resistors, CHP = 0.22 µF, CDC = 0.33 µF, CCAS = 0.33 µF, D1 = 1N400x, two-wire AC input impedance is a 600 Ω resistance synthesized by the programming network shown below. VTX RT1 = 75 kΩ CT1 = 120 pF RT2 = 75 kΩ RSN RRX = 150 kΩ VRX 2. a. Overload level is defined when THD = 1%. b. Overload level is defined when THD = 1.5%. 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire, AC-load impedance matches the programmed impedance. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only. 7. Group delay can be greatly reduced by using a ZT network such as that shown in Note 1. The network reduces the group delay to less than 2 µs and increases 2WRL. The effect of group delay on linecard performance also may be compensated for by synthesizing complex impedance with the QSLAC™ or DSLAC™ device. 8. Minimum current level guaranteed not to cause a false loop detect. 9. VDC/VAB Table 1. SLIC Decoding State C3 C2 C1 Two-Wire Status DET Output 0 0 0 0 Reserved X 1 0 0 1 Reserved X 2 0 1 0 Active Polarity Reversal Loop detector 3 0 1 1 Tip Open Ground Key* 4 1 0 0 Open Circuit Ring trip 5 1 0 1 Ringing Ring trip 6 1 1 0 Active Loop detector 7 1 1 1 Standby Loop detector *Ground key selection in Tip Open is automatic. If longitudinal current is greater than 9 mA in Active, Standby, or Tip Open, the DET will go low. Therefore, if in Active or Standby, DET may be an indication of off hook, ground key, or both. 10 Le79555 Data Sheet Table 2. User-Programmable Components Z T = 250 ( Z 2WIN – 2 R F ) Z RX ZL 500 Z T = ------------ • ---------------------------------------------------G 42L Z T + 250 ( Z L + 2 R F ) 625 R DC1 + R DC2 = --------------I LOOP ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZRX is connected from VRX to RSN. ZT is defined above, and G42L is the desired receive gain. RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal. ILOOP is the desired loop current in the constant-current region. R DC1 + R DC2 C DC = 1.5 ms • ---------------------------------R DC1 • R DC2 390 355 0.5 ms RD ON = ---------- , RD OFF = ---------- , C D = ----------------IT IT RD C CAS 1 = ------------------------------5 3.4 • 10 π f c V BAT – 3 V I STANDBY = --------------------------------400 Ω + R L RD and CD form the network connected from RD to AGND/ DGND and IT is the threshold current between on hook and off hook. CCAS is the regulator filter capacitor and fc is the desired filter cut-off frequency. Standby loop current (resistive region). SLIC Products 11 DC Characteristics VAB 50 45 40 35 30 25 20 15 10 5 0 0 5 10 15 20 25 IL (ma) Notes: 1. Constant current region: 625 V AB = I L R L’ = ------------ R L’ , where R L’ = R L + 2 R F R DC 2. Battery tracking anti-sat (off hook): a) VAB ≤ 41.6 V VAB = |VBAT| -2.0 -IL(RDC/138) b) VAB ≥ 41.6 V VAB = .8|VBAT| + 6.73 - IL(RDC/172) a) VAB ≤ 41.6 V VAB = |VBAT| -5.3 - IL(RDC/138) b) VAB ≥ 41.6 V VAB = .8|VBAT| + 4.08 - IL(RDC/172) 3. Battery tracking anti-sat (on hook): a. Load Line (Typical) 12 Le79555 Data Sheet 30 DC FEED CHARACTERISTICS (continued) A (TIP) RL I L SLIC RSN RDC1 RDC2 CDC B (RING) RDC Feed current programmed by RDC1 and RDC2 b. Feed Programming Figure 1. DC Feed Characteristics SLIC Products 13 TEST CIRCUITS A(TIP) RL 2 VTX SLIC VAB VL RT AGND RL RRX 2 RSN B(RING) IL2-4 = 20 log (VTX / VAB) A. Two- to Four-Wire Insertion Loss A(TIP) VTX SLIC VAB RL AGND RT RRX B(RING) RSN VRX IL4-2 = 20 log (VAB / VRX) BRS = 20 log (VTX / VRX) B. Four- to Two-Wire Insertion Loss and Balance Return Signal 1 ωC A(TIP) << RL S1 SLIC 2 C VL VL VTX RL VAB AGND RT RL S2 2 B(RING) RRX RSN VRX S2 Open, S1 Closed L-T Long. Bal. = 20 log (VAB / VL) L-4 Long. Bal. = 20 log (VTX / VL) S2 Closed, S1 Open 4-L Long. Sig. Gen. = 20 log (VL / VRX) C. Longitudinal Balance 14 Le79555 Data Sheet TEST CIRCUITS (continued) ZD A(TIP) R VTX RT1 SLIC VS VM AGND R ZIN CT1 RT2 B(RING) RSN ZD: The desired impedance; e.g., the characteristic impedance of the line RRX Return loss = –20 log (2 VM / VS) D. Two-Wire Return Loss Test Circuit C1 L1 200 Ω 50 Ω A RF1 200 Ω HF GEN CAX 33 nF RF2 B 50 Ω 50 Ω C2 L2 CBX 33 nF VTX SLIC under test 1.5 Vrms 80% Amplitude Modulated 100 kHz to 30 MHz E. RFI Test Circuit SLIC Products 15 TEST CIRCUITS (continued) +5 V DA VCC DB RD 2.2 nF RD VTX VTX A(TIP) A(TIP) RT HPA CHP HPB B(RING) B(RING) VRX RSN RDC1 2.2 nF RRX RDC2 RDC RINGOUT RYOUT1 VDC CDC AGND RYOUT2 D2 D1 BGND BATTERY GROUND C3 C2 VBREF QBAT C1 ANALOG GROUND DET 0.33 µF CAS BAT CCAS VBAT BAT2 VBAT2 CHS 560 pF CCH2 CCH1 15 nF CHCLK BATSW RCH 1.3 kΩ VREG 0.47 µF CFIL L 1 mHz Note: Switching regulator components can also be: L = 5 mH CFIL = 0.094 µF CCH1 = 0.047 µF CCH2 = 1500 pF F. Am79555 Test Circuit 16 Le79555 Data Sheet RCH = 910 Ω APPLICATION CIRCUIT +5 V DA DB 2.2 nF RF VCC RD CHP RF 2.2 nF VTX VTX A(TIP) A(TIP) RTX1 HPA HPB B(RING) RRX RINGOUT RSN RYOUT1 RYOUT2 RDC1 RDC2 RDC CDC BGND AGND D1 C3 C2 C1 DET CAS CCAS F. Le79555 Application Circuit SLIC Products 17 PHYSICAL DIMENSION PQT044 BSC is an ANSI standard for Basic Centering. Dimensions are measured in millimeters. 18 Le79555 Data Sheet REVISION SUMMARY Revision A to Revision A2 • Updated the Pin Description table to correct inconsistencies. • The physical dimension (PQT044) was added to the Physical Dimension section. • Added the Connection Diagram on page 3. Revision A2 to Revision A3 • Changed 8 V to 6 V in the Distinctive Characteristics section. • Added the 32-pin PLCC information to the Ordering Information and Absolute Maximum Ratings sections and added the connection diagram. • In the Electrical Characteristics table: — Updated the information in the Line Characteristics section on the Long Loops row and the VDC Accuracy row. — Deleted the Disconnect state information in the Power Dissipation and Supply Currents sections. SLIC Products 19 Notes: www.legerity.com 20 Le79555 Data Sheet Notes: www.legerity.com SLIC Products 21 Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system cost of our customers’ products. By combining process, design, systems architecture, and a complete set of software and hardware support tools with unparalleled factory and worldwide field applications support, Legerity ensures its customers enjoy a smoother design experience. It is this commitment to our customers that places Legerity in a class by itself. 22 Le79555 Data Sheet The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity’s Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Legerity’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of Legerity’s product could create a situation where personal injury, death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice. © 2001 Legerity, Inc. All rights reserved. Trademarks Legerity, the Legerity logo and combinations thereof, DSLAC and QSLAC are trademarks of Legerity, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. SLIC Products 23 P.O. Box 18200 Austin, Texas 78760-8200 Telephone: (512) 228-5400 Fax: (512) 228-5510 North America Toll Free: (800) 432-4009 To contact the Legerity Sales Office nearest you, or to download or order product literature, visit our website at www.legerity.com. To order literature in North America, call: (800) 572-4859 or email: [email protected] To order literature in Europe or Asia, call: 44-0-1179-341607 or email: Europe — [email protected] 24 Le79555 Data Sheet