NCN2500 Product Preview USB Single Channel Transceiver The NCN2500 Integrated Circuit is a single channel transceiver designed to accommodate the physical USB Port with a microcontroller digital I/O. The part is fully USB compliant and supports the full 12 Mbps speed. On the other hand, the NCN2500 device includes the pull−up resistors as defined by the USB−ECN new specifications. http://onsemi.com MARKING DIAGRAM 16 Features • Compliant to the USB Specification, Version 2.0, Low and Full • • • Speed Very Small Footprint Due to the QFN−16 Package Integrated D+/D− Pull−Up Resistors Operates Over the Full 1.5 V to 5.5 V Vbat Supply 1 QFN−16 TBD SUFFIX CASE 485G A L Y W Typical Application • Portable Computer • Cellular Phone XXX ALYW = Assembly Location = Wafer Lot = Year = Work Week VObus Vusb Vcc EN_RPU PIN CONNECTIONS 16 15 14 13 DSPD 1 12 Vreg Vm 4 9 OE EN_VObus 5 6 7 8 NC 10 D− SPND 11 D+ Vp 3 GND RCV 2 (Top View) ORDERING INFORMATION Device Package Shipping NCN2500TBD QFN−16 TBD Units/Rail NCN2500TBD QFN−16 TBD Tape & Reel This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. Semiconductor Components Industries, LLC, 2003 September, 2003− Rev. P0 1 Publication Order Number: NCN2500/D NCN2500 GND C2 4.7 uF Vcc 10 uF 15 16 Vcc 14 Vusb EN_RPU 12 Vreg 5 C 2 3 4 1 9 7 C3 1 uF 13 VObus GND USB PORT GND 1 C1 EN_VObus RCV Vp Vm DSPD OE SPND 11 D+ R2 2 33 R 10 D− 4 GND NCN2500 GND GND Figure 1. Typical Application http://onsemi.com 2 3 33 R 6 GND R3 NCN2500 14 Vusb 3.3 V 3.3 V LDO 3.3 V 12 Vreg S5 EN_VObus 5 13 VObus S2 Vp DSPD EN_RPU 16 100 k GND DSPD RPU2 INTERNAL PULL−UP RESISTORS CONTROL Vm RPU1 S1 S3 VCC Vcc 15 VCC 3.3 V Vp 3 11 D+ 2 DSPD 1 10 D− Vm 4 VCC 3.3 V 6 3 OE 9 RCV 2 + − GND SPND 7 Figure 2. Block Diagram http://onsemi.com 3 8 NC 6 GND NCN2500 PIN FUNCTION DESCRIPTION Pin Symbol Function Description 1 DSPD INPUT 2 RCV OUTPUT This pin interfaces the USB signals with the microcontroller digital line. The data present on the D+/D− pins are translated onto this signal. 3 Vp I/O This pin, associated with Vm, is an I/O system interface signal depending upon the OE logic state: Vp is a Plus driver Input (from C to USB bus) OE = Low OE = High Vp is a Plus receiver Output (from USB bus to C) 4 Vm I/O This pin, associated with Vp, is an I/O system interface signal depending upon the OE logic state: Vp is a Minus driver Input (from C to USB bus) OE = Low Vp is a Minus receiver Output (from USB bus to C) OE = High 5 EN_VObus INPUT 6 GND PWR This pin carries the digital and USB ground level. High Quality PCB design shall be observed to avoid uncontrolled voltage spikes. 7 SPND INPUT The SPND digital signal (SUSPEND) selects the operation mode to reduce the power supply current. SPND = Low Normal operation SPND = High Suspend mode, no activity takes place 8 NC − 9 OE INPUT 10 D− I/O This pin is connected to the USB Minus Data line I/O. The data direction depends upon the OE logic state. 11 D+ I/O This pin is connected to the USB Plus Data line I/O The data direction depends upon the OE logic state. 12 Vreg PWR 13 VObus OUTPUT, PWR 14 Vusb PWR This pin is connected to the USB port +Vcc supply voltage. 15 Vcc PWR This pin provides the interface power supply. The power source can be an external supply or can be derived from the USB + Vcc voltage. 16 EN_RPU INPUT The DSPD logic level (Data Speed) activates the Low or the High speed operation on the USB port. DSPD = Low Low Speed, RPU1 & RPU2 connected to D− DSPD = High Full Speed, RPU1 & RPU2 connected to D+ Digital input to control the VObus voltage. VObus connected to Vreg EN_VObus = Low VObus disconnected from Vreg (Hi Z) EN_VObus = High No Connection, shall be neither grounded, nor connected to Vcc or Vbus. This pin activates the operating mode of the D−/D+ signals. OE = Low logic level Data are transmitted onto the USB bus Data are received from the USB bus OE = High logic level This pin provides a 3.3 V regulated voltage to supply the internal USB blocks and the external termination bias resistor. An external circuit can be connected to this LDO, assuming the current does not extend the maximum rating (50 mA). This pin connects the Vreg voltage to the 1.5 k external pull−up resistor. The VObus voltage is controlled by the logic states present pin 5. This pin activates or deactivate the internal RPU1 and RPU2 pull−up resistors: EN_RPU = H RPU1 and RPU2 activated EN_RPU = L RPU1 and RPU2 deactivated http://onsemi.com 4 NCN2500 MAXIMUM RATINGS (Note 1) Symbol Value Unit Power Supply Voltage Vcc 6.0 V Digital Input Pins Vind −0.5 V < Vin < Vcc + 0.5 V, but < 6.0 V V Digital Input Pins Vid −0.5 V < Vin < AGND + 0.5 V, but < 6.0 V V 10 2.0 200 kV kV V PDS Rja TBD TBD mW °C/W Operating Ambient Temperature Range TA −25 to +85 °C Operating Junction Temperature Range TJ −25 to +125 °C Maximum Junction Temperature (Note 3) TJmax +150 °C Tsg −65 to +150 °C Rating ESD Capability, HBM (Note 2) Vusb, D+, D−, GND Any Other Pins Machine Model, Any Pins VESD QFN−16 Package Power Dissipation @ Tamb = +85°C Thermal Resistance, Junction−to−Air (Rja) Storage Temperature Range 1. Maximum electrical ratings are defined as those values beyond which damage(s) to the device may occur whatever be the operating temperature. 2. Human Body Model, R = 1500 , C = 100 pF; Machine Model. 3. Absolute Maximum Rating beyond which damage(s) to the device may occur. http://onsemi.com 5 NCN2500 ELECTRICAL CHARACTERISTICS Characteristic Symbol Pin Min Typ Max Unit DIGITAL PARAMETERS SECTION @ 1.5 V < Vcc < 5.5 V (−40°C to +85°C ambient temperature, unless otherwise noted.) NOTE: Digital inputs undershoot < −0.3 V to ground, digital inputs overshoot < 0.3 V to Vcc. High Level Input Voltage DSPD, Vp, Vm, EN_VObus, SPND, OE, EN_RPU VIH 1, 3, 4, 5, 7, 9, 16 2/3 Vcc − − V Low Level Input Voltage DSPD, Vp, Vm, EN_VObus, SPND, OE, EN_RPU VIL 1, 3, 4, 5, 7, 9, 16 − − 1/3 Vcc V High Level Output Voltage RCV, Vp, Vm @ IOH = 1.0 mA VOH 2, 3, 4 2/3 Vcc − − V Low Level Output Voltage RCV, Vp, Vm @ IOL = 1.0 mA VOL 2, 3, 4 − − 1/3 Vcc V IIL 1, 3, 4, 5, 7, 9, 16 − − 5.0 A Input Leakage Current DSPD, Vp, Vm, EN_VObus, SPND, OE, EN_RPU td td tr, tf TRANSCEIVER SECTION @ 1.5 V < Vcc < 5.5 V (−40°C to +85°C ambient temperature, unless otherwise noted.) Static Output High, D−, D+ @ OE = Low, RL = 15 kΩ to GND VOH Static Output Low, D−, D+ @ OE = Low, RL = 1.5 kΩ to Vreg VOL 10, 11 − − 0.3 V Single Input Receiver Threshold VSE 10, 11 0.8 − 2.0 V 10, 11 2.8 − 3.6 V Single Ended Receiver Hysteresis (Note 4) − − − 200 − mV Differential Input Sensitivity | D+ − D− | @ 0.8 V < VCM < 2.5 V VDI 10, 11 0.2 − − V Differential Common Mode Including the VDI VCM 10, 11 0.8 − 2.5 V − 10, 11 − 70 − mV D+ and D− Transceiver Hi−Z State Leakage Current @ OE = 1, 0 V < Vusb < 3.3 V ILO 10, 11 − − 10 A Transceiver Input Capacitance (Note 4) Cin 10, 11 − − 20 pF ZDRV 10, 11 28 − 44 ZIN 10, 11 10 − − M Internal RPU1 Pull Resistor RRPU−1 10, 12 900 − 1575 Internal RPU2 Pull Up Resistor RRPU−2 10, 12 525 − 1515 Transition Rise Time @ CL = 50 pF @ CL = 600 pF tr 10, 11 75 75 − − 300 300 Transition Fall Time @ CL = 50 pF @ CL = 600 pF tf 75 75 − − 300 300 Differential Receiver Hysteresis (Note 4) Transceiver Output Resistance Transceiver Input Impedance (Note 4) LOW SPEED DRIVER OPERATION Rise and Fall Time Matching ns 10, 11 ns tr, tf 10, 11 80 − 125 % Output Signal Crossover Voltage VCRS 10, 11 1.3 − 2.0 V Data Transaction Rate Drate 10, 11 − − 1.5 Mbs 4. Parameter guaranteed by design, not production tested. http://onsemi.com 6 NCN2500 ELECTRICAL CHARACTERISTICS (continued) Characteristic Symbol Pin Min Typ Max Unit tr 10, 11 4.0 − 20 ns FULL SPEED DRIVER OPERATION Transition Rise Time @ CL = 50 pF Transition Fall Time @ CL = 50 pF tf 10, 11 4.0 − 20 ns tr, tf 10, 11 90 − 110 % Output Signal Crossover Voltage VCRS 10, 11 1.3 − 2.0 V Data Transaction Rate Drate 10, 11 − − 12 Mbs OE to RCVR Hi−Z Delay (see Figure 3) tPVZ 9 − − 15 ns Receiver Hi−Z to Transmit Delay (see Figure 3) tPZD − 15 − − ns OE to DRVR Hi−Z Delay (see Figure 3) tPDZ − − − 15 ns Driver Hi−Z to Receiver Delay (see Figure 3) tPZV − 15 − − ns Vp/Vm to D+/D− Propagation Delay (see Figure 6) tPLH 3, 4, 10, 11 − − 15 ns Vp/Vm to D+/D− Propagation Delay (see Figure 6) tPHL 3, 4, 10, 11 − − 15 ns D+/D− to RCV Propagation Delay @ 1.5 < Vcc < 5.5 V (see Figure 5) CL = 25 pF tr = tf = 3.0 ns tPLH 11, 10, 2 − − 15 ns D+/D− to RCV Propagation Delay @ 1.5 < Vcc < 5.5 V (see Figure 5) CL = 25 pF tr = tf = 3.0 ns tPHL 11, 10, 2 − − 15 ns D+/D− to Vp/D− Propagation Delay @ 1.5 < Vcc < 5.5 V (see Figure 5) CL = 25 pF tr = tf = 3.0 ns tPLH 11, 10, 3 − − 8.0 ns D+/D− to Vm/D− Propagation Delay @ 1.5 < Vcc < 5.5 V (see Figure 5) CL = 25 pF tr = tf = 3.0 ns tPHL 11, 10, 4 − − 8.0 ns Rise and Fall Time Matching TRANSCEIVER TIMING POWER SUPPLY SECTION @ 1.5 V < Vcc < 5.5 V (−40°C to +85°C ambient temperature, unless otherwise noted.) USB Port Input Supply Voltage Vusb 14 4.0 − 5.25 V Output Regulated Voltage @ 4.0 V < Vusb < 5.25 V, Cin = 4.7 F, Cout = 1.0F, Ireg = 100 mA Vreg 12 3.0 3.3 3.6 V Line Regulation Output Voltage Vreg 12 − 0.1 − % Standby Current @ Vusb = 5.25 V, OE = H, SPND = H, D+ & D− are Idle, Vcc = 3.6 V IVCC 14 − 1.0 − A Standby Current @ Vusb = 5.25 V, OE = H, SPND = L, D+ & D− are Idle, Vcc = 3.6 V IVCC 14 − 1.0 − A Operating Current OE = L, D− & D+ Active, SPND = L (Note 5), Transmitter Mode @ F = 6.0 MHz, CL = 50 pF @ F = 750 kHz, CL = 600 pF IVCC 14 − Operating Current OE = H, D− & D+ Active, SPND = L (Note 5), Receiver Mode @ F = 6.0 MHz, CL = 25 pF @ F = 750 kHz, CL = 25 pF IVCC 14 5. Parameter guaranteed by design, not production tested. http://onsemi.com 7 A 300 40 − − 1.5 250 − − − mA A NCN2500 ELECTRICAL CHARACTERISTICS (continued) Characteristic Symbol Pin Min Typ Max Unit POWER SUPPLY SECTION @ 1.5 V < Vcc < 5.5 V (continued) (−40°C to +85°C ambient temperature, unless otherwise noted.) USB Supply Current @ D− & D+ are Idle, Vusb = 5.25 V and: @ SPND = 1, OE = 1, DSPD = 0, EN_RPU = 0 @ SPND = 0, OE = 1, DSPD = 1, EN_RPU = 0 @ SPND = 0, OE = 0, DSPD = 0, EN_RPU = 0 IBUS 14 @ SPND = 1, OE = 1, DSPD = 0, EN_RPU = 1 @ SPND = 0, OE = 1, DSPD = 1, EN_RPU = 1 @ SPND = 0, OE = 0, DSPD = 0, EN_RPU = 1 @ D− & D+ are Active, CL = 50 pF, Vusb = 5.25 V, SPND = 0, OE = 0, DSPD = 1, F = 6.0 MHz (Note 6) @ EN_RPU = Low @ EN_RPU = High @ D− & D+ are Active (Note 6) Vusb = 5.25 V, SPND = 0, OE = 0, DSPD = 1, F = 750 kHz, CL = 600 pF F = 750 kHz, CL = 300 pF 6. Parameter guaranteed by design, not production tested. http://onsemi.com 8 − − − 120 1.7 1.7 200 − − A mA mA − − − 320 − − 500 − − A A A − − 8.3 9.4 − − mA mA − − 5.4 3.9 − − mA mA NCN2500 Table 1. Internal RPU1 and RPU2 Pull−Up Resistors Control EN_RPU DSPD S1 S2 S3 Data Line USB Note 0 X X X X X X Internal RPU De−activated, S1 and S3 are Forced OPEN 1 1 Open X Open Vbus Off X Internal RPU disabled 1 1 Close Close Open Idle Full Speed Internal RPU Activated 1 1 Closed Open Open Receiving Full Speed Internal RPU Activated 1 0 Open X Open Vbus Off X Internal RPU disabled 1 0 Open Close Close Idle Low Speed Internal RPU Activated 1 0 Open Open Close Receiving Low Speed Internal RPU Activated 7. See Figure 8 and Figure 9. Table 2. Transmit Mode Interface Control (OE = 0 Transmit Mode) SPND Vp Vm D+ D− RCV STATE 0 0 0 0 0 X SE0 0 0 1 0 1 0 Low 0 1 0 1 0 1 High 0 1 1 1 1 X Undefined 1 0 0 0 0 0 Suspend 1 0 1 0 1 0 Suspend 1 1 0 1 0 0 Suspend 1 1 1 1 1 0 Suspend Table 3. Receive Mode Interface Control (OE = 1 Receive Mode) SPND D+ D− Vp Vm RCV STATE 0 0 0 0 0 X SE0 0 0 1 0 1 0 Low 0 1 0 1 0 1 High 0 1 1 1 1 X Undefined 1 0 0 0 0 0 Suspend 1 0 1 0 1 0 Suspend 1 1 0 1 0 0 Suspend 1 1 1 1 1 0 Suspend http://onsemi.com 9 NCN2500 1 OE 0 tPZV tPVZ Vp tPZD Vm D+ D− Figure 3. Enable and Disable USB Times D+ 90% DIFFERENTIAL DATA LINES VCRS 10% D− tR tF Figure 4. USB Line Rise and Fall Times D+ DIFFERENTIAL DATA LINES D− tPLH tPHL VOH OUTPUT SIGNAL VOL VSS Figure 5. Receiver Propagation Delays VOH INPUT SIGNAL VOL VSS tPLH tPHL D+ DIFFERENTIAL DATA LINES D− Figure 6. Driver Propagation Delays http://onsemi.com 10 NCN2500 TRANSMITTER MODE RECEIVER MODE 1 1 C1 25 pF 1 1 C2 50 pF/600 pF GND C1 25 pF GND C2 50 pF/600 pF GND GND Figure 7. Input/Output Stray Capacitance Definitions +33 V S2 RPU2 S2 RPU2 RPU2 RPU1 S3 PORT CONTROL S1 PORT CONTROL S3 RPU1 11 D+ 10 D− RPU1 & RPU2 Disabled and Vbus Off S1 11 D+ 10 D− IDLE, High Speed 11 D+ 10 D− IDLE, Low Speed Figure 8. Internal RPU1 and RPU2 Pull−Up Resistors Operation, IDLE Mode +33 V S2 +33 V S2 RPU2 RPU1 PORT CONTROL S1 RPU2 RPU1 S3 S1 11 D+ 10 D− RECEIVING (High Speed) S3 11 D+ 10 D− RECEIVING (Low Speed) NOTE: Internal Pull−Up Resistor Range: RPU1: 900 min−1575 max, RPU2: 525 min−1515 max Figure 9. Internal RPU1 and RPU2 Pull−Up Resistors Activated, RECEIVING Mode http://onsemi.com 11 S3 PORT CONTROL RPU1 S1 +33 V PORT CONTROL S2 +33 V NCN2500 TYPICAL APPLICATIONS GND C2 4.7 uF Vcc 10 uF 15 16 Vcc 14 Vusb EN_RPU 12 Vreg 5 C 2 3 4 1 9 7 1 uF 13 VObus GND EN_VObus RCV Vp Vm DSPD OE SPND 11 D+ R2 2 33 R 10 D− NCN2500 R3 3 33 R 6 GND GND C3 USB PORT GND 1 C1 4 GND GND In this application, the two internal pull−up resistors (RPU1 and RPU2) are used to bias the USB line. Consequently, the VObus voltage is deactivated (pin 5 connected to Vcc). Figure 10. Fully Independent Power Supplies http://onsemi.com 12 NCN2500 TYPICAL APPLICATIONS C2 GND 1 4.7 uF 16 Vcc 14 Vusb EN_RPU 5 2 3 4 1 9 7 C GND 1 uF 13 VObus EN_VObus RCV Vp Vm DSPD OE SPND R2 11 D+ 2 33 R R3 10 D− 3 33 R 6 GND GND C3 12 Vreg USB PORT 15 NCN2500 4 GND GND Figure 11. Common Power Supply From USB Port 1 15 16 GND Vusb Vcc EN_RPU Vreg RS232 PORT 5 2 3 4 1 9 7 GND C VObus 12 C3 1 uF 13 GND EN_VObus RCV Vp Vm DSPD OE SPND D+ 11 R2 2 33 R D− GND GND 14 USB PORT C2 10 uF NCN2500 10 4 GND Figure 12. Serial to USB Stand−Alone Interface 13 3 33 R 6 GND http://onsemi.com R3 NCN2500 TYPICAL APPLICATIONS 1 15 16 GND Vcc Vusb C3 EN_RPU Vreg RS232 PORT 5 GND C 2 3 4 1 9 7 VObus 12 13 GND 1 uF EN_VObus RCV Vp Vm DSPD OE SPND D+ 11 R2 2 33 R D− GND GND 14 USB PORT C2 4.7 uF 10 3 33 R 6 NCN2500 R3 4 GND GND Figure 13. Peripheral are Powered by the Vreg Supply 1 15 16 GND Vcc Vusb EN_RPU Vreg RS232 PORT 5 GND C 2 3 4 1 9 7 VObus 12 13 RCV Vp Vm DSPD OE SPND C3 GND 1 uF R1 1.5 k EN_VObus D+ 11 R2 2 33 R D− GND GND 14 USB PORT C2 4.7 uF NCN2500 10 R3 3 33 R 6 4 GND GND Note: Pin 16 can be left open, due to the internal pull−down resistor, or connected to ground. Figure 14. Using External Pull−Up Resistors http://onsemi.com 14 NCN2500 PACKAGE DIMENSIONS QFN−16 TBD SUFFIX CASE 485G−01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. −X− A M −Y− DIM A B C D E F G H J K L M N P R B N 0.25 (0.010) T 0.25 (0.010) T J R C 0.08 (0.003) T −T− K SEATING PLANE E H G L 5 8 4 9 F 12 1 16 D 13 P NOTE 3 0.10 (0.004) M T X Y http://onsemi.com 15 MILLIMETERS MIN MAX 3.00 BSC 3.00 BSC 0.80 1.00 0.23 0.28 1.75 1.85 1.75 1.85 0.50 BSC 0.875 0.925 0.20 REF 0.00 0.05 0.35 0.45 1.50 BSC 1.50 BSC 0.875 0.925 0.60 0.80 INCHES MIN MAX 0.118 BSC 0.118 BSC 0.031 0.039 0.009 0.011 0.069 0.073 0.069 0.073 0.020 BSC 0.034 0.036 0.008 REF 0.000 0.002 0.014 0.018 0.059 BSC 0.059 BSC 0.034 0.036 0.024 0.031 NCN2500 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800−282−9855 Toll Free USA/Canada http://onsemi.com 16 NCN2500/D