NCV8184
Micropower 70 mA
Low Dropout Tracking
Regulator/Line Driver
The NCV8184 is a monolithic integrated low dropout tracking
voltage regulator designed to provide an adjustable buffered output
voltage that closely tracks (±5.0 mV) the reference input.
The part can be used in automotive applications with remote
sensors, or any situation where it is necessary to isolate the output of
your regulator.
The NCV8184 also enables the user to bestow a quick upgrade to
their module when added current is needed, and the existing regulator
cannot provide.
The versatility of this part also enables it to be used as a high−side
driver.
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SO−8
D SUFFIX
CASE 751
8
1
DPAK
5−PIN
DT SUFFIX
CASE 175AA
1
5
Features
• 70 mA Source Capability
• Output Tracks within ±5.0 mV
• Low Input Voltage Tracking Performance
VOUT
(Works Down to VREF = 2.1 V)
Low Dropout (0.35 V Typ. @ 50 mA)
Low Quiescent Current
Thermal Shutdown
Wide Operating Range
Internally Fused Leads in SO−8 Package
NCV Prefix, for Automotive and Other Applications Requiring Site
and Change Control
GND
GND
1
8
VIN
GND
GND
8184
ALYW
•
•
•
•
•
•
PIN CONNECTIONS AND
MARKING DIAGRAM
ADJ
VREF/ENABLE
Pin 1. VIN
2. VOUT
3. GND
4. ADJ
5. VREF/ENABLE
NCV8184
AWLYWW
1
VIN
VOUT
Current Limit &
Saturation Sense
ADJ
−
VREF/ENABLE
+
A
WL, L
Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION*
Device
GND
BIAS
Package
Shipping
NCV8184D
SO−8
95 Units/Rail
NCV8184DR2
SO−8
2500 Tape & Reel
*Consult your local sales representative for DPAK
package option.
Thermal
Shutdown
Figure 1. Block Diagram
Semiconductor Components Industries, LLC, 2003
July, 2003 − Rev. 11
1
Publication Order Number:
NCV8184/D
NCV8184
MAXIMUM RATINGS*
Rating
Value
Unit
Storage Temperature
−65 to 150
°C
Supply Voltage Range (continuous)
−15 to 42
V
Supply Voltage Operating Range
4.0 to 42
V
42
V
Voltage Range (VOUT, ADJ)
−3.0 to 42
V
Voltage Range (VREF/ENABLE)
−0.3 to 42
V
Maximum Junction Temperature
150
°C
2.5
200
kV
V
Peak Transient Voltage (VIN = 14 V, Load Dump Transient = 28 V)
ESD Capability
Human Body Model
Machine Model
°C/W
Package Thermal Resistance, SO−8 (Note 3)
Junction−to−Case, RJC
Junction−to−Ambient, RJA
Junction−to−Pin, RJP
32
98
58
°C/W
Package Thermal Resistance, DPAK, 5−Pin
Junction−to−Case, RJC
Junction−to−Ambient, RJA
Lead Temperature Soldering:
(Note 4)
(Note 4)
Reflow: (SMD styles only) (Note 1)
240 peak
(Note 2)
°C
1. 60 second maximum above 183°C.
2. −5°C / +0°C Allowable Conditions
3. Measured on 1 inch pad.
4. Consult your local sales representative for DPAK information.
*The maximum package power dissipation must be observed.
**Depending on thermal properties of substrate RJA = RJC + RCA.
ELECTRICAL CHARACTERISTICS (VIN = 14 V; VREF/ENABLE > 2.1 V; −40°C < TJ < +125°C; COUT = 1.0 F;
IOUT = 1.0 mA; ADJ = VOUT; COUT−ESR = 1.0 , unless otherwise specified.)
Test Conditions
Parameter
Min
Typ
Max
Unit
−10
−
10
mV
−5.0
−
5.0
mV
Regular Output
VREF/ENABLE − VOUT
VOUT Tracking Error
6.0 V ≤ VIN ≤ 26 V, 100 A ≤ IOUT ≤ 50 mA
2.1 V ≤ VREF/ENABLE ≤ (VIN − 600 mV)
VIN = 12 V, IOUT = 5.0 mA, VREF/ENABLE = 5.0 V
Dropout Voltage (VIN − VOUT)
IOUT = 100 A
IOUT = 5.0 mA
IOUT = 50 mA
−
−
−
100
250
350
150
500
600
mV
mV
mV
Line Regulation
6.0 V ≤ VIN ≤ 26 V, VREF/ENABLE = 5.0 V
−
−
10
mV
Load Regulation
100 A ≤ IOUT ≤ 50 mA, VREF/ENABLE = 5.0 V
−
−
10
mV
ADJ Input Bias Current
VREF/ENABLE = 5.0 V
−
0.2
1.0
A
Current Limit
VIN = 14 V, VREF/ENABLE = 5.0 V, VOUT = 90% of ADJ
70
−
400
mA
Quiescent Current (IIN − IOUT)
VIN = 12 V, IOUT = 50 mA
VIN = 12 V, IOUT = 100 A
VIN = 12 V, VREF/ENABLE = 0 V
−
−
−
5.0
50
−
7.0
70
20
mA
A
A
Ripple Rejection
f = 120 Hz, IOUT = 50 mA, 6.0 V ≤ VIN ≤ 26 V
60
−
−
dB
Thermal Shutdown
Guaranteed by Design
150
180
210
°C
0.8
−
2.1
V
−
0.2
1.0
A
VREF/ENABLE
Enable Voltage
Input Bias Current
−
VREF/ENABLE = 5.0 V
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2
NCV8184
PACKAGE PIN DESCRIPTION
Package Lead Number
SO−8
DPAK, 5−PIN
Lead Symbol
8
1
VIN
5
2
VREF/ENABLE
2, 3, 6, 7
3
GND
Ground.
4
4
ADJ
Adjust lead, noninverting input.
1
5
VOUT
Regulated output.
Function
Battery supply input voltage.
Reference voltage and ENABLE input.
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3
NCV8184
0.4
1.0
0.3
0.8
Tracking Error (mV)
Tracking Error (mV)
TYPICAL PERFORMANCE CHARACTERISTICS
0.2
0.1
0.0
−0.1
−0.2
0.6
0.4
−40°C
0.2
+25°C
0.0
−0.2
+125°C
−0.4
−0.3
−40
−20
0
20
40
60
Temperature (°C)
80
100
−0.6
120
0
Figure 2. Tracking Error vs Temperature
50
60
70
4.0
3.5
Stable Region
40
3.0
35
Unstable Region
Unstable Region
30
ESR ()
ESR ()
30
40
50
Output Current (mA)
Figure 3. Tracking Error vs Output Current
Vout = 5V
45
20
10
25
20
2.5
2.0
1.5
15
Data is for 0.1 F only. Capacitor
values 0.5 F and above do not
exhibit instability with low ESR.
0.5
5
0
1.0
C2 = 10F
10
C2 = 0.1F
0
10
20
Stable Region
50
30
40
Output Current (mA)
60
0.0
70
0
10
20
C2 = 0.1F
Vout = 5V
30
40
50
Output Current (mA)
60
70
Figure 5. Output Stability with 1.0 F at Low ESR
Figure 4. Output Stability with Capacitor Change
2.5
12
VREF / ENABLE = 5V
Quiescent Current (mA)
Quiescent Current (mA)
10
+125°C
8
+25°C
6
−40°C
4
2
2
IOUT = 20 mA
1.5
1
0.5
IOUT = 1 mA
0
0
10
20
30
40
50
Output Current (mA)
60
0
70
0
Figure 6. Quiescent Current vs Output Current
5
10
15
Input Voltage (V)
20
Figure 7. Quiescent Current vs Input Voltage
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4
25
NCV8184
TYPICAL PERFORMANCE CHARACTERISTICS
6
+125°C
0.4
Dropout Voltage (V)
OUTPUT VOLTAGE VOUT (V)
0.5
+25°C
0.3
0.2
−40°C
0.1
5
4
+25°C
3
+125°C
2
1
−40°C
0.0
0
10
20
30
40
50
Output Current (mA)
60
0
70
0
6
0.6
Reference Current (A)
0.7
5
4
3
2
1
0
10
15
20
INPUT VOLTAGE VIN (V)
25
30
Figure 9. Output Voltage vs Input Voltage
7
0.5
0.4
0.3
0.2
0.1
0
1
2
3
4
5
Reference Voltage (V)
6
0.0
7
0
1
2
3
4
5
Reference Voltage (V)
120
115
110
105
100
95
90
85
80
0
1
2
6
Figure 11. Reference Current vs Reference
Voltage
Figure 10. Output Voltage vs Reference Voltage
Thermal Resistance, Junction to Ambient,
RJA, (°C/W)
Output Voltage (V)
Figure 8. Dropout Voltage vs Output Current
5
VREF/ENABLE = 5 V
3
4
Copper Area (in2)
5
Figure 12. SO−8, JA as a Function of the Pad
Copper Area (2 oz. Cu Thickness),
Board Material = 0.0625 G−10/R−4
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5
6
7
NCV8184
CIRCUIT DESCRIPTION
ENABLE Function
Output Voltage
By pulling the VREF/ENABLE lead below 0.8 V, (see
Figure 16 or Figure 17), the IC is disabled and enters a sleep
state where the device draws less than 20 A from supply.
When the VREF/ENABLE lead is greater than 2.1 V, VOUT
tracks the VREF/ENABLE lead normally.
The output is capable of supplying 70 mA to the load
while configured as a similar (Figure 13), lower (Figure 15),
or higher (Figure 14) voltage as the reference lead. The Adj
lead acts as the inverting terminal of the op amp and the
VREF lead as the non−inverting.
The device can also be configured as a high−side driver as
displayed in Figure 18.
GND
GND
RA
Adj
VOUT, 70 mA
NCV8184
VREF
Figure 14. Tracking Regulator at Higher Voltages
Figure 13. Tracking Regulator at the Same Voltage
GND
GND
R
VOUT VREF(1 E)
RA
VOUT VREF
VOUT, 70 mA
Loads
VOUT
C2**
GND
10 F
GND
C1*
1.0 F
VREF/
ENABLE
Adj
5.0 V
VREF/
ENABLE
Adj
B+
VIN
NCV8184
C1*
1.0 F
B+
VIN
C2**
10 F
C1*
1.0 F
GND
VOUT
GND
GND
GND
R1
R2
GND
C1*
1.0 F
GND
R
VREF/
ENABLE
Adj
VREF
VREF/
ENABLE
B+
VIN
NCV8184
GND
VOUT, 70 mA
Loads
VOUT
C2**
GND
10 F
RF
GND
B+
VIN
NCV8184
VOUT, 70 mA
Loads
VOUT
C2**
GND
10 F
VREF
from MCU
VOUT VREF( R2 )
R1 R2
Figure 15. Tracking Regulator at Lower Voltages
NCV8501
VREF (5.0 V)
70 mA
100 nF
GND
VOUT
To Load 10 F
(e.g. sensor)
GND
GND
Adj
NCV8184
70 mA
VOUT
GND
VIN
GND
C1*
1.0 F
C
GND
VREF/
ENABLE
Adj
VIN
NCV8184
VIN
6.0 V−40 V
Figure 16. Tracking Regulator with ENABLE Circuit
GND
GND
VREF/
ENABLE
VOUT B VSAT
I/O
Figure 17. Alternative ENABLE Circuit
Figure 18. High−Side Driver
* C1 is required if the regulator is far from the power source filter.
** C2 is required for stability.
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6
B+
MCU
NCV8184
APPLICATION NOTES
Switched Application
where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current, for the
application,and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum
permissible value of RJA can be calculated:
The NCV8184 has been designed for use in systems where
the reference voltage on the VREF/ENABLE pin is
continuously on. Typically, the current into the
VREF/ENABLE pin will be less than 1.0 A when the
voltage on the VIN pin (usually the ignition line) has been
switched out (VIN can be at high impedance or at ground.)
Reference Figure 19.
VOUT
GND
GND
Adj
VIN
NCV8184
C2
10 F
RJA 150°C TA
PD
Ignition
Switch
VOUT
GND
The value of RJA can then be compared with those in the
package section of the data sheet. Those packages with
RJA’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
VBAT
C1
1.0 F
GND
VREF/
ENABLE
< 1.0 A
(eq. 2)
VREF
5.0 V
Figure 19.
IIN
VIN
SMART
REGULATOR
IOUT
VOUT
External Capacitors
The output capacitor for the NCV8184 is required for
stability. Without it, the regulator output will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst−case is determined at the minimum ambient
temperature and maximum load expected.
The output capacitor can be increased in size to any
desired value above the minimum. One possible purpose of
this would be to maintain the output voltage during brief
conditions of negative input transients that might be
characteristic of a particular system.
The capacitor must also be rated at all ambient
temperatures expected in the system. To maintain regulator
stability down to −40°C, a capacitor rated at that temperature
must be used.
More information on capacitor selection for SMART
REGULATORs is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through the
Literature Distribution Center or via our website at
http://www.onsemi.com.
Control
Features
IQ
Figure 20. Single Output Regulator with Key
Performance Parameters Labeled
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RJA:
RJA RJC RCS RSA
where:
RJC = the junction−to−case thermal resistance,
RCS = the case−to−heatsink thermal resistance, and
RSA = the heatsink−to−ambient thermal resistance.
Calculating Power Dissipation in a Single Output
Linear Regulator
RJC appears in the package section of the data sheet. Like
RJA, it is a function of package type. RCS and RSA are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
The maximum power dissipation for a single output
regulator (Figure 20) is:
PD(max) {VIN(max) VOUT(min)} IOUT(max)
VIN(max)IQ
(eq. 3)
(eq. 1)
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7
NCV8184
PACKAGE DIMENSIONS
SO−8
D SUFFIX
CASE 751−07
ISSUE AA
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDAARD IS 751−07
−X−
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
−Y−
G
C
N
X 45 SEATING
PLANE
−Z−
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
X
S
J
S
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
DPAK, 5−PIN CENTER LEAD CROP
DT SUFFIX
CASE 175AA−01
ISSUE O
−T−
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
E
R
R1
Z
A
S
1 2 3 4 5
U
K
F
J
L
H
D
G
5 PL
0.13 (0.005)
M
T
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8
DIM
A
B
C
D
E
F
G
H
J
K
L
R
R1
S
U
V
Z
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.020 0.028
0.018 0.023
0.024 0.032
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.045 BSC
0.170 0.190
0.185 0.210
0.025 0.040
0.020
−−−
0.035 0.050
0.155 0.170
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.51
0.71
0.46
0.58
0.61
0.81
4.56 BSC
0.87
1.01
0.46
0.58
2.60
2.89
1.14 BSC
4.32
4.83
4.70
5.33
0.63
1.01
0.51
−−−
0.89
1.27
3.93
4.32
NCV8184
Notes
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9
NCV8184
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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NCV8184/D