ETC SY10/100H841L

ClockWorks™
SY10H841L
SY100H841L
FINAL
3.3V SINGLE SUPPLY QUAD
PECL-TO-TTL W/LATCHED
OUTPUT ENABLE
DESCRIPTION
FEATURES
■
■
■
■
■
3.3V power supply
Translates positive ECL to TTL (PECL-to-TTL)
300ps pin-to-pin skew
500ps part-to-part skew
Differential internal design for increased noise
immunity and stable threshold inputs
■ VBB reference output
The SY10/100H841L are single supply, low skew
translating 1:4 clock drivers.
The devices feature a 24mA TTL output stage, with
AC performance specified into a 20pF load capacitance.
A latch is provided on-chip. When LEN is LOW (or left
open, in which case it is pulled low by the internal pulldowns) the latch is transparent. A HIGH on the enable
pin (EN) forces all outputs LOW.
As frequencies increase to 40MHz and above, precise
timing and shaping of clock signals becomes extremely
important. The H841 solves several clock distribution
problems such as minimizing skew (300ps), maximizing
clock fanout (24mA drive), and precise duty cycle control
through a proprietary differential internal design.
The 10K version is compatible with 10KH ECL logic
levels. The 100K version is compatible with 100K levels.
■
■
■
■
Single supply
Enable input
Latch enable input
Extra TTL and ECL power/ground pins to reduce
cross-talk/noise
■ High drive capability: 24mA each output
■ Fully compatible with industry standard 10K, 100K
I/O levels
■ Available in 16-pin SOIC package
PIN CONFIGURATION
BLOCK DIAGRAM
Q0
LEN
1
16
Q3
EN
2
15
GT
GE
3
14
Q2
VE
4
13
VT
D
5
12
VT
D
6
11
Q1
VBB
7
10
GT
GT
8
9
Q0
Q1
SOIC
Z16-1
Q2
VBB
D
D
D Q
PIN NAMES
Q3
LEN
Pin
EN
Function
GT
TTL Ground (0V)
VT
TTL VCC (+3.3V)
VE
ECL VCC (+3.3V)
GE
ECL Ground (0V)
D, D
Signal Input (PECL)
VBB
VBB Reference Output (PECL)
Q0 - Q3
Signal Outputs (TTL)
EN
Enable Input (PECL)
LEN
Latch Enable Input
Rev.: D
1
Amendment: /0
Issue Date: March 2002
ClockWorks™
SY10H841L
SY100H841L
Micrel
TRUTH TABLE
PIN DESCRIPTION
D
LEN
EN
Q
Pin
Symbol
L
L
L
L
1
LEN
Latch Enable Input
H
L
L
H
2
EN
Enable Input (PECL)
X
X
H
L
3
GE
ECL Ground (0V)
X
H
L
Latch
4
VE
ECL VCC (+3.3V)
5
D
ECL Signal Input (Non-inverting)
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Value
Unit
Description
6
D
7
VBB
VBB Reference Output (PECL)
ECL Signal Input (Inverting)
8
GT
TTL Ground (0V)
9
Q0
Signal Output (TTL)
10
GT
TTL Ground (0V)
11
Q1
Signal Output (TTL)
12
VT
TTL VCC (+3.3V)
VE (ECL)
VT (TTL)
Power Supply
Voltage
–0.5 to +7.0
–0.5 to +7.0
V
VI (ECL)
VOUT (TTL)
Input Voltage
0.0 to VEE
0.0 to VT
V
Tstore
Storage Temperature
–65 to +150
˚C
13
VT
TTL VCC (+3.3V)
TA
Operating Temperature
0 to +85
˚C
14
Q2
Signal Output (TTL)
15
GT
TTL Ground (0V)
16
Q3
Signal Output (TTL)
NOTE:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS
are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections
of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions
for extended periods may affect device reliability.
DC CHARACTERISTICS
VT = VE = +3.0V to +3.6V
TA = 0°C
Symbol
Parameter
TA = +25°C
TA = +85°C
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Condition
IEE
Power Supply Current
ECL
—
40
—
40
—
40
mA
VE Pin
ICCH
Power Supply Current
TTL
—
20
—
20
—
20
mA
Total all VT pins
—
25
—
25
—
25
ICCL
TTL DC ELECTRICAL CHARACTERISTICS
VT = VE = +3.0V to +3.6V
TA = 0°C
Symbol
Parameter
TA = +25°C
TA = +85°C
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Condition
VOH
Output HIGH Voltage
2.0
—
2.0
—
2.0
—
V
IOH = –3.0mA
VOL
Output LOW Voltage
—
0.5
—
0.5
—
0.5
V
IOL = 24mA
IOS
Output Short Circuit Current
–80
—
–80
—
–80
—
mA
VOUT = 0V
2
ClockWorks™
SY10H841L
SY100H841L
Micrel
10H ECL DC ELECTRICAL CHARACTERISTICS(1)
VT = VE = +3.0V to +3.6V
TA = 0°C
Symbol
Parameter
TA = +25°C
TA = +85°C
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Condition
IIH
Input HIGH Current
—
225
—
175
—
175
µA
—
IIL
Input LOW Current
0.5
—
0.5
—
0.5
—
µA
—
VIH
Input HIGH Voltage
2.130
2.460
2.170
2.490
2.240
2.580
V
VE = 3.3V
VIL
Input LOW Voltage
1.350
1.820
1.350
1.820
1.350
1.855
V
VE = 3.3V
VBB
Output Reference Voltage
1.920
2.030
1.950
2.050
1.990
2.110
V
VE = 3.3V
NOTE:
1. ECL VIH, VIL and VBB are referenced to VCCE and will vary 1:1 with the power supply. The levels shown are for IVT = IVO = VCCE = +3.3V.
100H ECL DC ELECTRICALCHARACTERISTICS(1)
VT = VE = +3.0V to +3.6V
TA = 0°C
Symbol
Parameter
TA = +25°C
TA = +85°C
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Condition
—
225
—
175
—
175
µA
—
IIH
Input HIGH Current
IIL
Input LOW Current
0.5
—
0.5
—
0.5
—
µA
—
VIH
Input HIGH Voltage
2.135
2.420
2.135
2.420
2.135
2.420
V
VE = 3.3V
VIL
Input LOW Voltage
1.490
1.825
1.490
1.825
1.490
1.825
V
VE = 3.3V
VBB
Output Reference Voltage
1.920
2.040
1.920
2.040
1.920
2.040
V
VE = 3.3V
NOTE:
1. ECL VIH, VIL and VBB are referenced to VCCE and will vary 1:1 with the power supply. The levels shown are for IVT = IVO = VCCE = +3.3V.
AC CHARACTERISTICS
VT = VE = +3.0V to +3.6V
TA = 0°C
Symbol
Parameter
TA = +25°C
TA = +85°C
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Condition
tPLH
tPHL
Propagation Delay
D to Output
Q0–Q3
2.2
3.2
2.1
3.1
2.0
3.0
ns
CL = 20pF
tskpp
Part-to-Part Skew(1,4)
Q0–Q3
—
0.5
—
0.5
—
0.5
ns
CL = 20pF
tskew++
Within-Device
Skew(2,4)
Q0–Q3
—
0.3
—
0.3
—
0.3
ns
CL = 20pF
tskew– –
Within-Device Skew(3,4)
Q0–Q3
—
0.3
—
0.3
—
0.3
ns
CL = 20pF
tPLH
tPHL
Propagation Delay
LEN to Q
Q0–Q3
2.2
3.2
2.1
3.1
2.0
3.0
ns
CL = 20pF
tPLH
tPHL
Propagation Delay
EN to Output
Q0–Q3
2.2
3.2
2.1
3.1
2.0
3.0
ns
CL = 20pF
tr
tf
Output Rise/Fall Time
1.0V to 2.0V
Q0–Q3
—
1.5
—
1.5
—
1.5
ns
CL = 20pF
fMAX
Max. Input Frequency(5,6)
Q0–Q3
160
—
160
—
160
—
MHz
CL = 20pF
—
Pulse Width
Q0–Q3
1.5
—
1.5
—
1.5
—
ns
—
—
Recovery Time EN
Q0–Q3
1.0
—
1.0
—
1.0
—
ns
—
tS
Set-up Time D, EN
Q0–Q3
0.75
—
0.75
—
0.75
—
ns
—
tH
Hold Time D, EN
Q0–Q3
0.75
—
0.75
—
0.75
—
ns
—
NOTES:
1. Device-to-Device Skew considering HIGH-to-HIGH transitions at common
VCC level.
2. Within-Device Skew considering HIGH-to-HIGH transitions at common
VCC level.
3. Within-Device Skew considering LOW-to-LOW transitions at common
VCC level.
4. All skew parameters are guaranteed but not tested.
5. Frequency at which output levels will meet a 0.8V to 2.0V minimum swing.
6. The fMAX value is specified as the minimum guaranteed maximum
frequency. Actual operational maximum frequency may be greater.
3
ClockWorks™
SY10H841L
SY100H841L
Micrel
TTL SWITCHING CIRCUIT
VCC & VCCO
VEE
USE 0.1µF CAPACITORS
FOR DECOUPLING.
TTL
PECL
50Ω COAX
DEVICE
UNDER
TEST
IN
PULSE
GENERATOR
50Ω COAX
USE OSCILLOSCOPE
INTERNAL 50Ω LOAD
FOR TERMINATION.
OUT
450Ω
50Ω COAX
CH A
CH B
OSCILLOSCOPE
ECL/TTL PROPAGATION DELAY — SINGLE ENDED
50%
VIN
Tpd– –
Tpd++
1.5V
VOUT
ECL/TTL WAVEFORMS: RISE AND FALL TIMES
2.0V
0.8V
VOUT
Trise
Tfall
LOGIC DIAGRAM
PRODUCT
ORDERING CODE
Ordering
Code
Package
Type
Operating
Range
Marking
Code
SY10H841LZC
Z16-1
Commercial
SY10H841LZ
SY10H841LZCTR*
Z16-1
Commercial
SY10H841LZ
SY100H841LZC
Z16-1
Commercial
SY100H841LZC
SY100H841LZCTR*
Z16-1
Commercial
SY100H841LZC
*Tape and Reel
4
ClockWorks™
SY10H841L
SY100H841L
Micrel
16 LEAD SOIC .300" WIDE (Z16-1)
Rev. 03
MICREL-SYNERGY
TEL
3250 SCOTT BOULEVARD SANTA CLARA CA 95054
+ 1 (408) 980-9191
FAX
+ 1 (408) 914-7878
WEB
USA
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2002 Micrel Incorporated
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