54ACTQ16245 16-Bit Transceiver with TRI-STATE ® Outputs General Description Features The ’ACTQ16245 contains sixteen non-inverting bidirectional buffers with TRI-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each has separate control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. The ’ACTQ16245 utilizes NSC Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series ® features GTO ® output control for superior performance. n Utilizes NSC FACT Quiet Series technology n Guaranteed simultaneous switching noise level and dynamic threshold performance n Bidirectional non-inverting buffers n Separate control logic for each byte n 16-bit version of the ’ACTQ245 n Outputs source/sink 24 mA n Standard Microcircuit Drawing (SMD) 5962-9562001 Logic Symbol Connection Diagram Pin Assignment for CERPAK DS010926-1 Pin Description Pin Names Description OEn Output Enable Input (Active Low) T/R Transmit/Receive Input A0–A15 Side A Inputs/Outputs B0–B15 Side B Outputs/Inputs DS010926-2 GTO™ is a trademark of National Semiconductor Corporation. TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT™ and FACT Quiet Series™ are trademarks of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS010926 www.national.com 54ACTQ16245 16-Bit Transceiver with TRI-STATE Outputs September 1998 is transmitted to Bus B. When the T/R input is LOW, Bus B data is transmitted to Bus A. The TRI-STATE outputs are controlled by an Output Enable (OEn) input for each byte. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs. Functional Description The ’ACTQ16245 contains sixteen non-inverting bidirectional buffers with TRI-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The following description applies to each byte. When the T/R input is HIGH, then Bus A data Truth Tables Inputs OE1 Outputs T/R1 L L Bus B0–B7 Data to Bus A0–A7 L H Bus A0–A7 Data to Bus B0–B7 H X HIGH-Z State on A0–A7, B0–B7 Inputs OE2 Outputs T/R2 L L Bus B8–B15 Data to Bus A8–A15 L H Bus A8–A15 Data to Bus B8–B15 H X HIGH-Z State on A8–A15, B8–B15 H = High Voltage Level L = Low Voltage Level X = Immaterial Z = High Impedance Logic Diagram DS010926-3 www.national.com 2 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Output Diode Current (IOK) VO = −0.5V VO = VCC +0.5V DC Output Voltage (VO) DC Output Source/Sink Current (IO) DC VCC or Ground Current per Output Pin Junction Temperature C-DIP Storage Temperature Supply Voltage (VCC) ’ACTQ Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54ACTQ Minimum Input Edge Rate (dV/dt) ’ACTQ Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V −0.5V to + 7.0V −20 mA +20 mA −20 mA +20 mA −0.5V to VCC +0.5V ± 50 mA 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception to ensure that the system design is reliable over its power supply, temperature, and output/input loading varaibles. National does not recommend operation of FACT™ circuits outside databook specifications. ± 50 mA +175˚C −65˚C to +150˚C DC Electrical Characteristics for ’ACTQ Family Devices Symbol Parameter VCC (V) 54ACTQ TA = −55˚C to +125˚C Units Conditions Guaranteed Limits VIH VIL VOH Minimum High 4.5 2.0 Input Voltage 5.5 2.0 Maximum Low 4.5 0.8 Input Voltage 5.5 0.8 Minimum High 4.5 4.4 Output Voltage 5.5 5.4 V VOUT = 0.1V V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V IOUT = −50 µA (Note 2) VIN = VIL or VIH VOL 4.5 3.70 5.5 4.70 Maximum Low 4.5 0.1 Output Voltage 5.5 0.1 V IOH = −24 mA V IOH = −24 mA IOUT = 50 µA (Note 2) VIN = VIL or VIH IOZT Maximum I/O 4.5 0.50 5.5 0.50 V IOL = 24 mA ± 10.0 µA IOL = 24 mA VI = VIL, VIH 5.5 5.5 ± 1.0 µA VO = VCC, GND VI = VCC, GND Leakage Current IIN Maximum Input Leakage Current ICCT Maximum ICC/Input 5.5 1.6 mA ICC Max Quiescent 5.5 160.0 µA 5.5 50 mA 50 mA 5.0 0.8 V 5.0 -0.8 V Supply Current IOLD Minimum Dynamic IOHD Output Current (Note 3) VOLP Quiet Output Maximum Dynamic VOL VOLV Quiet Output VI = VCC −2.1V VIN = VCC or GND (Note 6) VOLD = 1.65V Max VOHD = 3.85V Min (Notes 4, 5) Minimum Dynamic VOL (Notes 4, 5) Note 2: All outputs loaded; thresholds associated with output under test. Note 3: Maximum test duration 2.0 ms; one output loaded at a time. 3 www.national.com DC Electrical Characteristics for ’ACTQ Family Devices (Continued) Note 4: Maximum number of outputs that can switch simultaneously is n. (n − 1) outputs are switched LOW and one output held LOW. Note 5: Maximum number of outputs that can switch simultaneously is n. (n − 1) outputs are switched HIGH and one output held HIGH. Note 6: ICC for 54ACTQ @ 25˚C is identical to 74ACTQ @ 25˚C. AC Electrical Characteristics Symbol Parameter VCC (V) (Note 7) 54ACTQ TA = −55˚C to +125˚C CL = 50 pF Min tPLH, Propagation tPHL Delay An, Bn Units 5.0 Max 2.0 9.5 2.0 9.5 ns 2.5 11.0 ns 2.5 13.0 to Bn, An tPZH, Output Enable tPZL Time tPHZ, Output Disable tPLZ Time 5.0 5.0 1.5 9.5 1.5 9.5 Note 7: Voltage Range 5.0 is 5.0V ± 0.5V. Capacitance Symbol Typ Units CIN Input Pin Capacitance Parameter 4.5 pF CPD Power Dissipation 95 pF www.national.com 4 Conditions VCC = 5.0V VCC = 5.0V ns 5 54ACTQ16245 16-Bit Transceiver with TRI-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead CERPAK (F) NS Package Number WA48A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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