ETC WMS512K8BV-XCXE

WMS512K8BV-XXXE
HI-RELIABILITY PRODUCT
512Kx8 MONOLITHIC SRAM
FEATURES
■ BiCMOS:
■ Access Times 15, 17, 20ns
■ Revolutionary, Center Power/Ground Pinout
JEDEC Approved
• 36 lead Ceramic SOJ (Package 100)
• 36 lead Ceramic Flat Pack (Package 226)
• Radiation Tolerant with Epitaxial Layer Die
■ Commercial and Industrial Temperature Ranges
D
E
D
S
N
N
E
IS G
M
O
E
C
D
E
R
W
T
E
O
N
N R
FO
■ TTL Compatible Inputs and Outputs
■ Fully Static Operation:
■ Evolutionary, Corner Power/Ground Pinout
JEDEC Approved
• 32 pin Ceramic DIP (Package 300)
• 32 lead Ceramic SOJ (Package 101)
• 32 lead Ceramic Flat Pack (Package 220)
• No clock or refresh required.
■ Three State Output
■ Low Voltage Operation:
• 3.3V ± 10% Power Supply
REVOLUTIONARY PINOUT
A0
A1
A2
A3
A4
CS
I/O0
I/O1
VCC
GND
I/O2
I/O3
WE
A5
A6
A7
A8
A9
EVOLUTIONARY PINOUT
36 FL AT PACK
36 C S O J
32 D I P
32 CSOJ (DE)
32 FL AT PACK (FE)
TOP VIEW
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
NC
A18
A17
A16
A15
OE
I/O7
I/O6
GND
VCC
I/O5
I/O4
A14
A13
A12
A11
A10
NC
PIN
December 1999 Rev. 3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
DESCRIPTION
A0-18
Address Inputs
I/O0-7
Data Input/Output
CS
Chip Select
OE
Output Enable
WE
Write Enable
VCC
Power Supply
GND
Ground
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMS512K8BV-XXXE
ABSOLUTE
MAXIMUM
Parameter
RATINGS
TRUTH
TABLE
Symbol
Min
Max
Unit
CS
OE
WE
Mode
Data I/O
Power
Operating Temperature
TA
-40
+85
°C
Storage Temperature
TSTG
-65
+150
°C
Signal Voltage Relative to GND
VG
-0.5
4.6
V
150
°C
H
L
L
L
X
L
X
H
X
H
L
H
Standby
Read
Write
Out Disable
High Z
Data Out
Data In
High Z
Standby
Active
Active
Active
4.6
V
Junction Temperature
TJ
Supply Voltage
RECOMMENDED
Parameter
-0.5
VCC
OPERATING
CAPACITANCE
CONDITIONS
(TA=+25°C)
Symbol
Min
Max
Unit
Supply Voltage
VCC
3.0
3.6
V
Input capacitance
Input High Voltage
VIH
2.2
VCC + 0.3
V
Output capacitance
Input Low Voltage
V IL
-0.3
+0.8
V
Operating Temp.
TA
-40
+85
°C
DC
Parameter
Symbol
Condition
C IN
VIN = 0V, f = 1.0MHz
Max Unit
12
pF
COUT
VOUT = 0V, f = 1.0MHz
12
pF
This parameter is guaranteed by design but not tested.
CHARACTERISTICS
(VCC= 3.3V, GND = 0V, TA = -40°C to +85°C)
Parameter
Sym
Conditions
Min
Max
Units
Input Leakage Current
ILI
VCC = 5.5, VIN = GND to VCC
10
Output Leakage Current
I LO
CS = VIH, OE = VIH, VOUT = GND to VCC
10
µA
Operating Supply Current
I CC
CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5
120
mA
Standby Current
ISB
CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5
15
mA
Output Low Voltage
VOL
IOL = 8mA
0.4
V
Output High Voltage
VOH
IOH = -4.0mA
2.4
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
2
µA
V
WMS512K8BV-XXXE
AC
CHARACTERISTICS
(VCC = 3.3V, GND = 0V, TA = -40°C to +85°C)
Parameter
Symbol
-15
Read Cycle
Min
Read Cycle Time
t RC
Address Access Time
t AA
Output Hold from Address Change
t OH
Chip Select Access Time
tACS
-17
Max
Min
15
-20
Max
17
Min
20
15
ns
17
0
Units
Max
0
20
ns
20
ns
10
ns
0
15
ns
17
Output Enable to Output Valid
tOE
Chip Select to Output in Low Z
tCLZ1
2
2
2
Output Enable to Output in Low Z
t OLZ1
0
0
0
Chip Disable to Output in High Z
t CHZ1
7
8
10
ns
Output Disable to Output in High Z
t OHZ1
7
8
10
ns
1.
7
8
ns
ns
This parameter is guaranteed by design but not tested.
AC
CHARACTERISTICS
(VCC = 3.3V, GND = 0V, TA= -40°C to +85°C)
Parameter
Symbol
-15
Write Cycle
Min
-17
Max
Min
-20
Max
Min
Units
Max
Write Cycle Time
tWC
15
17
20
ns
Chip Select to End of Write
tCW
10
12
14
ns
Address Valid to End of Write
t AW
10
12
14
ns
Data Valid to End of Write
tDW
8
9
10
ns
Write Pulse Width
tWP
12
14
14
ns
Address Setup Time
tAS
0
0
0
ns
Address Hold Time
tAH
0
0
0
ns
Output Active from End of Write
t OW1
2
3
3
Write Enable to Output in High Z
tWHZ1
Data Hold Time
1.
8
0
t DH
ns
8
0
9
ns
0
ns
This parameter is guaranteed by design but not tested.
AC
TEST
CIRCUIT
AC TEST CONDITIONS
Parameter
I OL
Current Source
VZ
D.U.T.
≈ 1.5V
(Bipolar Supply)
C eff = 50 pf
I OH
Current Source
3
Typ
Unit
Input Pulse Levels
VIL = 0, V IH = 2.5
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 ý.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMS512K8BV-XXXE
TIMING WAVEFORM - READ CYCLE
tRC
ADDRESS
tAA
CS
tRC
tCHZ
tACS
ADDRESS
tCLZ
tAA
OE
tOE
tOLZ
tOH
DATA I/O
PREVIOUS DATA VALID
DATA I/O
DATA VALID
tOHZ
DATA VALID
HIGH IMPEDANCE
READ CYCLE 1 (CS = OE = VIL, WE = VIH)
READ CYCLE 2 (WE = VIH)
WRITE CYCLE - WE CONTROLLED
tWC
ADDRESS
tAW
tAH
tCW
CS
tAS
tWP
WE
tOW
tWHZ
tDW
DATA I/O
tDH
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
WRITE CYCLE - CS CONTROLLED
tWC
WS32K32-XHX
ADDRESS
tAS
tAW
tAH
tCW
CS
tWP
WE
tDW
DATA I/O
DATA VALID
WRITE CYCLE 2, CS CONTROLLED
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
4
tDH
WMS512K8BV-XXXE
PACKAGE 100:
36 LEAD, CERAMIC SOJ
23.37 (0.920) ± 0.25 (0.010)
4.7 (0.184) MAX
0.89 (0.035)
Radius TYP
0.2 (0.008)
± 0.05 (0.002)
11.23 (0.442)
± 0.30 (0.012)
9.55 (0.376) ± 0.25 (0.010)
1.27 (0.050) ± 0.25 (0.010)
PIN 1 IDENTIFIER
1.27 (0.050) TYP
21.6 (0.850) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 101:
32 LEAD, CERAMIC SOJ
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMS512K8BV-XXXE
PACKAGE 220:
32 LEAD, CERAMIC FLAT PACK
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 226:
36 LEAD, CERAMIC FLAT PACK
23.37 (0.920)
± 0.25 (0.010)
PIN 1
IDENTIFIER
2.72 (0.107)
MAX
12.95 (0.510)
± 0.13 (0.005)
12.7 (0.500)
± 0.5 (0.020)
5.1 (0.200)
± 0.25 (0.010)
3.8 (0.150)
TYP
0.43 (0.017)
± 0.05 (0.002)
0.127 (0.005)
± 0.05 (0.002)
32.64 (1.285) TYP
1.27 (0.050) TYP
21.59 (0.850) TYP
38.1 (1.50) ± 0.4 (0.015)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
6
WMS512K8BV-XXXE
PACKAGE 300:
32 PIN, CERAMIC DIP, SINGLE CAVITY SIDE BRAZED
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMS512K8BV-XXXE
ORDERING
INFORMATION
WMS
512K 8 B V - XXX X X E X
LEAD FINISH:
Blank = Gold plated leads
D
E
D
S
N
N
E
IS G
M
O
E
C
D
E
R
W
T
E
O
N
N R
FO
A = Solder dip leads
E = Epitaxial Layer
DEVICE GRADE:
I = Industrial
C = Commercial
-40°C to +85°C
0°C to +70°C
PACKAGE:
C = 32 Pin Ceramic .600" DIP (Package 300)
DE = 32 Lead Ceramic SOJ (Package 101) Evolutionary
DJ = 36 Lead Ceramic SOJ (Package 100)
F = 36 Lead Ceramic Flat Pack (Package 226)
FE = 32 Lead Ceramic Flat Pack (Package 220)
ACCESS TIME (ns)
Low Voltage Supply 3.3V ± 10%
BiCMOS
ORGANIZATION, 512K x 8
SRAM
MONOLITHIC
WHITE ELECTRONIC DESIGNS CORP.
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
8