Revised March 1999 74VHC125 Quad Buffer with 3-STATE Outputs General Description The VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology and achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. An input protection circuit insures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This cir- cuit prevents device destruction due to mismatched supply and input voltages. Features ■ High Speed: tPD = 3.8 ns (typ) at VCC = 5V ■ Lower power dissipation: ICC = 4 µA (max) at TA = 25°C ■ High noise immunity: VNIH = VNIL = 28% VCC (min) ■ Power down protection is provided on all inputs ■ Low noise: VOLP = 0.8V (max) Ordering Code: Order Number Package Number 74VHC125M M14A 74VHC125SJ M14D 74VHC125MTC 74VHC125N Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Logic Symbol IEEE/IEC Pin Descriptions Pin Names Function Table Description An, Bn Inputs On Outputs Inputs An Output Bn On L L L L H H H X Z H = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance X = Immaterial © 1999 Fairchild Semiconductor Corporation DS011632.prf www.fairchildsemi.com 74VHC125 Quad Buffer with 3-STATE Outputs August 1993 74VHC125 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) −0.5V to +7.0V DC Input Voltage (VIN) −0.5V to +7.0V Recommended Operating Conditions (Note 2) 2.0V to +5.5V Supply Voltage (VCC) −0.5V to VCC + 0.5V DC Output Voltage (VOUT) 0V to +5.5V Input Voltage (VIN) Input Diode Current (IIK) −20 mA Output Voltage (VOUT) Output Diode Current (IOK) ±20 mA Operating Temperature (TOPR) DC Output Current (IOUT ) ±25 mA Input Rise and Fall Time (tr, tf) DC VCC/GND Current (ICC) ±50 mA VCC = 3.3V ± 0.3V 0 ∼ 100 ns/V −65°C to +150°C VCC = 5.0V ± 0.5V 0 ∼ 20 ns/V Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 0V to VCC −40°C to +85°C Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. 260°C Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH Parameter HIGH Level Input Voltage VIL LOW Level Input Voltage VOH VOL IOZ VCC (V) TA = 25°C Min TA = −40°C to +85°C Typ Max Min 2.0 1.50 1.50 3.0 − 5.5 0.7 VCC 0.7 VCC Max 2.0 0.50 0.50 0.3 VCC 0.3 VCC 2.0 1.9 2.0 1.9 Voltage 3.0 2.9 3.0 2.9 4.5 4.4 4.5 4.4 3.0 2.58 2.48 4.5 3.94 3.80 V VIN = VIH IOH = −50 µA V 2.0 0.0 0.1 0.1 Voltage 3.0 0.0 0.1 0.1 4.5 0.0 0.1 0.1 Input Leakage IOH = −4 mA IOH = −8 mA VIN = VIH IOL = 50 µA V or VIL IOL = 4 mA 3.0 0.36 0.44 4.5 0.36 0.44 5.5 ±0.25 ±2.5 µA 0 − 5.5 ±0.1 ±1.0 µA VIN = 5.5V or GND 5.5 4.0 40.0 µA VIN = VCC or GND V IOL = 8 mA VIN = VIH or VIL VOUT = VCC or GND Off-State Current IIN or VIL V LOW Level Output 3-STATE Output Conditions V 3.0 − 5.5 HIGH Level Output Units Current ICC Quiescent Supply Current Noise Characteristics Symbol Parameter VOLP Quiet Output Maximum (Note 3) Dynamic VOL VOLV Quiet Output Minimum (Note 3) Dynamic VOL VIHD Minimum HIGH Level (Note 3) Dynamic Input Voltage VILD Maximum HIGH Level (Note 3) Dynamic Input Voltage TA = 25°C VCC (V) Typ Limits 5.0 0.5 0.8 V CL = 50 pF 5.0 −0.5 −0.8 V CL = 50 pF 5.0 3.5 V CL = 50 pF 5.0 1.5 V CL = 50 pF Note 3: Parameter guaranteed by design. www.fairchildsemi.com 2 Units Conditions Symbol Parameter tPLH Propagation Delay tPHL Time tPZL 3-STATE Output tPZH Enable Time VCC (V) TA = 25°C TA = −40°C to +85°C Typ Max Min Max 5.6 8.0 1.0 9.5 8.1 11.5 1.0 13.0 5.0 ± 0.5 3.8 5.5 1.0 6.5 5.3 7.5 1.0 8.5 3.3 ± 0.3 5.4 8.0 1.0 9.5 7.9 11.5 1.0 13.0 5.0 ± 0.5 3.6 5.1 1.0 6.0 5.1 7.1 1.0 8.0 3.3 ± 0.3 9.5 13.2 1.0 15.0 6.1 8.8 1.0 10.0 3.3 ± 0.3 Min tPLZ 3-STATE Output tPHZ Disable Time 5.0 ± 0.5 tOSLH Output to Output Skew 3.3 ± 0.3 1.5 1.5 5.0 ± 0.5 1.0 1.0 10 10 tOSHL Units Conditions CL = 15 pF ns CL = 50 pF CL = 15 pF ns ns CL = 50 pF RL = 1 kΩ CL = 15 pF CL = 50 pF CL = 15 pF ns ns ns CL = 50 pF RL = 1 kΩ CL = 50 pF CL = 50 pF (Note 4) CL = 50 pF CL = 50 pF CIN Input Capacitance 4 pF VCC = Open COUT Output Capacitance 6 pF VCC = 5.0V CPD Power Dissipation 14 pF (Note 5) Capacitance Note 4: Parameter guaranteed by design. tOSLH = |tPLHmax − t PLHmin|; tOSHL = |tPHLmax − tPHLmin|. Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (OPR.) = CPD * VCC * fIN + ICC/4 (per bit). 3 www.fairchildsemi.com 74VHC125 AC Electrical Characteristics 74VHC125 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D www.fairchildsemi.com 4 74VHC125 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 5 www.fairchildsemi.com 74VHC125 Quad Buffer with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.