APPLICATION BULLETIN ® Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Tel: (602) 746-1111 • Twx: 910-952-111 • Telex: 066-6491 • FAX (602) 889-1510 • Immediate Product Info: (800) 548-6132 VIDEO OPERATIONAL AMPLIFIER By Klaus Lehmann, Burr-Brown International GmbH CURRENT OR VOLTAGE FEEDBACK? THAT’S THE QUESTION HERE. In analog technology, important advances are being made in video operational amplifiers, both in processing and in circuitry. The complementary bipolar processes used by “Bell Laboratories” should be emphasized, which have vertically structured and approximately equal electric NPN and PNP transistors on one substrate. These processes help to create the basis for an effective complementary-symmetric circuit technique, which is currently obtaining its best results with the so-called “Diamond” structure. This structure plays a key role in transimpedance or current-feedback amplifiers. The following article is concerned exclusively with explaining these key topics and the new circuit designs. R C 1 +VIN TA ∞ 2 B 7 R2 3 VOUT R23 FIGURE 2. OPA as Series Connection between TA and B. The following discussion will deal first with practical circuits and then with theoretical models. It is based on publications [5] and [6], and essays [15] and [16], written at the Institute for Semiconductor Technology of the Darmstadt Technical College, with the assistance of Diplom Engineer R.B. Steck. VCC I +VIN VOUT CONVENTIONAL CIRCUIT TECHNIQUES Figure 1 illustrates the conventional structure of a feedback amplifier, including the wide-band operational amplifier OPA discussed here. As can be seen in Figure 2, this kind of OPA consists of a differential amplifier TA with highimpedance output (7) and an impedance converter B inserted afterwards. The elements R and C function between them, determining, among other things, the open-loop gain GOL, slew rate, and bandwidth f–3dB. The circuit techniques of B are not discussed here, but it could have a structure such as the push-pull one shown in Figure 3. I VEE FIGURE 3. Buffer with Push-pull Structure. Figure 4 illustrates what is probably the simplest and most well-known structure of the differential amplifier TA. It can be seen in Figure 4 that the capacitor C can be charged with 2 R2 OPA –SRMAX = I/C I C 1 VIN +SRMAX = I/C VCC +VIN 3 1 1 7 2 VOUT B R23 2 3 VOUT R2 R23 2I VEE FIGURE 1. Voltage-Feedback Operational Amplifier. © 1993 Burr-Brown Corporation FIGURE 4. Conventional Structure of a Differential Amplifier. AB-179 Printed in U.S.A. May, 1993 bias current I for rising and falling signals. The following equations result from the positive slew rate SR + max. or negative rate SR – max: SR + max = ∆V I = ∆t C V s SR – max = ∆V I = ∆t C V s current-feedback amplifier. Differing input impedances can result in adverse performance under certain conditions, but these are not discussed here. The structure’s slew rate performance shown in Figure 7 is worth noting. In theory, the transfer current of C is not limited for a rising signal. In practice, however, a current limitation appears at 10-20-fold bias current, dependent upon the dimensioning in the current mirror D1/Tr.4. [] [] For sinusiodal signals, the largest signal change occurs at the zero point. The following equation results: VCC (√ )( ) 2 2π f–3dB = SRmax VpO +SRMAX = I/C D1 –SRMAX = I/C 4 ˆ [Hz]; VpO =ˆ V C B 7 Because SR + max. ≠ SR – max, a asymmetric limited frequency response results during large signal modulation. The cascaded circuit varitations also have current-limited modulation behavior as shown in Figure 5. +VIN 1 1 2 R23 2 VOUT R2 2I VCC –SRMAX = I/C 3 FIGURE 6. Differential Amplifier with Signal Current Mirror. VCONST. 7 1 1 2 +SRMAX ≈ 10I/C VCC C +VIN I VEE +SRMAX = I/C 2I 3 B 4 I R23 2 –SRMAX = I/C D1 C 3 B 7 VOUT R2 1 2I I +VIN VEE 1 5 3 VOUT I FIGURE 5. Cascaded Differential Amplifier. R23 2 I R2 VEE CURRENT FEEDBACK CONCEPT FIGURE 7. The Current-Feedback Concept. The introduction of the signal current mirror diode D1/ Transistor Tr.4, as shown in Figure 6, does not yet result in improvement of the SR behavior, but will prove to be useful later on. VBE is compensated by Tr.1 according to the differential amplifier principle with transistor Tr.2. The VBE compensation of Tr.1 is illustrated in Figure 7, along with the previously inserted complementary emitter follower Tr.5. The feedback loop can now be directly connected to the emitter of Tr.1. The adaptors 1 and 2 are still the inputs of the differential amplifier. Its impedance has now been changed. DIAMOND STRUCTURE Asymmetric SR performance is caused by the asymmetric circuit structure. A complementary-symmetric structure, as shown in Figure 8, attains symmetric SR values at least 10 times higher than those of conventional structures with the same quiescent current. The analogies to CMOS technology are worth noting. Parameters such as frequency response, modulation capability, and distortion can be attained with drastically reduced quiescent current. This advantage plays an important role in portable devices, simplifies power supply equipment, and reduces inhouse heating, especially with respect to the development of increasingly small devices. The circuit shown in Figure 8 without B, R2, and R23, is called a Diamond 1 = high impedance 2 = low impedance The conventional voltage feedback has now become current feedback. This structure is designated a transimpedance or 2 circuit, and is typical for a current-feedback amplifier. Processes such as correct transmission of coded color television signals require low phase delays dependent upon the signal modulation. Such phase delays can arise in circuits such as the one shown in Figure 7 through the voltage-dependent collector substrate capacity of the Tr.4. The circuit in Figure 10, for example, delivers the following as voltage feedback: In the circuit shown in Figure 8, the varicap of the Tr.4 is largely compensated through the varicap of the complementary Tr.8. The advantages of the current-feedback concepts, however, are counterbalanced by several disadvantages. Another problem is the size of the input voltage offset. ±1mV is typical in circuits with voltage-feedback differential amplifiers (Figure 6). Current-feedback circuits like the ones shown in Figures 7 and 8 are typical at ±50mV. Currently, there is no better serial “matching” between NPN and PNP transistors. Various suggestions have attained small offset voltages with circuit variations, but these resulted in poorer transmission characteristics. Differing early voltages in NPN and PNP transistors cause different mirroring in D1/ Tr.4 and D2/Tr.8 and thus bring about an output bias current at point 7. This effect is a general weakness of the Diamond structure. GC100kHz = –32dB; GOL100kHz = +52dB As current feedback, it delivers: GC100kHz = +5dB; GOL100kHz = +58dB Generally stated, applications do exist in which two highimpedance differential inputs are necessary. Poorer common-mode gain is a direct result of the unequal inputs. VCC +SRMAX ≈ 10I/C D1 –SRMAX ≈ 10I/C 4 I C 1 1 5 VOLTAGE FEEDBACK WITH THE DIAMOND STRUCTURE B 7 R23 2 In order to make the best of the advantages of both ideas, it now makes sense to combine the Diamond structure and voltage feedback together in one structure. The current feedback shown in Figure 8 can be transferred to voltage feedback illustrated in Figure 9 by inserting the buffer B2. The desired combination would be attainable with a buffer which was “ideal” in respect to its amplitude and phase behavior. The amplitude behavior of the buffer shown in Figure 3 (with real current source I) reaches this condition with f–3dB ≈ 3.0 GHz (I = 1.9 mA). The phase delay continues to be damaged inside the control loop through the lengthening of the signal delay time by approximately TDB2 ≈ 25ps. The principle illustrated in Figure 9 is shown in more detail in Figure 10. The contrasting results of PSPICE simulations 3 6 VOUT +VIN R2 7 8 I D2 VEE FIGURE 8. Current-Feedback Amplifier with Diamond Structure. VCC +SRMAX ≈ 10I/C D1 –SRMAX ≈ 10I/C 4 I C 1 +VIN 1 5 R89 9 8 6 B1 7 B2 R23 2 VOUT R2 7 8 I D2 VEE FIGURE 9. Voltage-Feedback Amplifier with Diamond Structure. 3 3 conducted with current and voltage feedback are summarized in Figure 11. All simulations were carried out with fully equipped current sources. To give the user an overview, the f–3dB frequencies are illustrated in Figure 12 dependent upon the closed-loop gain for both feedback types. The relatively low frequency response differences shown here do not concur with the assertions in many publications about current-feedback amplifiers. This discrepancy can be explained by the fact that these articles place an unrealistic emphasis on the ability of the current-feedback concept— they maintain that this concept alone brought about the improved bandwidth. Improved technology and the Diamond structure play a more decisive role than the currentfeedback concept. The first section of this article deals with the basics of current and voltage-feedback video operational amplifiers and their corresponding circuits. These practically oriented considerations are then followed by extensive theoretical analysis. The point of departure for the following models is the performance of Diamond structure with open loop gain GOL+ as shown in Figures 8 and 10. The measurement circuit shown in Figure 13 is used for analysis. The results are presented in Figure 14. The curves follow a simple model up to f ≈ 300 MHz, formed by the parameters gm, R2, R, and C. Simple modelling of the amplitude response with R and C is not enough to describe the phase delay. Through a row of additional, partially very small RC parts inside the control loop, more phase delays result than would occur alone with Buffer B2 VCC I I I R89 1 +VIN 8 2 9 7 3 VOUT I I I VEE R2 R23 FIGURE 10. Developed Voltage-Feedback Amplifier. Amplification (+GLC) 40 f–3dB 1.0 vf 20 (GHz) 0.8 cf cf vf vf vf 0 –20 –40 10 30 100 300M 1.0G 3.0G cf 0.6 0.4 –CGL 16 (dB) 24 18 12 8 4 0.2 2 2 4 6 6 12 18 24 8 16 +CGL (dB) FIGURE 12. Bandwidth with Current and Voltage Feedback. 10G Frequency (Hz) FIGURE 11. Closed Gain Progress with Current and Voltage Feedback. 4 R and C. An additional phase delay with variation of the amplitude response is attained through insertion of the delay time TD. The following equation applies to the delay time of a RC part: to form the new current source gm’ (Figure 16). The voltage-feedback shown in Figure 16 varies from the currentfeedback model (Figure 17) only in the use (or non-use) of the buffer in the feedback loop. T = [arc tg (ωRC)]/ω. For a better overview, the output conditions, various equations, and optimal operating conditions are summarized in Table I. The derivations are described in detail [5]. As already mentioned, if ωRC remains sufficiently small, it will be T ≈ RC. All of these small time constants are summarized in the following model to the total delay time TD. To be able to imagine this concretely, it is important to remember that small time constants always turn the phase, but do not necessarily damage the amplitude response considered here. R C TD 3 –1 7 VOUT R23 VIN R C +VIN 1 2 C2 TA B 7 1 gm 3 2 gm R2 R89 VOUT 8 9 R23 R2 1F FIGURE 15. Model of a Differential Amplifier Type. 10kΩ gm = 2I/VT gm’ = 1/(R2 – 1/gm) G+OL = VOUT/V+IN = gm’ + R FIGURE 13. Circuitry for Adjustment of G+OL. R C TD –1 7 60 Amplification (+GLC) 40 0.01 10 30 100 +VIN 1 3 VOUT R23 g'm +1 2 300 20 R2 R89 0 FIGURE 16. Model of the Voltage Feedback. –20 –40 100 1M 10M 100M 1.0G 10G Frequency (Hz) R FIGURE 14. Open-Loop Frequency Response. +VIN 1 TD –1 7 DELAY TIME MODEL The circuits with voltage feedback as shown in Figures 4, 5, 6, and 9 are described with the model shown in Figure 15. The signal inversion of the current mirror in Figures 6 and 9 is viewed in the output buffer with G = –1. The delay time TD is inserted here. The dependence of the transconductance gm on the quiescent current I varies according to circuit structure. In the case shown in Figure 4, for example, gm = I/2VΤ , while in the more interesting Figures 8 and 9, gm = 2I/VΤ. In the next formal step, the two controlled current sources gm and the resistor R89 (see Figure 15) are combined C 3 VOUT R23 gm' 2 R2 FIGURE 17. Model of the Current Feedback. 5 OPTIMAL FREQUENCY RESPONSE ADJUSTMENT DIFFERENCES BETWEEN CURRENT AND VOLTAGE FEEDBACK The equation for calculation of |AN| and the graphic values in Figure 18 describe the various operating conditions of the four amplifier variations. Normally, the optimal adjustment is installed. This has the following conditions: GCLMAX is reached for R89 → 0 or R2 || R23 → 0, which is practically unattainable with current feedback. Current feedback usually obtains lower values for GCLMAX with otherwise comparable parameters. GOL0 is dependent upon GCLO. Amplifiers with adjustable GCLO, such as those for gain control, simultaneously require correction of GOLO. Figure 19 shows the frequency response differences between current and voltage feedback according to the delay time model. In the case of voltage feedback, a change in R2 means a change in R89 as well. With current feedback, the gains GCLO and GOLO are simultaneously adjusted to one another during changes in R2, which can be an important advantage. Feedback buffers (GCL+O = +1) have no inverting input. While the disadvantage of the low impedance inverting input of the current-feedback concept is not significant, here the low circuit expenditure and quiescent current are important advantages. C/gm = 2 kO TD Internally compensated amplifiers use an integrated compensation capacitor C corresponding to the already mentioned condition for the poorest case i.e. the smallest closed loop gain, for example kO = 1. This method is not well-suited to the wide-band amplifiers discussed here. The slew rate and large-signal frequency response are significantly reduced through the compensation capacitor. From this adjustment, deviating, i.e. larger, closed-loop gain leads to reduced frequency response. Amplifiers adjustable externally with C allow optimal adjustment with kO, but do not significantly improve large-signal performance. Optimal adjustment with gm avoids these disadvantages. One possible compromise is to insert amplifiers compensated internally over gm for various closed-loop gain ranges (e.g. GCL = 1-3, 3-10, 10-30). Making the open-loop gain GOL externally adjustable over gm for optimal frequency response is the most effective solution. This can be adjusted with R89 using voltage feedback and with R2/R236 using current feedback. 30 Amplification (+GLC) 20 30 Amplitude Response \AN\ 20 0 R89 11.2 0.01 5.9 –4 25.6 –2 47.13 –1 74 21.5 74 –10 –30 10M 0 R89 |AN|opt. 12dB/Okt. –10 –20 30M 100M 300M 3.0G 30M 100M 300M 1.0G 3.0G 10G FIGURE 19. Model Frequency Response with Current and Voltage Feedback. 470 1.0G 780MHz 640MHz Frequency (Hz) 48 53 70 163 with internal C-compensation 5dB/Okt. f–3dB f–3dB 45.1 –20 10 –30 10M 10 R2||R23 –12 10G Frequency (Hz) FIGURE 18. Adjustment of the Frequency Response. DIMENSIONING Inside the optimal adjustment range, the four amplifier variations have a bandwidth f–3dB, which is dependent only upon the additional delay time TD. The bandwidth corresponds to the model and is independent of the closed-loop gain GCL (Figure 19). The deviations of the model frequency response (Figure 19) from the simulated frequency response (Figure 11) result from simplified modelling (see Figure 14). This performance is not limited to the current feedback and has become practically visible through technological advances. The first priority goes to achieving the shortest possible delay time TD inside the control loop. The second priority goes to small capacity C due to high slew rate and wide large-signal frequency response, as well as higher, if possible closed-loop gain GCLMAX. 6 FEEDBACK MODE VOLTAGE FEEDBACK OPERATION MODE NON-INVERTING CURRENT FEEDBACK INVERTING NON-INVERTING INVERTING MODEL CIRCUITRY R C R TD 3 –1 7 C R TD VOUT 3 –1 7 C R TD VOUT 7 –1 3 R23 gm' 1 R23 gm' 1 2 +1 R2 R23 gm' 1 –1 R23 2 R2 R2 R2 –VIN –VIN CLOSED-LOOP GAIN DC + GCLO = 1 / k 0+ = 1 + R 23 / R 2 + GCL CLOSED-LOOP GAIN AC OPEN-LOOP GAIN DC & AC TRANSCONDUCTANCE = VOUT / + GCLO = 1 / k 0+ = 1 + R 23 / R 2 – GCLO = 1 / k 0– = 1 + R 23 / R 2 + V IN = VOUT / – GCL + GCL – V IN g m = 2 I / V T ; T C = C / g′m OPERATING TRANSCONDUCTANCE g′m = 1 / (R89 + 2 / g′m ) AGREEMENTS + + + – V IN = V IN ; GCL = GCL ; GCLO = GCLO = GCLO + 1; k 0 = k 0+ = k 0– / (k 0– + 1) OUTPUT EQUATIONS (V IN – V 2 ) / V 7 = jωC / g′m ; V 2 = k 0 ⋅ VOUT ; VOUT = V 7 ⋅ exp(– jωT D ) CLOSED-LOOP GAIN COMPLEX GCL = [k 0 – ωT C ⋅ sin(ωT D ) + jωT C ⋅ cos(ωT D )]–1/2 CLOSED-LOOP GAIN (Amount) GCL = [k 20 + (ωT C )2 – 2k 0ωT C ⋅ sin(ωT D )]–1/2 APPROXIMATION sin(ωT D ) ≈ ωT D – (ωT D )3 / 6 AMOUNT OF NORMALIZED CLOSED-LOOP GAIN GCL = [k 20 + T C (T C – 2k 0 T D )ω 2 + k 0 T CT3D ⋅ ω 4 / 3]–1/2 AN = GCL GCLO T T T3 = 1 + C2 (T C – 2k 0 T D )ω 2 + C D ω 4 k0 3k 0 AMOUNT OF OPTIMIZED CLOSED-LOOP GAIN GCL OPT = [k 20 + k 0 T CT3D ⋅ ω 4 / 3]–1/2 AMOUNT OF NORMALIZED OPTIMIZED CLOSED-LOOP GAIN A N OPT = GCL OPT GCLO C / g′m 3 4 = 1 + T Dω 3k 0 –1/2 2 4 = 1 + T D ⋅ ω4 3 –1/2 I; R; C; TD R89 BLOCK DIAGRAM R89 8 +VIN 8 1 VFA 2 R2 R23 + G OL0 = G CL0 RC 2TD +VIN 1 VOUT 9 VOUT 9 3 VFA 2 –VIN R2 3 1 RC 2T D 2 R89 R89 2T 2T ≈ + D GCLO ⋅ C R89 ≈ CLO R89 MAX ATTAINABLE OPTIMIZED CLOSED-LOOP GAIN + GCLO max = CLO 2I ⋅ T D VT ⋅ C CLO 2T 2T D + 1)C – (GCLO – GCLO max = 2I ⋅ T D –1 VT ⋅ C f–3dB = 0.176/TD TABLE I. Summary of the Basis and Result of the Delay Time Model. 7 3 R23 + G OL0 = G CL0 D 2T D V = – T – (GCLO + 1)C I 1 VOUT CFA R2 R23 – G OL0 = (G CL0 + 1) 2T V = + D – T GCLO ⋅ C I METHOD OF APPROXIMATION FOR GCLO ➞ 1 BANDWIDTH OF THE OPTIMIZED RESPONSE –1/2 GCLO GCLO C = 2 g′m 4πf ⋅ GOL T C – 2k 0 T D = 0; T D = ADJUSTMENT FOR OPTIMAL FREQUENCY RESPONSE – – GCL = VOUT / V IN g′m = 1 / (R 2 / / R 23 + 1 / g m ) CONDITIONS FOR OPTIMIZED FREQUENCY RESPONSE OPEN-LOOP GAIN DC FOR OPTIMIZED FREQUENCY RESPONSE = VOUT / – GCLO = 1 / k 0– = 1 + R 23 / R 2 + V IN – GOL0 = g′m ⋅ R; GOL = g′m / ωC | f > 1MHz ABBREVIATIONS AMPLIFIER CHARACTERISTIC VALUES VOUT 3 gm' 1 2 2 +1 TD VOUT 7 +VIN +VIN C RC 2T D 2 –VIN R2 R 23 ≈ 2T D C C + GCLO max = 4I ⋅ T D VT ⋅ C 3 R23 – G OL0 = (G CL0 + 1) RC 2T D D D VT 2T D + R 23 = – GCLO C 2I VOUT CFA 2T D V – – (GCLO + 1) T C 2I C 2I 2T 2T D R 23 ≈ C C 4 4I ⋅ T D – –1 GCLO max = VT ⋅ C R 23 = LITERATURE [1] Friedrich, H.; Elektronik 87,vol. 26 Das Zauberwort heißt Transimpedanz-Verstärker (The Magic Word is Transimpedance Amplifiers) [9] Nelson, D.; US-Patent, No. 4 502 020; Feb. 26, ’85 [10] Nelson, D.; US-Patent, No. 4 628 279, Dec. 9, ’86 [11] Nelson, D.; US-Patent, No. 4 713 628; Dec. 15, ’87 [2] Goodenough, F.; Electronic Design 87, April 16, pp. 59… [12] Palmer, W.; Electronics 88, Jan. 7,pp. 151… Transimpedance amps: fast yet accurate [3] Goodenough, F.; Electronic Design 87, Oct. 29, pp. 67… Exotic ICs put 200MHz signals, 15ns settling in everyday jobs [13] Saller, K.; US-Patent, No. 4 639 685, Jan. 27, ’87 [4] Goodenough, F.; Electronic Design 88, vol. 2, pp. 29… A slew of new high performance op amps shatters speed limits [14] Shattock, R.; Electronic Engineering 86, Mar., pp. 59… A novel design approach to high frequency op amps [5] Lehmann, K.; Elektronik 80, vol. 24, pp. 101… Berechnung des Frequenzganges von VideoOperationsverstärkern (Calculation of the Frequency Response of Video Operational Amplifiers) [15] Schwehr, S.; Sibrai, A.; Studienarbeit p. 48, TH Darmstadt 88, Inst. f. Halbleitertechnik Entwurf und Layouterstellung eines Video-Operationsverstärkers in komplementärer Bipolartechnologie. (Design and Layout of a Video Operational Amplifier in Complementary Bipolar Technology) [6] Lehmann, K.; Elektronik 80, vol. 26, pp. 81… Schaltungstechnik von Video Operationsverstärkern (Circuit Techniques with Video Operational Amplifiers) [16] Sibrai, A.; Diplomarbeit D56, TH-Darmstadt 1/89, Inst. f. Halbleitertechnik Makromodellierung von Video-Operationsverstärkern in komplementärer Bipolartechnologie (Macro Model of Video Operational Amplifiers in Complementary Bipolar Techonolgy) [7] Moser, K.D.; eee-Bauelemente 87,vol. 23, pp. 22… Neuartige Operationsverstärker (New Kinds of Operational Amplifiers) [17] Yee, S.; US-Patent, No. 3 418; Dec. 24, ’68 [8] Nelson, D.; US-Patent, No. 4 358 739, Nov. 9,’82 8

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