ETC AT27LV520-70XC

Features
• 8-bit Multiplexed Addresses/Outputs
• Fast Read Access Time – 70 ns
• Dual Voltage Range Operation
•
•
•
•
•
•
•
•
– Low-voltage Power Supply Range, 3.0V to 3.6V, or
– Standard 5V ± 10% Supply Range
Pin Compatible with Standard AT27C520
Low-power CMOS Operation
– 20 µA max. Standby for ALE = VIH and VCC = 3.6V
– 29 mW max. Active at 5 MHz for VCC = 3.6V
JEDEC Standard Packages
– 20-lead TSSOP
– 20-lead SOIC
High-reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latch-up Immunity
Rapid™ Programming Algorithm – 50 µs/Byte (Typical)
CMOS- and TTL-compatible Inputs and Outputs
– JEDEC Standard for LVTTL
Integrated Product Identification Code
Commercial and Industrial Temperature Range
512K (64K x 8)
Multiplexed
Addresses/
Outputs
Low-voltage
OTP EPROM
Description
The AT27LV520 is a low-power, high-performance, 524,288-bit one-time programmable read-only memory (OTP EPROM) organized 64K by eight bits. It incorporates
latches for the eight lower order address bits to multiplex with the eight data bits. This
minimizes system chip count, reduces cost, and simplifies the design of multiplexed
bus systems. It requires only one power supply in the range of 3.0V to 3.6V for normal
read mode operation, making it ideal for fast, portable systems using battery power.
Any byte can be accessed in less than 70 ns.
The AT27LV520 is available in 173 mil, 20-lead TSSOP and 300 mil, 20-lead SOIC,
one-time programmable (OTP) plastic packages.
(continued)
AT27LV520
Pin Configurations
Pin Name
Function
A8 - A15
Addresses
AD0 - AD7
Addresses/Outputs
OE /VPP
Output Enable/Program Supply
ALE
Address Latch Enable
TSSOP Top View
A10
A12
A14
ALE
VCC
OE/VPP
A15
A13
A11
A9
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A8
AD1
AD3
AD5
AD7
GND
AD6
AD4
AD2
AD0
SOIC Top View
OE/VPP
A15
A13
A11
A9
AD0
AD2
AD4
AD6
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
ALE
A14
A12
A10
A8
AD1
AD3
AD5
AD7
Rev. 0911D–05/00
1
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Atmel’s innovative design techniques provide fast speeds
that rival 5V parts while keeping the low power consumption of a 3.3V supply. At V CC = 3.0V, any byte can be
accessed in less than 70 ns. With a typical power dissipation of only 18 mW at 5 MHz and V C C = 3.3V, the
AT27LV520 consumes less than one fifth the power of a
standard 5V EPROM. Standby mode is achieved by asserting ALE high. Standby mode supply current is typically less
than 1 µA at 3.3V.
The AT27LV520 operating with VCC at 3.0V produces TTL
level outputs that are compatible with standard TTL logic
devices operating at VCC = 5.0V. The device is also capable of standard 5-volt operation making it ideally suited for
dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27LV520 has additional features to ensure high
quality and efficient production use. The Rapid™ Programming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programing
time is typically only 50 µs/byte. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages. The AT27LV520 programs exactly
the same way as a standard 5V AT27C520 and uses the
same programming equipment.
System Considerations
Switching under active conditions may produce transient
voltage excursions. Unless accommodated by the system
design, these transients may exceed data sheet limits,
resulting in device non-conformance. At a minimum, a
0.1 µF high frequency, low inherent inductance, ceramic
capacitor should be utilized for each device. This capacitor
should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed
circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected
between the V CC and Ground terminals. This capacitor
should be positioned as close as possible to the point
where the power supply is connected to the array.
Block Diagram
VCC
GND
8
OE, ALE, AND
PROGRAM LOGIC
LATCHES
OE/VPP
ALE
AD7 - AD0
A15 - A8
8
OUTPUT
BUFFERS
Y DECODER
Y-GATING
X DECODER
CELL MATRIX
IDENTIFICATION
2
AT27LV520
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AT27LV520
Absolute Maximum Ratings*
Temperature under Bias ................................ -55°C to +125°C
*NOTICE:
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V(1)
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
Note:
1.
Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
VCC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.
Operating Modes
Mode/Pin
Read
(2)
Output Disable(2)
Standby
Address Latch Enable
(2)
(3)
Rapid Program
(4)
Product Identification
Notes:
ALE
OE/VPP
A8 - A15
AD0 - AD7
VIL
VIL
Ai
DOUT
VIL/VIH
VIH
X(1)
High Z/A0 - A7
VIH
VIH
Ai
A0 - A7
VIH
VIH
X
A0 - A7
VIH
VPP
Ai
DIN
VIL
A9 = VH(5)
A8 = VIH or VIL
A10 - A15 = VIL
Identification Code
VIL
1. X can be VIL or VIH.
2. Read, output disable, and standby modes require 3.0V ≤ VCC ≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V.
3. Refer to Programming Characteristics.
4. VH = 12.0 ± 0.5V.
5. Two identifier bytes may be selected. All A8 - A15 inputs are held low (VIL), except A9 which is set to VH and A8 which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
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DC and AC Operating Conditions for Read Operation
AT27LV520-70
AT27LV520-90
0°C - 70°C
0°C - 70°C
-40°C - +85°C
-40°C - +85°C
3.0V to 3.6V
3.0V to 3.6V
5V ±=10%
5V ±=10%
Com.
Operating Temp. (Case)
Ind.
VCC Supply
DC and Operating Characteristics for Read Operation
Symbol
Parameter
Condition
Min
Max
Units
VCC = 3.0V to 3.6V
Input Load Current
VIN = 0V to VCC
±1
µA
Output Leakage Current
VOUT = 0V to VCC
±5
µA
VCC Standby Current
ALE = VCC ± 0.3V; Ai, ADi = GND/VCC ± 0.3V
20
µA
ICC
VCC Active Current
f = 5 MHz, IOUT = 0 mA, ALE = VIL
8
mA
VIL
Input Low Voltage
-0.6
0.8
V
VIH
Input High Voltage
2.0
VCC + 0.5
V
VOL
Output Low Voltage
IOL = 2.0 mA
0.4
V
VOH
Output High Voltage
IOH = -2.0 mA
ILI
ILO
ISB
(1)
2.4
V
VCC = 4.5V to 5.5V
Input Load Current
VIN = 0V to VCC
±1
µA
Output Leakage Current
VOUT = 0V to VCC
±5
µA
VCC Standby Current
ALE = VCC ± 0.3V; Ai, ADi = GND/VCC ± 0.3V
100
µA
ICC
VCC Active Current
f = 5 MHz, IOUT = 0 mA, ALE = VIL
20
mA
VIL
Input Low Voltage
-0.6
0.8
V
VIH
Input High Voltage
2.0
VCC + 0.5
V
VOL
Output Low Voltage
IOL = 2.1 mA
0.4
V
VOH
Output High Voltage
IOH = -400 µA
ILI
ILO
ISB
(1)
Note:
4
1. VCC standby current will be slightly higher with ALE, Ai, and ADi at TTL levels.
AT27LV520
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2.4
AT27LV520
AC Characteristics for Read Operation
VCC = 3.0V to 3.6V and 4.5V to 5.5V
Symbol
AT27LV520-70
AT27LV520-90
Min
Min
Parameter
Condition
Address to Output Delay
ALE = OE/VPP = VIL
tCE
Address Latch Enable Low to Output Delay
Address Valid
tAS
Address Setup Time
OE/VPP = VIH
12
15
ns
tAH
Address Hold Time
OE/VPP = VIH
12
15
ns
tALE
Address Latch Enable Width
OE/VPP = VIH
40
45
ns
tOE(3)
OE/VPP to Output Delay
ALE = VIL
30
35
ns
tDF(4)(5)
OE/VPP High to Output Float
ALE = VIL
25
25
ns
tOH
Output Hold from Address or OE/VPP,
whichever occurred first
ALE = VIL
Note:
3, 4, 5 — see AC Waveforms for Read Operation
tACC
(3)
Max
Max
Units
70
90
ns
55
70
ns
7
0
ns
AC Waveforms for Read Operation(1)
tALE
ALE
tCE
OE/VPP
tDF
tAS
AD7 - AD0
tAH
ADDRESS IN
tOH
tOE
DATA OUT
tACC
A15 - A8
Notes:
1. Timing measurement reference levels for all speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL =
0.45V and VIH = 2.4V.
2. OE/VPP may be delayed up to tCE - tOE after the address is valid without impact on tCE.
3. OE/VPP may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
5
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Input Test Waveforms and
Measurement Levels
Output Test Load
tR, tF < 20 ns (10% to 90%)
Note:
CL = 100 pF including jig capacitance.
Pin Capacitance
f = 1 MHz, T = 25°C(1)
Symbol
Typ
Max
Units
Conditions
CIN
4
6
pF
VIN = 0V
COUT
8
12
pF
VOUT = 0V
Note:
6
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
AT27LV520
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AT27LV520
Programming Waveforms
PROGRAM
VCC
READ (VERIFY)
6.5V
5.0V
tVCS
13V
OE/VPP
VIH
VIL
tOES tOEH
tPRT
ALE
tVR
tLP
VIH
VIL
tALE
tALE
tPW
tOE
AD7 - AD0
VIH
VIL
A15 - A8
VIH
VIL
tLAS
tLAH
ADDR
tDS
DATA IN
tDH
tLAS
tDFP
tLAH
ADDR
DATA OUT
tAH
tAS
Notes:
ADDRESS STABLE
1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Limits
Symbol
Parameter
Test Conditions
ILI
Input Load Current
VIN = VIL, VIH
VIL
Input Low Level
VIH
Input High Level
VOL
Output Low Voltage
IOL = 2.1 mA
VOH
Output High Voltage
IOH = -400 µA
ICC2
VCC Supply Current (Program and Verify)
IPP2
OE/VPP Current
ALE = VIH
Min
Max
Units
±10
µA
-0.6
0.8
V
2.0
VCC + 1.0
V
0.4
V
2.4
V
25
mA
25
mA
7
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AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Limits
(1)
Symbol
Parameter
Test Conditions
Min
tALE
Address Latch Enable Width
500
ns
tLAS
Latched Address Setup Time
100
ns
tLAH
Latched Address Hold Time
100
ns
tLP
ALE Low to OE/VPP High Voltage Delay
2
µs
tOES
OE/VPP Setup Time
2
µs
tOEH
OE/VPP Hold Time
2
µs
tDS
Data Setup Time
2
µs
tDH
Data Hold Time
2
µs
Input Rise and Fall Times:
(10% to 90%) 20 ns
Input Pulse Levels:
0.45V to 2.4V
(2)
ALE Program Pulse Width
tPW
tVR
OE/VPP Recovery Time
tVCS
VCC Setup Time
tOE
Max
47.5
Input Timing Reference Level:
0.8V to 2.0V
Data Valid from OE/VPP
(3)
Output Timing Reference Level:
0.8V to 2.0V
52.5
Units
µs
2
µs
2
µs
150
ns
130
ns
tDFP
OE/VPP High to Output Float Delay
tAS
Address Setup Time
2
µs
tAH
Address Hold Time
0
µs
tPRT
OE/VPP Pulse Rise Time During
Programming
50
ns
Notes:
0
1. VCC must be applied simultaneously or before OE/VPP and removed simultaneously or after OE/VPP.
2. Program Pulse width tolerance is 50=µsec=±=5%.
3. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
— see timing diagram.
Atmel’s 27LV520 Integrated Product Identification Code
Pins
A8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Hex
Data
Manufacturer
0
0
0
0
1
1
1
1
0
1E
Device Type
1
1
0
0
1
1
1
0
1
9D
Codes
Note:
8
1. The AT27LV520 has the same product identification code as the AT27C520. Both are programming compatible.
AT27LV520
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AT27LV520
Rapid™ Programming Algorithm
A 50 µs ALE pulse width is used to program. The address
is set to the first location. VCC is raised to 6.5V and OE/VPP
is raised to 13.0V. Each address is first programmed with
one 50 µs ALE pulse without verification. Then a verification/reprogramming loop is executed for each address. In
the event a byte fails to pass verification, up to 10 successive 50 µs pulses are applied with a verification after each
pulse. If the byte fails to verify after 10 pulses have been
applied, the part is considered failed. After the byte verifies
properly, the next address is selected until all have been
checked. OE/VPP is then lowered to VIH and VCC to 5.0V. All
bytes are read again and compared with the original data to
determine if the device passes or fails.
START
ADDR = FIRST LOCATION
VCC = 6.5V
VPP = 13.0V
PROGRAM ONE 50 µS PULSE
INCREMENT ADDRESS
NO
LAST
ADDR.?
YES
ADDR = FIRST LOCATION
INCREMENT ADDRESS
X=0
NO
LAST
ADDR.?
PASS
VERIFY
BYTE
FAIL
INCREMENT X
YES
PROGRAM ONE 50 µS PULSE
X = 10?
YES
VCC = 5.0V
VPP = 5.0V
COMPARE
ALL BYTES
TO ORIGINAL
DATA
NO
FAIL
DEVICE
FAILED
PASS
DEVICE
PASSED
9
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Ordering Information
tACC (ns)
ICC (mA)
Active
90
8
70
8
Ordering Code
Package
Operation Range
AT27LV520-90SC
AT27LV520-90XC
20S
20X
Commercial
(0°C to 70°C)
AT27LV520-90SI
AT27LV520-90XI
20S
20X
Industrial
(-40°C to +85°C)
AT27LV520-70SC
AT27LV520-70XC
20S
20X
Commercial
(0°C to 70°C)
AT27LV520-70SI
AT27LV520-70XI
20S
20X
Industrial
(-40°C to +85°C)
Package Type
20S
20-lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC)
20X
20-lead, 0.173" Wide, Thin Shrink Small Outline (TSSOP)
10
AT27LV520
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AT27LV520
Packaging Information
20S, 20-lead, 0.300" Wide,
Plastic Gull Wing Small Outline
Dimensions in Inches and (Millimeters)
20X, 20-lead, 0.173" Wide,
Thin Super Small Outline Package (TSSOP)
Dimensions in (Millimeters) and Inches
0.30(0.012)
0.18(0.007)
0.020 (0.508)
0.013 (0.330)
0.299 (7.60) 0.420 (10.7)
0.291 (7.39) 0.393 (9.98)
4.48(.176) 6.50(.256)
4.30(.169) 6.25(.246)
PIN 1
PIN 1 ID
.050 (1.27) BSC
0.65(.0256) BSC
0.513 (13.0)
0.497 (12.6)
0.105 (2.67)
0.092 (2.34)
6.60(.260)
6.40(.252)
0.15(.006)
0.05(.002)
0.012 (0.305)
0.003 (0.076)
0
REF
8
1.10(0.043) MAX
0.18(.007)
0.09(.003)
0.013 (0.330)
0.009 (0.229)
0.035 (0.889)
0.015 (0.381)
0 REF
8
0.70(.028)
0.50(.020)
11
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© Atmel Corporation 2000.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for
any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without
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