ETC AT78C1504

Features
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Preprogrammed for All Current DVD and CD Write Strategies
Five 10-bit DACs for Controlling a Laser Power Amplifier
Separate DVD and CD APC Provided
On-board Bandgap Reference
Timing Programmable by User
Adaptive Pulse Shift
Programmable End Pulses
Serial Interface for Programming Device
Small Die Size Enables Inclusion on OPU
DVD/CD ALPC
Description
AT78C1504 is a preprogrammed automatic device for controlling the write, read and
erase pulses to a laser diode power amplifier. All of the present DVD and CD write
strategies are provided in the device. Automatic power control (APC) and optimum
power control (OPC) are also included. Though the device is preprogrammed to provide signal conditioning of the NRZI data stream, it is possible through a serial
interface to adjust pulse timing, width and amplitude. Five DACs are provided to individually control the laser diode power amplifier. The device is particularly suited to
controlling the laser diode power amplifiers from Atmel’s RF Division. Packaging for
inclusion on the PCBA or on the optical pickup unit (OPU) is available.
AT78C1504
Figure 1. DVD System Block Diagram
DRAM
Flash
AT78C1501
ATAPI I/F
Controller
DBM
ECC
SRAM
ARM7TDMI
AT78C1502
Servo
Control
System
Power
Drivers
Sled
Focus
AT78C1503
Read
Channel
AT78C1507
Read
Channel Adj.
Spindle
Laser
AT78C1504
Laser Power
Controller
T08XX
Laser Amp
AT78C1505
Pre-amp
Rev. 2051A–DVD–07/02
1
64
SVDD3
HFON
LDON
WR
ER
OVF
SRF0
DVSS3
SRF1
DVDD3
SERINT
DTEST0
DTEST1
DTEST2
WBCLK
WDATA
WCLK
Figure 2. Pin-out
49
1
48
NDT_RD
WCLK_N
NDT_ER
WCLK_P
NDT_WR1
FSFILT
DVDD5
FSIS
DVSS5
NDT_WR2
SVDD3
NDT_WR3
SVSS3
AT78C1504
ALPC
64-lead TQFP
AVSS3
RDI
DVDD3
DVSS3
ERI
SDATA
WR1I
SDEN
AVDD3
SCLK
WR2I
MIRROR
WR3I
GAP
VREF
WEG
16
33
ERASE
READ
NRST
AVSS5
AT/SGA_OUT
MON_PD
A_IS
CDLD
CDPD
CDPD_GND
TSETR
RSETE
RSETW
32
AVDD5
RCONR
17
G_L
WRITE
REXTOTC
Table 1. DC Parameters
Symbol
Parameter
Min
Nom
Max
Units
VCC
Supply Voltage
3.0
3.3
3.6
V
VDD
Supply Voltage
4.5
5.0
5.5
V
ICC
Operating Current
300
mA
Note:
2
Notes
Note 1
1. Values listed are advance information and are likely to change as production silicon is characterized.
AT78C1504
2051A–DVD–07/02
AT78C1504
External Pin
Definition
P = Power or ground, B = Bidirectional, I = Digital Input, O = Digital Output
AI = Analog Input, AO = Analog Output
Table 1. External Pin Definition
Pin #
Symbol
Type
Pad Types
Description
1
SVDD3
P
Ana_VDD
3.3V Synthesizer Power
2
WCLK_N
AO
Ana_HighI
PECL WCLK Negative Output
3
WCLK_P
AO
Ana_HighI
PECL WCLK Positive Output
4
FSFILT
AO
Ana_HighI
Frequency Synthesizer Filter
5
FSIS
AI
Ana_HighI
Frequency Synthesizer CP Iset Resistor
6
SVDD3
P
Ana_VDD
3.3V Synthesizer Power
7
SVSS3
P
Ana_GND
3.3V Synthesizer Ground
8
AVSS3
P
Ana_GND
3.3V Analog Ground
9
RDI
AO
Ana_HighI
Read Level Current DAC Output
10
ERI
AO
Ana_HighI
Erase Level Current DAC Output
11
WR1I
AO
Ana_HighI
Write1 Level Current DAC Output
12
AVDD3
P
Ana_VDD
3.3V Analog Power
13
WR2I
AO
Ana_HighI
Write2 Level Current DAC Output
14
WR3I
AO
Ana_HighI
Write3 Level Current DAC Output
15
VREF
AO
Ana_HighI
2.5V Output Reference Voltage
16
REXTOTC
AI
Ana_HighI
External Current Setting Resistor
17
RCONR
AI
Ana_HighI
Laser Diode Constant Current Setting R
18
AVDD5
P
Ana_VDD
5V Analog Power
19
RSETW
AI
Ana_HighI
Write DACs Current Setting R
20
RSETE
AI
Ana_HighI
Erase DACs Current Setting R
21
RSETR
AI
Ana_HighI
Read DACs Current Setting R
22
CDPD_GND
AI
Ana_HighI
Ground Return for CDPD
23
CDPD
AI
Ana_HighI
CD Photo Diode Input
24
CDLD
AO
Ana_HighI
CD Laser Diode Output
25
A_IS
P
Ana
Analog Isolation – Ground
26
MON_PD
AI
Ana_HighI
Monitor Photo Diode Input
27
AT/SGA_OUT
AO
Ana_HighI
Analog Test Monitor/SGA_OUT
28
AVSS5
P
Ana_GND
5V Analog Ground
29
NRST
I
PIC
Chip Reset
30
READ
I
PIC
Read Input from Controller
31
ERASE
I
PIC
Read Input from Controller
32
WRITE
I
PIC
Read Input from Controller
33
G_L
I
PIC
Grove (High)/Land Input from Controller
34
WEG
I
PIC
Write or Erase Gate Input from Controller
3
2051A–DVD–07/02
Table 1. External Pin Definition (Continued)
4
Pin #
Symbol
Type
Pad Types
35
Description
GAP
I
PIC
Gap Input
36
MIRROR
I
PIC
Mirror Input
37
SCLK
I
PIC
Serial Interface Clock
38
SDEN
I
PIC
Serial Data Enable
39
SDATA
B
PB2C
Serial Data
40
DVSS3
P
PP0I
3.3V Digital Ground
41
DVDD3
P
PP3I
3.3V Digital Power
42
NDT_WR3
O
PO2
Laser Diode Driver Output for Write3
43
NDT_WR2
O
PO2
Laser Diode Driver Output for Write2
44
DVSS5
P
PP0E
5V Digital Ground
45
DVDD5
P
PP5E
5V Digital Power
46
NDT_WR1
O
PO2
Laser Diode Driver Output for Write1
47
NDT_ER
O
PO2
Laser Diode Driver Output for Erase
48
NDT_RD
O
PO2
Laser Diode Driver Output for Read
49
HFON
O
PO2
High Frequency Module Enable
50
LDON
O
PO2
Laser Diode Enable
51
WR
O
PO2
Write Mode Monitor Output
52
ER
O
PO2
Erase Mode Monitor Output
53
OVF
O
PO2
Overflow Interrupt to Controller
54
SRF0
O
PO2
I/V Gain Control Output to Pickup
55
SRF1
O
PO2
I/V Gain Control Output to Pickup
56
DVSS3
P
PP0I
3.3V Digital Ground
57
DVDD3
P
PP3I
3.3V Digital Power
58
SERINT
I
PIC
Servo Interrupt
59
DTEST0
O
PO2
Digital Test Output
60
DTEST1
O
PO2
Digital Test Output
61
DTEST2
O
PO2
Digital Test Output
62
WBCLK
I
PIC
Wobble Clock or Oscillator Input
63
WDATA
I
PIC
Write Data Input from Controller
64
WCLK
O
PO2
Write Channel Clock Output
AT78C1504
2051A–DVD–07/02
AT78C1504
Figure 3. AT78C1504 Block Diagram
VREF
MONPD
SGA
SGAOUT
BCB GCB
ATEST
7
COMP
FILT_ENA
8
SDATA
SCLK
4
SDEN
4
REF
DAC
NRST
CMODE
READ
HPON
LDON
WRITE
ERASE
G_L
WR
ER
PWREN
SRF1P
SRF2P
WEGO
Control
Logic
WEG
GAP
MIRROR
ALPC_INT
RCONR
INDEX
WDATA
SERVO-INT
READ
IDAC
WBCLK
RSETR
READI
RSETE
ERASE
IDAC
ERASEI
WRITEI2
RSETW
WRITE
IDAC
WRITEI1
WRITEI3
WCHCLK-T
Pulse
width
control
CDAPC
WCHCLKP-E
WCHCLKN-E
NDTRD
Synthesizer
NDTER
NDTWR1
PD780 LD780
NDTWR2
NDTWR3
5
2051A–DVD–07/02
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2051A–DVD–07/02