NSC LM4734

LM4734
3 Channel 20W Audio Power Amplifier with Mute and
Standby
General Description
Key Specifications
The LM4734 is a three channel audio amplifier capable of
typically delivering 20W per channel of continuous average
output power into a 4Ω or 8Ω load with less than 10%
THD+N from 20Hz - 20kHz.
The LM4734 has short circuit protection and a thermal shut
down feature that is activated when the die temperature
exceeds 150˚C. The LM4734 also has an under voltage lock
out feature for click and pop free power on and off.
Each amplifier of the LM4734 has an independent smooth
transition fade-in/out mute and a power conserving standby
mode. The mute and standby modes can be controlled by
external logic.
The LM4734 has a wide supply operating supply range from
± 10V - ± 30V allowing for lower cost unregulated power
supplies to be used.
The LM4734 can easily be configured for bridge or parallel
operation for higher power and bi-amp solutions.
j Output Power/Channel with 10% THD+N,
1kHz into 4Ω or 8Ω
20W (typ)
j THD+N at 3x1W into 8Ω, 1kHz
0.03% (typ)
j Mute Attenuation
110dB (typ)
j PSRR
64dB (typ)
j Slew Rate
18V/µs (typ)
Features
n
n
n
n
Low external component count
Quiet fade-in/out mute mode
Low power standby mode
Wide supply range: 20V - 60V
Applications
n
n
n
n
Audio
Audio
Audio
Audio
amplifier
amplifier
amplifier
amplifier
for
for
for
for
component stereo
compact stereo
home theater in a box (HTB)
high-end and HD TVs
Typical Application
200898D2
FIGURE 1. Typical Audio Amplifier Application Circuit
SPiKe™ Protection and Overture™ are trademarks of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS200898
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LM4734 3 Channel 20W Audio Power Amplifier with Mute and Standby
February 2004
LM4734
Connection Diagrams
Plastic Package (Note 13)
200898I4
Top View
Order Number LM4734TA
See NS Package Number TA27A
TO-220 Top Marking
200898I5
Top View
U - Wafer Fab Code
Z - Assembly Plant Code
XY - Date Code
TT - Die Run Traceability
L4734TA - LM4734TA
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Soldering Information
(Notes 1,
TA Package (10 seconds)
2)
+
-
Supply Voltage |V | + |V |
-40˚C to +150˚C
Thermal Resistance
60V
θJA
30˚C/W
θJC
1.0˚C/W
(V+ or V-) and
Common Mode Input Voltage
|V+| + |V-| ≤ 54V
Differential Input Voltage (Note 12)
Output Current
260˚C
Storage Temperature
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings (Notes 1, 2)
54V
Temperature Range
Internally Limited
Power Dissipation (Note 3)
125W
ESD Susceptability (Note 4)
2.0kV
ESD Susceptability (Note 5)
Junction Temperature (TJMAX) (Note 9)
TMIN ≤ TA ≤ TMAX
−20˚C ≤ TA ≤ +85˚C
20V ≤ VTOTAL ≤ 60V
Supply Voltage |V+| + |V-|
200V
150˚C
Electrical Characteristics (Notes 1, 2)
The following specifications apply for V+ = +21V, V- = −21V, and RL = 8Ω unless otherwise specified. Limits apply for TA =
25˚C.
Symbol
Parameter
Conditions
LM4734
Typical
Limit
Units
(Limits)
(Note 6) (Notes 7, 8)
|V | + |V |
Power Supply Voltage (Note
10)
GND − V ≥ 9.5V
18
AM
Mute Attenuation
VMUTE = 2.5V
110
Output Power (RMS)
THD+N = 10% (max), f = 1kHz
|V+| = |V-| = 17V, RL = 4Ω
|V+| = |V-| = 21V, RL = 8Ω
20
20
THD+N = 1% (max), f = 1kHz
|V+| = |V-| = 17V, RL = 4Ω
|V+| = |V-| = 21V, RL = 8Ω
17
18
W
W
0.05
0.03
%
%
+
PO
-
THD+N
Total Harmonic Distortion +
Noise
Xtalk
Channel Separation (Note 11)
-
PO = 1W, f = 1kHz
AV = 26dB
|V+| = |V-| = 17V, RL = 4Ω
|V+| = |V-| = 21V, RL = 8Ω
20
60
V (min)
V (max)
dB
15
15
W (min)
W (min)
PO = 10W, f = 1kHz
65
dB
PO = 10W, f = 10kHz
55
dB
V/µs
SR
Slew Rate
VIN = 1.414VRMS, trise = 2ns
18
IDD
Total Quiescent Power Supply
Current
VCM = 0V, VO = 0V, IO = 0A
VSTANDBY = GND, Standby = Off
VSTANDBY = 5V, Standby = On
75
8
120
10
mA (max)
mA (max)
VOS
Input Offset Voltage
VCM = 0V, IO = 0mA
2.0
15
mV (max)
IB
Input Bias Current
VCM = 0V, IO = 0mA
0.2
µA
V+ = 21V + VRIPPLE (1VRMS),
fRIPPLE = 120Hz Sine, V- = –21VDC
75
dB
V- = –21V + VRIPPLE (1VRMS),
fRIPPLE = 120Hz Sine, V+ = 21VDC
64
dB
110
dB
2.0
µV
PSRR
Power Supply Rejection Ratio
AVOL
Open Loop Voltage Gain
|V+| = |V-| = 21V, RL = 2kΩ
∆VO = 15V
eIN
Input Noise
IHF-A-Weighting Filter,
RIN = 600Ω (Input Referred)
3
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LM4734
Absolute Maximum Ratings
LM4734
Electrical Characteristics (Notes 1, 2)
(Continued)
The following specifications apply for V+ = +21V, V- = −21V, and RL = 8Ω unless otherwise specified. Limits apply for TA =
25˚C.
Symbol
Parameter
Conditions
LM4734
Typical
Limit
Units
(Limits)
(Note 6) (Notes 7, 8)
Standby
VIL
VIH
Standby Low Input Voltage
Standby High Input Voltage
Play Mode
Standby Mode
2.0
0.8
2.5
V (max)
V (min)
Mute
VIL
VIH
Mute Low Input Voltage
Mute High Input Voltage
Play Mode
Mute Mode
2.0
0.8
2.5
V (max)
V (min)
Note 1: All voltages are measured with respect to the ground pins, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given; however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature TA. The maximum
allowable power dissipation is PDMAX = (TJMAX -TA)/θJC or the number given in the Absolute Maximum Ratings, whichever is lower. For the LM4734, TJMAX = 150˚C
and the typical θJC is 1.0˚C/W. Refer to the DETERMINING THE CORRECT HEAT SINK section for more information.
Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 5: Machine Model: a 220pF - 240pF discharged through all pins.
Note 6: Typical specifications are measured at 25˚C and represent the parametric norm.
Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: The maximum operating junction temperature is 150˚C. However, the instantaneous Safe Operating Area temperature is 250˚C.
Note 10: V- must have at least - 9.5V at its pin with reference to GND in order for the under-voltage protection circuitry to be disabled. In addition, the voltage
differential between V+ and V- must be greater than 14V.
Note 11: Cross talk performance was measured using the demo board shown in the datasheet. PCB layout will affect cross talk. It is recommended that the input
and output traces be separated by as much distance as possible. Return ground traces from outputs should also be independent back to sinlge ground point and
use as wide of traces as possible.
Note 12: The Differential Input Voltage Absolute Maximum Rating is based on supply voltages V+ = 27V and V- = - 27V.
Note 13: The TA27A is a non-isolated package. The package’s metal back and any heat sink to which it is mounted are connected to the V- potential when using
only thermal compound. If a mica washer is used in addition to thermal compound, θCS (case to sink) is increased, but the heat sink will be electrically isolated from
V-.
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LM4734
Bridged Amplifier Application Circuit
200898D3
FIGURE 2. Bridged Amplifier Application Circuit
5
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LM4734
Parallel Amplifier Application Circuit
200898D4
FIGURE 3. Parallel Amplifier Application Circuit
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LM4734
Single Supply Application Circuit
200898D5
FIGURE 4. Single Supply Amplifier Application Circuit
Note: *Optional components dependent upon specific design requirements.
Auxiliary Amplifier Application Circuit
200898D6
FIGURE 5. Special Audio Amplifier Application Circuit
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LM4734
External Components Description
(Figures 1-5)
Components
Functional Description
1
RB
Prevents current from entering the amplifier’s non-inverting input. This current may pass through to the load
during system power down, because of the amplifier’s low input impedance when the undervoltage circuitry
is off. This phenomenon occurs when the V+ and V- supply voltages are below 1.5V.
2
Ri
Inverting input resistance. Along with Rf, sets AC gain.
3
Rf
Feedback resistance. Along with Ri, sets AC gain.
4
Rf2
(Note 14)
Feedback resistance. Works with Cf and Rf creating a lowpass filter that lowers AC gain at high
frequencies. The -3dB point of the pole occurs when: (Rf - Ri)/2 = Rf // [1/(2πfcCf) + Rf2] for the
Non-Inverting configuration shown in Figure 5.
5
Cf
(Note 14)
Compensation capacitor. Works with Rf and Rf2 to reduce AC gain at higher frequencies.
6
CC
(Note 14)
Compensation capacitor. Reduces the gain at higher frequencies to avoid quasi-saturation oscillations of the
output transistor. Also suppresses external electromagnetic switching noise created from fluorescent lamps.
7
Ci
(Note 14)
Feedback capacitor which ensures unity gain at DC. Along with Ri also creates a highpass filter at fc =
1/(2πRiCi).
8
CS
Provides power supply filtering and bypassing. Refer to the Supply Bypassing application section for proper
placement and selection of bypass capacitors.
9
RV
(Note 14)
Acts as a volume control by setting the input voltage level.
10
RIN
(Note 14)
Sets the amplifier’s input terminals DC bias point when CIN is present in the circuit. Also works with CIN to
create a highpass filter at fC = 1/(2πRINCIN). If the value of RIN is too large, oscillations may be observed on
the outputs when the inputs are floating. Recommended values are 10kΩ to 47kΩ. Refer to Figure 5.
11
CIN
(Note 14)
Input capacitor. Prevents the input signal’s DC offsets from being passed onto the amplifier’s inputs.
12
RSN
(Note 14)
Works with CSN to stabilize the output stage by creating a pole that reduces high frequency instabilities.
13
CSN
(Note 14)
Works with RSN to stabilize the output stage by creating a pole that reduces high frequency instabilities. The
pole is set at fC = 1/(2πRSNCSN). Refer to Figure 5.
14
L (Note 14)
15
R (Note 14)
Provides high impedance at high frequencies so that R may decouple a highly capacitive load and reduce
the Q of the series resonant circuit. Also provides a low impedance at low frequencies to short out R and
pass audio signals to the load. Refer to Figure 5.
16
RA
Provides DC voltage biasing for the transistor Q1 in single supply operation.
17
CA
Provides bias filtering for single supply operation.
18
RINP
(Note 14)
Limits the voltage difference between the amplifier’s inputs for single supply operation. Refer to the Clicks
and Pops application section for a more detailed explanation of the function of RINP.
19
RBI
Provides input bias current for single supply operation. Refer to the Clicks and Pops application section for
a more detailed explanation of the function of RBI.
20
RE
Establishes a fixed DC current for the transistor Q1 in single supply operation. This resistor stabilizes the
half-supply point along with CA.
21
RM
Limits the current drawn into the logic gates for the MUTE and STANDBY pins.
22
S1
Standby switch. When switched to GND, the amplifier will be in PLAY mode.
23
S2
Mute switch. When switched to GND, the amplifier will be in PLAY mode.
24
ROUT
Reduces current flow between outputs that are caused by Gain or DC offset differences between the
amplifiers.
Note 14: Optional components dependent upon specific design requirements.
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Although the optional external components have specific
desired functions that are designed to reduce the bandwidth
and eliminate unwanted high frequency oscillations they may
cause certain undesirable effects when they interact. Interaction may occur for components whose reactances are in
close proximity to one another. One example would be the
Typical Performance Characteristics
PSRR vs Frequency
± 21V, VRIPPLE = 1VRMS
Supply Current
vs Supply Voltage
RL = 8Ω, 80kHz BW
200898J8
200898J7
THD+N vs Frequency
THD+N vs Frequency
± 17V, POUT = 1W/Channel
± 21V, POUT = 1W/Channel
RL = 4Ω, 80kHz BW
RL = 8Ω, 80kHz BW
200898K2
200898K3
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LM4734
coupling capacitor, CC, and the compensation capacitor, Cf.
These two components act as low impedances to certain
frequencies which will couple signals from the input to the
output. Please take careful note of basic amplifier component functionality when designing in these components.
The optional external components shown in Figure 4 and
Figure 5 and described above are applicable in both single
and split voltage supply configurations.
Optional External Component
Interaction
LM4734
Typical Performance Characteristics
(Continued)
THD+N vs
Output Power/Channel
± 21V, RL = 8Ω, 80kHz BW
THD+N vs
Output Power/Channel
± 17V, RL = 4Ω, 80kHz BW
200898K4
200898K5
Output Power/Channel
vs Supply Voltage
f = 1kHz, RL = 8Ω, 80kHz BW
Output Power/Channel
vs Supply Voltage
f = 1kHz, RL = 4Ω, 80kHz BW
200898J2
200898J3
Total Power Dissipation
vs Output Power/Channel
1% THD (max), RL = 8Ω, 80kHz BW
Total Power Dissipation
vs Output Power/Channel
1% THD (max), RL = 4Ω, 80kHz BW
200898J0
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200898J1
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LM4734
Typical Performance Characteristics
(Continued)
Crosstalk vs Frequency
Crosstalk vs Frequency
± 17V, POUT = 10W, Channel 1
± 17V, POUT = 10W, Channel 2
RL = 4Ω, 80kHz BW
RL = 4Ω, 80kHz BW
200898H1
200898H2
Two Channels On Crosstalk vs Frequency
± 17V, POUT = 10W,
RL = 4Ω, 80kHz BW
Crosstalk vs Frequency
± 17V, POUT = 10W, Channel 3
RL = 4Ω, 80kHz BW
200898H3
200898G9
Crosstalk vs Frequency
Crosstalk vs Frequency
± 21V, POUT = 10W, Channel 1
± 21V, POUT = 10W, Channel 2
RL = 8Ω, 80kHz BW
RL = 8Ω, 80kHz BW
200898H4
200898H5
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LM4734
Typical Performance Characteristics
(Continued)
Two Channels On Crosstalk vs Frequency
± 21V, POUT = 10W,
RL = 8Ω, 80kHz BW
Crosstalk vs Frequency
± 21V, POUT = 10W, Channel 3
RL = 8Ω, 80kHz BW
200898H6
200898H0
Supply Current vs
Standby Pin Voltage
Mute Attenuation vs
Mute Pin Voltage
POUT = 10W/Channel
200898I3
200898F5
THD+N vs Frequency
± 17V, POUT = 1W & 15W, Chs 1 & 3 in
Common-Mode
Rejection Ratio
Bridge Mode (Note 15), RL = 8Ω, 80kHz BW
20089803
200898J9
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LM4734
Typical Performance Characteristics
(Continued)
THD+N vs Frequency
THD+N vs Frequency
± 21V, POUT = 1W & 15W, Chs 1 & 3 in
± 19V, POUT = 1W & 15W, All Chs in
Parallel Mode (Note 16), RL = 4Ω, 80kHz BW
Parallel Mode (Note 16), RL = 2Ω, 80kHz BW
200898K1
200898K0
THD+N vs Output Power
THD+N vs Output Power
± 17V, Chs 1 & 3 in Bridge Mode (Note 15)
± 21V, Chs 1 & 3 in Parallel Mode (Note 16)
RL = 8Ω, 80kHz BW
RL = 4Ω, 80kHz BW
200898K6
200898K8
Output Power vs Supply Voltage
Chs 1 & 3 in Bridge Mode (Note 15)
f = 1kHz, RL = 8Ω, 80kHz BW
THD+N vs Output Power
± 19V, All Chs in Parallel Mode (Note 16)
RL = 2Ω, 80kHz BW
200898K7
200898J4
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LM4734
Typical Performance Characteristics
(Continued)
Output Power vs Supply Voltage
All Chs in Parallel Mode (Note 16)
f = 1kHz, RL = 2Ω, 80kHz BW
Output Power vs Supply Voltage
Chs 1 & 3 in Parallel Mode (Note 16)
f = 1kHz, RL = 4Ω, 80kHz BW
200898J6
200898J5
Note 15: Bridge mode graphs were taken using the demo board and inverting the signal to the channel 3 input.
Note 16: Parallel mode graphs were taken using the demo board connecting each output through a 0.1Ω/3W resistor to the load.
OVER-VOLTAGE PROTECTION
The LM4734 contains over-voltage protection circuitry that
limits the output current while also providing voltage clamping. The clamp does not, however, use internal clamping
diodes. The clamping effect is quite the same as diodes
because the output transistors are designed to work alternately by sinking large current spikes.
Application Information
MUTE MODE
By placing a logic-high voltage on the mute pins, the signal
going into the amplifiers will be muted. If the mute pins are
connected to a logic-low voltage, the amplifiers will be in a
non-muted state. There are three mute pins, one for each
amplifier, so that one channel can be muted without muting
the other if the application requires such a configuration.
Refer to the Typical Performance Characteristics section
for curves concerning Mute Attenuation vs Mute Pin Voltage.
THERMAL PROTECTION
The LM4734 has a sophisticated thermal protection scheme
to prevent long-term thermal stress of the device. When the
temperature on the die exceeds 150˚C, the LM4734 shuts
down. It starts operating again when the die temperature
drops to about 145˚C, but if the temperature again begins to
rise, shutdown will occur again above 150˚C. Therefore, the
device is allowed to heat up to a relatively high temperature
if the fault condition is temporary, but a sustained fault will
cause the device to cycle in a Schmitt Trigger fashion between the thermal shutdown temperature limits of 150˚C and
145˚C. This greatly reduces the stress imposed on the IC by
thermal cycling, which in turn improves its reliability under
sustained fault conditions.
Since the die temperature is directly dependent upon the
heat sink used, the heat sink should be chosen so that
thermal shutdown is not activated during normal operation.
Using the best heat sink possible within the cost and space
constraints of the system will improve the long-term reliability
of any power semiconductor device, as discussed in the
Determining the Correct Heat Sink section.
STANDBY MODE
The standby mode of the LM4734 allows the user to drastically reduce power consumption when the amplifiers are
idle. By placing a logic-high voltage on the standby pins, the
amplifiers will go into Standby Mode. In this mode, the
current drawn from the VCC supply is typically less than 30µA
total for all amplifiers. The current drawn from the VEE supply
is typically 8mA. Clearly, there is a significant reduction in
idle power consumption when using the standby mode.
There are three Standby pins, so that one channel can be
put in standby mode without putting the other amplifier in
standby if the application requires such flexibility. Refer to
the Typical Performance Characteristics section for
curves showing Supply Current vs. Standby Pin Voltage for
both supplies.
UNDER-VOLTAGE PROTECTION
Upon system power-up, the under-voltage protection circuitry allows the power supplies and their corresponding
capacitors to come up close to their full values before turning
on the LM4734. Since the supplies have essentially settled
to their final value, no DC output spikes occur. At power
down, the outputs of the LM4734 are forced to ground before
the power supply voltages fully decay preventing transients
on the output.
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DETERMlNlNG MAXIMUM POWER DISSIPATION
Power dissipation within the integrated circuit package is a
very important parameter requiring a thorough understanding if optimum power output is to be obtained. An incorrect
maximum power dissipation calculation may result in inadequate heat sinking causing thermal shutdown and thus
limiting the output power.
Equation (1) shows the theoretical maximum power dissipation point for each amplifier in a single-ended configuration
where VCC is the total supply voltage.
14
known as “motorboating” or by high frequency instabilities.
These instabilities can be eliminated through multiple bypassing utilizing a large tantalum or electrolytic capacitor
(10µF or larger) which is used to absorb low frequency
variations and a small ceramic capacitor (0.1µF) to prevent
any high frequency feedback through the power supply lines.
If adequate bypassing is not provided, the current in the
supply leads which is a rectified component of the load
current may be fed back into internal circuitry. This signal
causes distortion at high frequencies requiring that the supplies be bypassed at the package terminals. It is recommended that a ceramic 0.1µF capacitor and an electrolytic or
tantalum 10µF or larger capacitor be placed as close as
possible to the IC’s supply pins and then an additional electrolytic capacitor of 470µF or more on each supply line.
(Continued)
PDMAX = (VCC)2 / 2π2RL
(1)
Thus by knowing the total supply voltage and rated output
load, the maximum power dissipation point can be calculated. The package dissipation is three times the number
which results from Equation (1) since there are three amplifiers in each LM4734. Refer to the graphs of Power Dissipation versus Output Power in the Typical Performance Characteristics section which show the actual full range of power
dissipation not just the maximum theoretical point that results from Equation (1).
DETERMINING THE CORRECT HEAT SINK
The choice of a heat sink for a high-power audio amplifier is
made entirely to keep the die temperature at a level such
that the thermal protection circuitry is not activated under
normal circumstances.
The thermal resistance from the die to the outside air, θJA
(junction to ambient), is a combination of three thermal resistances, θJC (junction to case), θCS (case to sink), and θSA
(sink to ambient). The thermal resistance, θJC (junction to
case), of the LM4734TA is 1.0˚C/W. Using Thermalloy Thermacote thermal compound, the thermal resistance, θCS
(case to sink), is about 0.2˚C/W. Since convection heat flow
(power dissipation) is analogous to current flow, thermal
resistance is analogous to electrical resistance, and temperature drops are analogous to voltage drops, the power
dissipation out of the LM4734 is equal to the following:
(2)
PDMAX = (TJMAX−TAMB) / θJA
BRIDGED AMPLIFIER APPLICATION
The LM4734 has three operational amplifiers internally, allowing for a few different amplifier configurations. One of
these configurations is referred to as “bridged mode” and
involves driving the load differentially through two of the
LM4734’s outputs. This configuration is shown in Figure 2.
Bridged mode operation is different from the classical singleended amplifier configuration where one side of its load is
connected to ground.
A bridge amplifier design has a distinct advantage over the
single-ended configuration, as it provides differential drive to
the load, thus doubling output swing for a specified supply
voltage. Theoretically, four times the output power is possible as compared to a single-ended amplifier under the
same conditions. This increase in attainable output power
assumes that the amplifier is not current limited or clipped.
A direct consequence of the increased power delivered to
the load by a bridge amplifier is an increase in internal power
dissipation. For each operational amplifier in a bridge configuration, the internal power dissipation will increase by a
factor of two over the single ended dissipation. Using Equation (2) the load impedance should be divided by a factor of
two to find the maximum power dissipation point for each
amplifier in a bridge configuration. In the case of an 8Ω load
in a bridge configuration, the value used for RL in Equation
(2) would be 4Ω for each amplifier in the bridge. When using
two of the amplifiers of the LM4734 in bridge mode, the third
amplifier should have a load impedance equal to or higher
than the equivalent impedance seen by each of the bridged
amplifiers. In the example above where the bridge load is 8Ω
and each amplifier in the bridge sees a load value of 4Ω then
the third amplifier should also have a 4Ω load impedance or
higher. Using a lower load impedance on the third amplifier
will result in higher power dissipation in the third amplifier
than the other two amplifiers and may result in unwanted
activation of thermal shut down on the third amplifier. Once
the impedance seen by each amplifier is known then Equation (2) can be used to calculated the value of PDMAX for
each amplifier. The PDMAX of the IC package is found by
adding up the power dissipation for each amplifier within the
IC package.
This value of PDMAX can be used to calculate the correct size
heat sink for a bridged amplifier application. Since the internal dissipation for a given power supply and load is increased by using bridged-mode, the heatsink’s θSA will have
to decrease accordingly as shown by Equation 4. Refer to
the section, Determining the Correct Heat Sink, for a more
detailed discussion of proper heat sinking for a given application.
where TJMAX = 150˚C, TAMB is the system ambient temperature and θJA = θJC + θCS + θSA.
200898B8
Once the maximum package power dissipation has been
calculated using Equation 2, the maximum thermal resistance, θSA, (heat sink to ambient) in ˚C/W for a heat sink can
be calculated. This calculation is made using Equation 4
which is derived by solving for θSA in Equation 3.
θSA = [(TJMAX−TAMB)−PDMAX(θJC +θCS)] / PDMAX (3)
Again it must be noted that the value of θSA is dependent
upon the system designer’s amplifier requirements. If the
ambient temperature that the audio amplifier is to be working
under is higher than 25˚C, then the thermal resistance for the
heat sink, given all other things are equal, will need to be
smaller.
SUPPLY BYPASSING
The LM4734 has excellent power supply rejection and does
not require a regulated supply. However, to improve system
performance as well as eliminate possible oscillations, the
LM4734 should have its supply leads bypassed with lowinductance capacitors having short leads that are located
close to the package terminals. Inadequate power supply
bypassing will manifest itself by a low frequency oscillation
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LM4734
Application Information
LM4734
Application Information
The LM4734 is perfectly suited for bi-amp or tri-amp applications with it’s three amplifiers. Two of the amplifiers can be
configured for bridge or parallel mode to drive a subwoofer
with the third amplifier driving the tweeter or tweeter and
midrange. An example would be to use a 4Ω subwoofer and
8Ω tweeter/midrange with the LM4734 in parallel and singleended modes. Each amplifier would see an 8Ω load but the
subwoofer would have twice the output power as the
tweeter/midrange. The gain of each amplifier may also be
adjusted for the desired response. Using the LM4734 in a
tri-amp configuration would allow the gain of each amplifier
to be adjusted to achieve the desired speaker response.
(Continued)
PARALLEL AMPLIFIER APPLICATION
Parallel configuration is normally used when higher output
current is needed for driving lower impedance loads (i.e. 4Ω
or lower) to obtain higher output power levels. As shown in
Figure 3 , the parallel amplifier configuration consist of designing the amplifiers in the IC to have identical gain, connecting the inputs in parallel and then connecting the outputs
in parallel through a small external output resistor. Any number of amplifiers can be connected in parallel to obtain the
needed output current or to divide the power dissipation
across multiple IC packages. Ideally, each amplifier shares
the output current equally. Due to slight differences in gain
the current sharing will not be equal among all channels. If
current is not shared equally among all channels then the
power dissipation will also not be equal among all channels.
It is recommended that 0.1% tolerance resistors be used to
set the gain (Ri and Rf) for a minimal amount of difference in
current sharing.
SINGLE-SUPPLY AMPLIFIER APPLICATION
The typical application of the LM4734 is a split supply amplifier. But as shown in Figure 4, the LM4734 can also be
used in a single power supply configuration. This involves
using some external components to create a half-supply bias
which is used as the reference for the inputs and outputs.
Thus, the signal will swing around half-supply much like it
swings around ground in a split-supply application. Along
with proper circuit biasing, a few other considerations must
be accounted for to take advantage of all of the LM4734
functions, like the mute function.
When operating two or more amplifiers in parallel mode the
impedance seen by each amplifier is equal to the total load
impedance multiplied by the number of amplifiers driving the
load in parallel as shown by Equation (4) below:
(4)
RL(parallel) = RL(total) * Number of amplifiers
Once the impedance seen by each amplifier in the parallel
configuration is known then Equation (2) can be used with
this calculated impedance to find the amount of power dissipation for each amplifier. Total power dissipation (PDMAX)
within an IC package is found by adding up the power
dissipation for each amplifier in the IC package. Using the
calculated PDMAX the correct heat sink size can be determined. Refer to the section, Determining the Correct Heat
Sink, for more information and detailed discussion of proper
heat sinking.
If only two amplifiers of the LM4734 are used in parallel
mode then the third amplifier should have a load impedance
equal to or higher than the equivalent impedance seen by
each of the amplifiers in parallel mode. Having the same
load impedance on all amplifiers means that the power
dissipation in each amplifier will be equal. Using a lower load
impedance on the third amplifier will result in higher power
dissipation in the third amplifier than the other two amplifiers
and may result in unwanted activation of thermal shut down
on the third amplifier. Having a higher impedance on the third
amplifier than the equivalent impedance on the two amplifiers in parallel will reduce total IC package power dissipation
reducing the heat sink size requirement.
The LM4734 possesses a mute and standby function with
internal logic gates that are half-supply referenced. Thus, to
enable either the Mute or Standby function, the voltage at
these pins must be a minimum of 2.5V above half-supply. In
single-supply systems, devices such as microprocessors
and simple logic circuits used to control the mute and
standby functions, are usually referenced to ground, not
half-supply. Thus, to use these devices to control the logic
circuitry of the LM4734, a “level shifter,” like the one shown in
Figure 6, must be employed. A level shifter is not needed in
a split-supply configuration since ground is also half-supply.
200898D9
FIGURE 6. Level Shift Circuit
BI-AMP AND TRI-AMP APPLICATIONS
Bi-amping is the practice of using two different amplifiers to
power the individual drivers in a speaker enclosure. For
example, a two-way speaker enclosure might have a tweeter
and a subwoofer. One amplifier would drive the tweeter and
another would drive the subwoofer. One advantage is that
the gain of each amplifier can be adjusted for the different
driver sensitivities. Another advantage is the crossover can
be designed before the amplifier stages with low cost op
amps instead of large passive components. With the crossover before the amplifier stages no power is wasted in the
passive crossover as each individual amplifier provides the
correct frequencies for the driver. Tri-Amping is using three
different amplifier stages in the same way bi-amping is done.
Bi-amping can also be done on a three-way speaker design
by using one amplifier for the subwoofer and another for the
midrange and tweeter.
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When the voltage at the Logic Input node is 0V, the 2N3904
is “off” and thus resistor Rc pulls up mute or standby input to
the supply. This enables the mute or standby function. When
the Logic Input is 5V, the 2N3904 is “on” and consequently,
the voltage at the collector is essentially 0V. This will disable
the mute or standby function, and thus the amplifier will be in
its normal mode of operation. Rshift, along with Cshift, creates
an RC time constant that reduces transients when the mute
or standby functions are enabled or disabled. Additionally,
Rshift limits the current supplied by the internal logic gates of
the LM4734 which insures device reliability. Refer to the
Mute Mode and Standby Mode sections in the Application
Information section for a more detailed description of these
functions.
16
fIN = 1 / (2πRINCIN) (Hz)
(7)
With large values of RIN oscillations may be observed on the
outputs when the inputs are left floating. Decreasing the
value of RIN or not letting the inputs float will remove the
oscillations. If the value of RIN is decreased then the value of
CIN will need to increase in order to maintain the same -3dB
frequency response.
(Continued)
CLICKS AND POPS
In the typical application of the LM4734 as a split-supply
audio power amplifier, the IC exhibits excellent “click” and
“pop” performance when utilizing the mute mode. In addition,
the device employs Under-Voltage Protection, which eliminates unwanted power-up and power-down transients. The
basis for these functions are a stable and constant halfsupply potential. In a split-supply application, ground is the
stable half-supply potential. But in a single-supply application, the half-supply needs to charge up at the same rate as
the supply rail, VCC. This makes the task of attaining a
clickless and popless turn-on more challenging. Any uneven
charging of the amplifier inputs will result in output clicks and
pops due to the differential input topology of the LM4734.
To achieve a transient free power-up and power-down, the
voltage seen at the input terminals should be ideally the
same. Such a signal will be common-mode in nature, and
will be rejected by the LM4734. In Figure 4, the resistor RINP
serves to keep the inputs at the same potential by limiting the
voltage difference possible between the two nodes. This
should significantly reduce any type of turn-on pop, due to an
uneven charging of the amplifier inputs. This charging is
based on a specific application loading and thus, the system
designer may need to adjust these values for optimal performance.
As shown in Figure 4, the resistors labeled RBI help bias up
the LM4734 off the half-supply node at the emitter of the
2N3904. But due to the input and output coupling capacitors
in the circuit, along with the negative feedback, there are two
different values of RBI, namely 10kΩ and 200kΩ. These
resistors bring up the inputs at the same rate resulting in a
popless turn-on. Adjusting these resistors values slightly
may reduce pops resulting from power supplies that ramp
extremely quick or exhibit overshoot during system turn-on.
HIGH PERFORMANCE CONSIDERATIONS
Using low cost electrolytic capacitors in the signal path such
as CIN and Ci (see Figures 1 - 5) will result in very good
performance. However, electrolytic capacitors are less linear
than other premium capacitors. Higher THD+N performance
may be obtained by using high quality polypropylene capacitors in the signal path. A more cost effective solution may be
the use of smaller value premium capacitors in parallel with
the larger electrolytic capacitors. This will maintain signal
quality in the upper audio band where any degradation is
most noticeable while also coupling in the signals in the
lower audio band for good bass response.
Distortion is introduced as the audio signal approaches the
lower -3dB point, determined as discussed in the section
above. By using larger values of capacitors such that the
-3dB point is well outside of the audio band will reduce this
distortion and improve THD+N performance.
Increasing the value of the large supply bypass capacitors
will improve burst power output. The larger the supply bypass capacitors the higher the output pulse current without
supply droop increasing the peak output power. This will also
increase the headroom of the amplifier and reduce THD.
SIGNAL-TO-NOISE RATIO
In the measurement of the signal-to-noise ratio, misinterpretations of the numbers actually measured are common. One
amplifier may sound much quieter than another, but due to
improper testing techniques, they appear equal in measurements. This is often the case when comparing integrated
circuit designs to discrete amplifier designs. Discrete transistor amps often “run out of gain” at high frequencies and
therefore have small bandwidths to noise as indicated below.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components is required to meet
the design targets of an application. The choice of external
component values that will affect gain and low frequency
response are discussed below.
The gain of each amplifier is set by resistors Rf and Ri for the
non-inverting configuration shown in Figure 1. The gain is
found by Equation (5) below:
(5)
AV = 1 + Rf / Ri (V/V)
For best noise performance, lower values of resistors are
used. A value of 1kΩ is commonly used for Ri and then
setting the value of Rf for the desired gain. For the LM4734
the gain should be set no lower than 10V/V and no higher
than 50V/V. Gain settings below 10V/V may experience
instability and using the LM4734 for gains higher than 50V/V
will see an increase in noise and THD.
The combination of Ri with Ci (see Figure 1) creates a high
pass filter. The low frequency response is determined by
these two components. The -3dB point can be found from
Equation (6) shown below:
(6)
fi = 1 / (2πRiCi) (Hz)
If an input coupling capacitor is used to block DC from the
inputs as shown in Figure 5, there will be another high pass
filter created with the combination of CIN and RIN. When
using a input coupling capacitor RIN is needed to set the DC
bias point on the amplifier’s input terminal. The resulting
-3dB frequency response due to the combination of CIN and
RIN can be found from Equation (7) shown below:
20089899
Integrated circuits have additional open loop gain allowing
additional feedback loop gain in order to lower harmonic
distortion and improve frequency response. It is this additional bandwidth that can lead to erroneous signal-to-noise
measurements if not considered during the measurement
process. In the typical example above, the difference in
bandwidth appears small on a log scale but the factor of 10in
bandwidth, (200kHz to 2MHz) can result in a 10dB theoretical difference in the signal-to-noise ratio (white noise is
proportional to the square root of the bandwidth in a system).
In comparing audio amplifiers it is necessary to measure the
magnitude of noise in the audible bandwidth by using a
“weighting” filter (Note 17). A “weighting” filter alters the
frequency response in order to compensate for the average
17
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LM4734
Application Information
LM4734
Application Information
the IC. With at least a 20µF local bypass, these voltage
surges are important only if the lead length exceeds a couple
feet ( > 1µH lead inductance). Twisting together the supply
and ground leads minimizes the effect.
(Continued)
human ear’s sensitivity to the frequency spectra. The weighting filters at the same time provide the bandwidth limiting as
discussed in the previous paragraph.
PHYSICAL IC MOUNTING CONSIDERATIONS
Mounting of the package to a heat sink must be done such
that there is sufficient pressure from the mounting screws to
insure good contact with the heat sink for efficient heat flow.
Over tightening the mounting screws will cause the package
to warp reducing contact area with the heat sink. Less
contact with the heat sink will increase the thermal resistance from the package case to the heat sink (θCS) resulting
in higher operating die temperatures and possible unwanted
thermal shut down activation. Extreme over tightening of the
mounting screws will cause severe physical stress resulting
in cracked die and catastrophic IC failure. The recommended mounting screw size is M3 with a maximum torque
of 50 N-cm. Additionally, it is best to use washers under the
screws to distribute the force over a wider area or a screw
with a wide flat head. To further distribute the mounting force
a solid mounting bar in front of the package and secured in
place with the two mounting screws may be used. Other
mounting options include a spring clip. If the package is
secured with pressure on the front of the package the maximum pressure on the molded plastic should not exceed
150N/mm2.
Additionally, if the mounting screws are used to force the
package into correct alignment with the heat sink, package
stress will be increased. This increase in package stress will
result in reduced contact area with the heat sink increasing
die operating temperature and possible catastrophic IC failure.
Note 17: CCIR/ARM: A Practical Noise Measurement Method; by Ray
Dolby, David Robinson and Kenneth Gundry, AES Preprint No. 1353 (F-3).
In addition to noise filtering, differing meter types give different noise readings. Meter responses include:
1.
2.
RMS reading,
average responding,
3.
4.
peak reading, and
quasi peak reading.
Although theoretical noise analysis is derived using true
RMS based calculations, most actual measurements are
taken with ARM (Average Responding Meter) test equipment.
Typical signal-to-noise figures are listed for an A-weighted
filter which is commonly used in the measurement of noise.
The shape of all weighting filters is similar, with the peak of
the curve usually occurring in the 3kHz–7kHz region.
LEAD INDUCTANCE
Power op amps are sensitive to inductance in the output
leads, particularly with heavy capacitive loading. Feedback
to the input should be taken directly from the output terminal,
minimizing common inductance with the load.
Lead inductance can also cause voltage surges on the supplies. With long leads to the power supply, energy is stored in
the lead inductance when the output is shorted. This energy
can be dumped back into the supply bypass capacitors when
the short is removed. The magnitude of this transient is
reduced by increasing the size of the bypass capacitor near
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18
The load current IL will be much larger than input bias current
II, thus V1 will follow the output voltage directly, i.e. in phase.
Therefore the voltage appearing at the non-inverting input is
effectively positive feedback and the circuit may oscillate. If
there was only one device to worry about then the values of
R1 and R2 would probably be small enough to be ignored;
however, several devices normally comprise a total system.
Any ground return of a separate device, whose output is in
phase, can feedback in a similar manner and cause instabilities. Out of phase ground loops also are troublesome,
causing unexpected gain and phase errors.
(Continued)
LAYOUT, GROUND LOOPS AND STABILITY
The LM4734 is designed to be stable when operated at a
closed-loop gain of 10 or greater, but as with any other
high-current amplifier, the LM4734 can be made to oscillate
under certain conditions. These oscillations usually involve
printed circuit board layout or output/input coupling issues.
When designing a layout, it is important to return the load
ground, the output compensation ground, and the low level
(feedback and input) grounds to the circuit board common
ground point through separate paths. Otherwise, large currents flowing along a ground conductor will generate voltages on the conductor which can effectively act as signals at
the input, resulting in high frequency oscillation or excessive
distortion. It is advisable to keep the output compensation
components and the 0.1µF supply decoupling capacitors as
close as possible to the LM4734 to reduce the effects of PCB
trace resistance and inductance. For the same reason, the
ground return paths should be as short as possible.
The solution to most ground loop problems is to always use
a single-point ground system, although this is sometimes
impractical. The third figure above is an example of a singlepoint ground system.
The single-point ground concept should be applied rigorously to all components and all circuits when possible. Violations of single-point grounding are most common among
printed circuit board designs, since the circuit is surrounded
by large ground areas which invite the temptation to run a
device to the closest ground spot. As a final rule, make all
ground returns low resistance and low inductance by using
large wire and wide traces.
Occasionally, current in the output leads (which function as
antennas) can be coupled through the air to the amplifier
input, resulting in high-frequency oscillation. This normally
happens when the source impedance is high or the input
leads are long. The problem can be eliminated by placing a
small capacitor, CC, (on the order of 50pF to 500pF) across
the LM4734 input terminals. Refer to the External Components Description section relating to component interaction
with Cf.
In general, with fast, high-current circuitry, all sorts of problems can arise from improper grounding which again can be
avoided by returning all grounds separately to a common
point. Without isolating the ground signals and returning the
grounds to a common point, ground loops may occur.
“Ground Loop” is the term used to describe situations occurring in ground systems where a difference in potential exists
between two ground points. Ideally a ground is a ground, but
unfortunately, in order for this to be true, ground conductors
with zero resistance are necessary. Since real world ground
leads possess finite resistance, currents running through
them will cause finite voltage drops to exist. If two ground
return lines tie into the same path at different points there will
be a voltage drop between them. The first figure below
shows a common ground example where the positive input
ground and the load ground are returned to the supply
ground point via the same wire. The addition of the finite wire
resistance, R2, results in a voltage difference between the
two points as shown below.
REACTIVE LOADING
It is hard for most power amplifiers to drive highly capacitive
loads very effectively and normally results in oscillations or
ringing on the square wave response. If the output of the
LM4734 is connected directly to a capacitor with no series
resistance, the square wave response will exhibit ringing if
the capacitance is greater than about 0.2µF. If highly capacitive loads are expected due to long speaker cables, a
method commonly employed to protect amplifiers from low
impedances at high frequencies is to couple to the load
through a 10Ω resistor in parallel with a 0.7µH inductor. The
inductor-resistor combination as shown in the Figure 5 isolates the feedback amplifier from the load by providing high
output impedance at high frequencies thus allowing the 10Ω
resistor to decouple the capacitive load and reduce the Q of
the series resonant circuit. The LR combination also provides low output impedance at low frequencies thus shorting
out the 10Ω resistor and allowing the amplifier to drive the
series RC load (large capacitive load due to long speaker
cables) directly.
INVERTING AMPLIFIER APPLICATION
The inverting amplifier configuration may be used instead of
the more common non-inverting amplifier configuration
shown in Figure 1. The inverting amplifier can have better
THD+N performance and eliminates the need for a large
capacitor (Ci) reducing cost and space requirements. The
values show in Figure 7 are only one example of an amplifier
with a gain of 20V/V (Gain = -Rf/Ri). For different resistor
values, the value of RB should be eqaul to the parallel
combination of Rf and Ri.
20089898
19
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LM4734
Application Information
LM4734
Application Information
(Continued)
If the DC blocking input capacitor (CIN) is used as shown, the
lower -3dB point is found using Equation (8) as discussed in
the Proper Selection of External Components section.
200898D7
FIGURE 7. Inverting Amplifier Application Circuit
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20
LM4734
Application Information
(Continued)
200898D8
FIGURE 8. Reference PCB Schematic
21
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LM4734
Application Information
(Continued)
LM4734 REFERENCE BOARD ARTWORK
200898I8
200898I7
Silk Layer
Composite Layer
200898I9
200898I6
Top Layer
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Bottom Layer
22
LM4734
Application Information
(Continued)
Bill Of Materials For Reference PCB
Symbol
Value
Tolerance
Type/Description
RIN1, RIN2, RIN3
33kΩ
5%
1/4 Watt
RB1, RB2, RB3
1kΩ
1%
1/4 Watt
RF1, RF2, RF3
20kΩ
1%
1/4 Watt
Ri1, Ri2, Ri3
1kΩ
1%
1/4 Watt
RSN1, RSN2, RSN3
4.7Ω
5%
1/4 Watt
RG
2.7Ω
5%
1/4 Watt
RV
5.1kΩ
5%
1/4 Watt
CIN1, CIN2, CIN3
1µF
10%
Metallized Polyester Film
CN1, CN2, CN3
15pF
20%
Monolithic Ceramic
Ci1, Ci2, Ci3
68µF
20%
Electrolytic Radial / 35V
CSN1, CSN2, CSN3
0.1µF
20%
Monolithic Ceramic
CV
0.1µF
20%
Monolithic Ceramic
CS1, CS2
0.1µF
20%
Monolithic Ceramic
CS3, CS4
10µF
20%
Electrolytic Radial /35V
CS5, CS6
2,200µF
20%
Electrolytic Radial / 35V
S 1, S2
SPDT (on-on) Switch
J 1, J 2, J 3
Non-Switched PC Mount RCA
Jack
J5, J7, J9, J11
PCB Banana Jack - BLACK
J4, J6, J8, J10, J12
VZD
Comment
PCB Banana Jack - RED
5.1V
1W Zener Diode
27 lead TO-220 Power Socket
with push release lever or
LM4734 IC
U1
23
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LM4734 3 Channel 20W Audio Power Amplifier with Mute and Standby
Physical Dimensions
inches (millimeters)
unless otherwise noted
Non-Isolated TO-220 27-Lead Package
Order Number LM4734TA
NS Package Number TA27A
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