MM54C08/MM74C08 Quad 2-Input AND Gate General Description Features Employing complementary MOS (CMOS) transistors to achieve wide power supply operating range, low power consumption and high noise margin, these gates provide basic functions used in the implementation of digital integrated circuit systems. The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swing essentially equal to the supply voltage. No DC power other than that caused by leakage current is consumed during static condition. All inputs are protected from damage due to static discharge by diode clamps to VCC and GND. Y Y Y Y Y Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibility Low power consumption 3.0V to 15V 1.0V 0.45 VCC (typ.) Fan out of 2 driving 74L 10 nW/package (typ.) Connection Diagram and Truth Table Dual-In-Line Package TL/F/5878 – 1 Top View Order Number MM54C08 or MM74C08 Inputs B Y L L H H L H L H L L L H H e High Level C1995 National Semiconductor Corporation TL/F/5878 Outputs A L e Low Level RRD-B30M105/Printed in U. S. A. MM54C08/MM74C08 Quad 2-Input AND Gate February 1988 Absolute Maximum Ratings (Note 1) Voltage at Any Pin b 0.3V to VCC a 0.3V Operating Temperature Range MM54C08 MM74C08 b 65§ C to a 150§ C Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. b 55§ C to a 125§ C b 40§ C to a 85§ C 700 mW 500 mW 3.0V to 15V 18V Absolute Maximum VCC Lead Temperature (Soldering, 10 seconds) 260§ C DC Electrical Characteristics Min/Max limits apply across the guaranteed temperature range, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage Logical ‘‘0’’ Output Voltage VCC e 5.0V 3.5 VCC e 10V 8.0 V V VCC e 5.0V 1.5 V VCC e 10V 2.0 V VCC e 5.0V, IO e b10 mA 4.5 VCC e 10V, IO e b10 mA 9.0 V V VCC e 5.0V, IO e 10 mA 0.5 V VCC e 10V, IO e 10 mA 1.0 V IIN(1) Logical ‘‘1’’ Input Current VCC e 15V, VIN e 15V IIN(0) Logical ‘‘0’’ Input Current VCC e 15V, VIN e 0V ICC Supply Current VCC e 15V 0.005 b 1.0 1.0 b 0.005 0.01 mA mA 15 mA CMOS/LPTTL INTERFACE VIN(1) Logical ‘‘1’’ Input Voltage VIN(0) Logical ‘‘0’’ Input Voltage VOUT(1) Logical ‘‘1’’ Output Voltage 54C, VCC e 4.5V VCC b 1.5 74C, VCC e 4.75V VCC b 1.5 V V 54C, VCC e 4.5V 74C, VCC e 4.75V VOUT(0) Logical ‘‘0’’ Output Voltage 0.8 V 0.8 V 54C, VCC e 4.5V, IO e b360 mA 2.4 V 74C, VCC e 4.75V, IO e b360 mA 2.4 V 54C, VCC e 4.5V, IO e 360 mA 0.4 V 74C, VCC e 4.75V, IO e 360 mA 0.4 V OUTPUT DRIVE (see 54C/74C Family Characteristics Data Sheet) TA e 25§ C (short circuit current) ISOURCE Output Source Current (P-Channel) VCC e 5.0V, VOUT e 0V ISOURCE Output Source Current (P-Channel) VCC e 10V, VOUT e 0V ISINK Output Sink Current (N-Channel) ISINK Output Sink Current (N-Channel) b 1.75 b 3.3 mA b 8.0 15 mA VCC e 5.0V, VOUT e VCC 1.75 3.6 mA VCC e 10V, VOUT e VCC 8.0 16 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. 2 AC Electrical Characteristics* (MM54C08/MM74C08) TA e 25§ C, CL e 50 pF, unless otherwise specified Symbol tpd0, tpd1 Parameter Conditions Propagation Delay Time to Logical ‘‘1’’ or ‘‘0’’ Typ Max VCC e 5.0V Min 80 140 Units ns VCC e 10V 40 70 ns CIN Input Capacitance (Note 2) 5.0 pF CPD Power Dissipation Capacitance (Note 3) Per Gate 14 pF *AC Parameters are guaranteed by DC correlated testing. Note 2: Capacitance is guaranteed by periodic testing. Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application NoteÐAN-90. Typical Performance Characteristics Propagation Delay Time vs Load Capacitance MM54C08/MM74C08 TL/F/5878 – 2 AC Test Circuit TL/F/5878 – 3 Note: Delays measured with input tr, tf e 20 ns Switching Time Waveforms TL/F/5878 – 4 3 MM54C08/MM74C08 Quad 2-Input AND Gate Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C08J or MM74C08J NS Package Number J14A Molded Dual-In-Line Package (N) Order Number MM54C08N or MM74C08N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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