ETC IRPT2062

PD 6.123
IRPT2062
PRELIMINARY
IRPT2062
™
Integrated Power Stage for 3 hp Motor Drives
· 3 hp (2.2 kW) power output
Industrial rating at 150% overload for 1 minute
· 380 - 480V AC input, 50/60Hz
· Available as complete system or sub-system assemblies
Power Module
·
·
·
·
·
·
·
·
3-phase rectifier bridge
3-phase, short circuit rated, ultrafast IGBT inverter
Brake IGBT and diode
Low inductance (current sense) shunts in positive and
negative DC rail
NTC temperature sensor
Pin-to-base plate isolation 2500V rms
Easy-to-mount two-screw package
Case temperature range -25°C to 125°C operational
Driver-Plus Board
·
·
·
·
·
·
·
DC bus capacitor filter with NTC inrush current limiter
IR2233 monolithic 3-phase HVIC driver
Driver stage for brake transistor
On-board +15V and +5V power supply
MOV surge suppression at input
DC bus voltage and current feedback
Protection for short-circuit, earth/ground fault,
overtemperature and overvoltage
· Terminal blocks for 3-phase input/output and brake
connections
IRPT2062C
Figure 1. The IRPT2062C
control system
within a motor
page 1
IRPT2062
System Description
The IRPT2062C
provides the complete
power conversion function for a 3hp (2.2kW) variable-frequency,
variable-voltage, AC motor controller. The
combines a power assembly IRPT2051A with a Driver-Plus
Board IRPT2051D. Figure 1 shows the block diagram of the
within an AC motor control system.
The power module contains a 3-phase input bridge rectifier,
3-phase IGBT and diode, 3-phase IGBT inverter, current sense
shunts, and a thermistor. It is designed for each mounting to a
heat sink.
The Driver-Plus Board contains DC link capacitors, capacitor
soft charge function using NTC thermistor, surge suppression
MOVs, IGBT gate drivers, DC bus voltage and current feedback
signals, protection circuitry and local power supply. It is
designed to mate with a controller board through a single row
header. Terminal blocks are also provided on the Driver-Plus
Board for all end-user line input, motor output, and brake
resistor.
Output power is Pulse-Width Modulated (PWM), 3-phase,
variable-frequency, variable voltage controlled by an externallygenerated user-provided PWM controller for inverter IGBT
switching. The power supply offers the user non-isolated 5V and
15V to power the microcontroller.
The IRPT2062C offers several benefits to the drive
manufacturer as listed below:
• It eliminates component selection, design layout,
interconnection, gate drive, local power supply, thermal
sensing, current sensing, and protection.
• Gate drive and protection circuits are designed to closely
match the operating characteristics of the power
semiconductors. This allows power losses to be minimized
and power rating to be maximized to a greater extent than
is possible by designing with individual components.
• It reduces the effort of calculating and evaluating power
semiconductor losses and junction temperature.
• It reduces the manufacturer's part inventory and simplifies
assembly.
[
specifications and ratings are given for
system input and output voltage and current, power losses and
heat sink requirements over a range of operating conditions.
system ratings are verified by IR in final
testing.]
page 2
The IRPT2062A Power Module
The IRPT2062A power module, shown in figure 2, is a chip
and wire epoxy-encapsulated module. It houses input rectifiers,
brake IGBT and freewheeling diode, output inverter, current
sense shunts and NTC thermistor. The 3-phase input bridge
rectifiers are rated at 1600V. The brake circuit uses 1200V
IGBT and free-wheeling diode. The inverter section employs
1200V, short circuit rated, ultrafast IGBTs and ultrafast
freewheeling diodes. Current sensing is achieved through
25 mΩ low-inductance shunts provided in the positive and
negative DC bus rail. The NTC thermistor provides
temperature sensing capability. The lead spacing on the power
modulemeets UL840 pollution level 3 requirements.
Figure 2. IRPT2062A Power Module
The power circuit and layout within the module are carefully
designed to minimize inductance in the power path, to reduce
noise during inverter operation and to improve the inverter
efficiency. The Driver-Plus Board required to run the inverter
can be soldered to the power module pins, thus minimizing
assembly and alignment. The power module is designed to be
mounted to a heat sink with two screw mount positions, in order
to insure good thermal contact between the module substrate and
the heat sink.
IRPT2062
The IRPT2062D Driver-Plus Board
The Driver-Plus Board, shown in figure 3, is the interface
between the controller and the power stage. It contains the IGBT
gate drivers, protection circuitry, feedback, brake drive and local
power supply. The driver also interfaces to the AC input line. It
houses the DC link capacitors, NTC in-rush limiting thermistor,
and surge suppression MOVs.
The inverter gate drive circuits, implemented with an
IR2233 monolithic 3-phase HVIC driver, deliverrs gate drive to
the IGBTs corresponding to PWM control signals IN1 through
IN6. it introduces a 0.2 µsec dead time between upper and lower
gate signals for each phase. Any additional dead time necessary
tmust be included in the PWM signals. After a fault condition
all inverter gate drivers are disabled and latched. The FAULT
pin is also pulled low through an open drain which illuminates a
red LED. Gate drives must be enabled with an active low pulse
applied to the RESET pin while PWM inputs IN1,...IN6 are held
high (off condition). The FAULT condition can also be set by
the controller through an active high signal on the STOP pin.
After power-up, the RESET pin must be pulled low before any
input signals are activated.
The protection circuitry will set a FAULT for short-circuit,
earth-fault, over-temperature, or over-voltage conditions as
specified. Current signals are sensed through shunts in positive
and negative DC bus rails. Earth faults are sensed using the
high-side shunt and the signal is fed through an opto-isolator to
the protection circuitry. Over-voltage is sensed through a
resistor divider from the positive DC bus. Over-temperature
protection is obtained using a thermistor inside the power
module. A FAULT condition occurs inf the temperature of the
power module's IMS substrate exceeds the trip level. The
system is designed for 150% overload for one minute while
operating with the specified heat sinks. The controller should
shut off the PWM signals if the overload persists for more than
one minute.
The feedback signals used by the protection circuitry are also
available to the controller. The current feedback signal from the
low-side shunt is available on the IFB pin at 0.025 V/A. If
filtering of this signal is required, it should be done by adding a
high-impedance buffer stage between signal and filter. The DC
bus reference is provided on VFB. This reference has been
scaled down by a factor of 100 and should also be protected with
a high-impedance buffer stage.
The brake function is implemented by connecting a power
resistor between the terminals on the Brake terminal block. The
value and power of theresistor determines maximum braking
capability along with the rating of the brake IGBT. The input
signal on IN7 is active low and CMOS or LSTTL compatible.
The switching power supply employs an IR2152 selfoscillating driver chip in a buck regulator topology to deliver a
nominal 15V and 5V DC with respect to the negative bus (N).
The power supply feeds the gate drive and protection circuits.
The 15V (VCC) and 5V (VDD) outputs are available on the
control interface for powering the user's control logic.
Figure 3. IRPT2062D Driver-Plus Board
page 3
IRPT2062
RS1
POWER MODULE
P
Q7
Q1
Q3
Q5
Q2
Q4
Q6
RT
RS2
R S T
N
RP P G7 IS4
IS3 BR IS1 IS2 G1 E1 G2 E2
G3 E3 G4 E4
G5 E5 G6 E6
U V W RT1 RT2
R S T
N RP P G7 IS4
IS3 BR IS1 IS2 G1 E1 G2 E2
G3 E3 G4 E4
G5 E5 G6 E6
U V W RT1 RT2
NTC
VCC
BRAKE
DRIVER
OPTO
ISOLATOR
DC
BUS
LINK
SC
EF OT
OV PROTECTION
P REF
TRIP
Vcc
IR2233J
MOS GATE DRIVER
SWITCHING
POWER
SUPPLY
1 2 3
J1 R S T
3φ OUTPUT
1 2
J5 P BR
1
2
3 14 13 12 10
11
4
5 6
V DD V CC
+5 +15
N RESET VFB IFB IN7
8
9 15
FAULT IN1 IN2 IN3 IN4 IN5 IN6 STOP
Driver- Plus Board
Figure 4. IRPT2062C Basic Architecture
page 4
7
J6
U V W J7
3φ OUTPUT
IRPT2062
Specifications
PARAMETERS
Input Power
VALUES
Voltage
Frequency
Input current
380V, -15%, 480V +10%
50/60 Hz
8.26A rms @ nominal output
125 A peak
CONDITIONS
TA = 40°C, RthSA = 0.69°C/W
Initial bus capacitor charging
Output Power
Voltage
Nominal motor hp (kW)
Nominal motor current
0 - 480V rms
3hp (2.2 kW) nominal full load power
150% overload for 1 minute
5.90A rms nominal full load current
8.85A rms 150% overload for 1 minute
defined by external PWM control
RthSA = 0.69°C/W,
V in = 460V AC, fPWM = 4kHz,
fo = 60 Hz, TA = 40°C,
ZthSA limits ∆Tc to 10°C during overload
Control Inputs
IN1...IN6, (PWM), IN7 (Brake),
RESET
STOP
Pulse deadtime
Minimum input pulse width
5V maximum, active low
5V maximum, active high
0.2 µsec typical, set by IR2233
1.0 µsec
CMOS, LSTTL compatible,
open collector
CMOS or LSTTL compatible
maximum set by controller
Protection
Output current trip level
Earth fault current trip level
Overtemperature trip level
Overvoltage trip level
Maximum DC link voltage
Short circuit shutdown time
28A peak, ±10%
50A, ± 10%
100°C, ±5%
850V, ± 10%
760V
2.5 µsec typical
TC = 25°C
TC = 25°C
Case temperature
user to ensure rating not exceeded >30 sec
output terminals shorted
Feedback Signals
Current feedback (IFB)
DC bus voltage feedback (VFB)
Fault feedback (FAULT)
0.025V/ABUS typical
0.010V/VBUS typical
5V maximum, active low
TC = 25°C
TC = 25°C
CMOS or LSTTL compatible
On Board Power Supply
VCC
VDD
ICC + IDD
15V, ±10%
5V, ± 5%
60 mA
available to user
Brake
Current
10.5A
Module
Isolation voltage
Operating case temperature
Mounting torque
2500V rms
-25°C to 125°C
1 N-m
pin-to-baseplate isolation, 60 Hz, 1 minute
95% RH max. (non-condensing)
M4 screw type
System Environment
Ambient operating temp. range
Storage temperature range
0 to 40°C
-25 to 60°C
95% RH max. (non-condensing)
page 5
IRPT2062
1.2
300
1
250
RthSA 100% load
(continuous)
10-60 Hz
0.8
200
0.6
150
Power
150%
0.4
100
0.2
Total Power Dissipation (Watt)
Thermal Resistance(RthSA°C/W)
3 hp
(2.2kW)
50
Power
100%
RthSA 150% load
(1 min.)
down to 3 Hz
RthSA 150% load
(1 min.)10-60 Hz
0
0
1
4
8
12
16
20
24
PWM Frequency (kHz) – (Induction Motor Load)
Figure 5a. 3 hp/5.9A Output Heat Sink Thermal Resistance and Power Dissipation vs. PWM Frequency
180
Thermal Resistance (RthSA°C/W)
2 hp
(1.5kW)
RthSA 100% load
(continuous)
10-60 Hz
1.6
1.4
160
140
1.2
120
1
100
0.8
80
Power
150%
0.6
Total Power Dissipation (Watts)
1.8
60
0.4
40
0.2
Power
100%
RthSA 150% load
(1 min.)
down to 3 Hz
RthSA 150% load
(1 min.)10-60 Hz
0
20
0
1
4
8
12
16
20
24
PWM Frequency (kHz) – (Induction Motor Load)
Figure 5b. 2 hp/4.2A Output Heat Sink Thermal Resistance and Power Dissipation vs. PWM Frequency
NOTE: For Figures 5a and 5b: Operating Conditions: Vin = 460Vrms MI = 1.15, PF = 0.8, TA = 40°C, Tj < 145°C, Ts < 95°C, ZthSA limits ∆Tc
during 1 minute overload to 10°C
page 6
IRPT2062
Mounting, Hookup and Application Instructions
Mounting
Power Connections
1. Remove all particles and grit from the heat sink and power
substrate.
2. Spread a .004" to .005" layer of silicone grease on the heat
sink, covering the entire area that the power substrate will
occupy. Recommended heat sink flatness is .001 inch/inch and
Total Indicator Readout (TIR) of .003" below substrate.
3. Place the power substrate onto the heat sink with the
mounting holes aligned and press it firmly into the silicone
grease.
4. Place the 2 M4 mounting screws through the PCB and
power module and into the heat sink and tighten the screws to
1 Nm torque.
3-phase input connections are made to terminals R, S and T (J1).
Inverter output terminal connections are made to terminals U, V
and W (J7).
Positive DC bus and Brake IGBT collector connections are
brought out to terminals P (positive) and BR (brake) of J5
connector. An external resistor for braking can be connected
across these terminals.
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1
2
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Figure 6. Power Module Mounting Screw Sequence
Control Connections
Power-Up Procedure
When 3-phase input power is first switched on, PWM inputs to
the IRPT2062 must be inhibited (held high) until the protection
latch circuitry is reset. To reset this latch before inverter startup, RESET pin on J6 connector must be pulled down low for at
least 2 µsec. This will set the FAULT feedback signal high.
Now, the PWM input signals can be applied for inverter start-up.
Power-Down Procedure
The following sequence is recommended for normal power
down:
1. reduce motor speed by PWM control
2. inhibit PWM inputs
3. disconnect main power.
All input and output connections are made via a 16-terminal
female connector to J6.
Figure 7a. Control Signal Connector
Figure 7b. Input and Output Terminal Blocks
page 7
IRPT2062
IRPT2062D Mechnical Specifications
NOTE: Dimensions are in inches (millimeters)
6.900 [175.26]
3.420 [86.82]
.500 [12.7]
PCB
HEATSINK
PIN #1
MODULE
J6
CAPACITOR
2.500 [64.77]
15X.100 [2.54]
CAPACITOR
1
2
3
1
2
1
2
J1
J5
J7
J1
J5
J7
3
4XØ 1.400 [35.56]
1.500 [38.1]
2.050 [52.07]
MAX.
MODULE
FAN
page 8
HEATSINK
.500 [12.7]
4.650 [118.11]
CAPACITOR
3.400 [86.36]
CAPACITOR
IRPT2062
IRPT2062A Mechnical Specifications
NOTE: Dimensions are in inches (millimeters)
31X
3.215
.032 [0.81]
.650
.020 [0.51]
[16.51]
N/C
G5
E5
G3
E3
RT1
RT2
THICKNESS
G1
E1
RP
P
IS1
IS2
N
R
[81.66]
2.105
2.040 [51.82]
1.662
W
G4
E4
G6
E6
N/C
U
V
G7
IS4
IS3
G2
E2
BR
T
[42.21]
S
.307
[7.80]
.507
[12.87]
HATCHED SURFACE
E
ALL PIN COORDINATE DIMENSIONS ARE BASIC
1.450 [36.83]
1.550 [39.37]
1.350 [34.29]
.750 [19.05]
.850 [21.59]
.450 [11.43]
.350 [ 8.89]
.050 [ 1.27]
.050 [ 1.27]
.450 [11.43]
.350 [ 8.89]
.650 [16.51]
.550 [13.97]
2X Ø .104
± .002
[2.64 ± 0.05]
1.250 [31.75]
1.550 [39.37]
3.420 [86.87]
MINUS DRAFT X .400
Ø .010
S
1.020 [25.91]
A B-C
PIN CENTER
G
.187 [4.75]
.175 [4.45]
2X
B
C
.800 [20.32]
.000 [ 0.00]
.400 [10.16]
2X R .250 [6.35]
4X Ø .260 [6.60]
PIN CENTER
1.150 [29.21]
1.250 [31.75]
.950 [24.13]
1.050 [26.67]
.550 [13.97]
.000 [ 0.00]
.250 [ 6.35]
.250 [ 6.35]
.150 [ 3.81]
.950 [24.13]
1.450 [36.83]
1.020 [25.91]
1.750 [44.45]
[53.47]
F
HATCHED SURFACE
3.854
[97.89]
PIN DIAGONAL
.037 - .034
[.940 - .864]
31X
Ø .019
M
E-F
Ø .010
M
E-F
G B-C
31X ( .026 - .024)
31X .050 [1.27]
HATCHED SURFACE
F
E
HATCHED SURFACE
MOUNTING SURFACE IN CLAMPED CONDITION
A
page 9
IRPT2062
Part Number Identification and Ordering Instructions
IRPT2062A Power Assembly
IRPT2062D Driver-Plus Board
Chip and wire epoxy encapsulated module with 1600V input
rectifiers, 1200V brake IGBT and freewheeling diode, 1200V
short-circuit rated, ultra-fast IGBT inverter with ultra-fast
freewheeling diodes, temperatures sensing NTC thermistor and
current sensing low-inductance shunts.
Printed circuit board assembled with DC link capacitors, NTC
in-rush limiting thermistor, high-power terminal blocks, surge
suppression MOVs, IGBT gate drivers, protection circuitry and
low power supply. The PCB is functionally tested with standard
power module to meet all system specifications.
IRPT2062C Complete
IRPT2062E Design Kit
IRPT2062A Power Module and IRPT2062D Driver-Plus
Board pre-assembled and tested toeet all system specifications.
Complete
(IRPT2062C) with full set of
design documentation including schematic diagram, bill of
material, mechanical layout, schematic file, Gerber files and
design tips.
page 10
IRPT2062
Functional Information
CAUTION:
All control logic is referenced to the negative power bus,
System Protections
which is live with respect to earth/ground.
Short circuit is monitored through a shunt in the negative
bus, which detects phase-to-phase and phase-to-earth short
circuits (when current flows from earth to negative bus). The
voltage drop across teh shunt is compared to a pre-set limit and
when the current exceeds the rated nominal value, this protection
is activated. The shunt signal is available to the user on the
control interface as IFB. Since this is the same node that is used
by this protection circuit, any external connection should be
done through a high impedance buffer stage.
Earth/ground fault from positive bus to earth is detected to
the shunt in the positive bus and an opto-coupler. When fault
current exceeds the rated nominal value, this protection is
activated.
Over temperature is measured by a thermistor mounted
close to the inverter section in the power module. When the
substrate temperature exceeds the nominal rated temperature,
this protection is activated.
Over voltage is detected by comparing attenuated dc bus
voltage with a pre-set reference. When the bus voltage exceeds
the nominal rated value, this protection is activated. The
attenuated dc bus voltage is available to the user on the control
interface as VFB. Since this is the same node that is compared to
the reference, any external connections should be done through a
high impedance buffer stage.
If any of the protection features are activated, the TRIP signal
goes high activating the internal latch of the IR2233. This turns
off all gate outputs to the inverter and acknowledges the FAULT
to the controller.
Capacitor Soft Charge
A dc bus capacitor is connected to the rectifier bridge output
through an NTC. At power-up, the NTC limits the maximum
inrush current to the rated peak input current, though normal line
impedance will impact the inrush insignificantly. During normal
operation, current through the NTC reduces its resistance, hence
reducing its losses. In the event of a brief power loss, the NTC
will not limit the recharge of the bus because its temperature will
not have time to reduce back to ambient.
System Power Supply
A buck converter designed with the IR2152 self-oscillating
half-bridge driver generates VCC (15V) and VD (5V) for drive
and protection circuits. It draws its power from the midpoint of
the dc bus, which si regulated to half of the voltage. Both VCC
and VD are available at the control connector toupply
microprocessor controls. Rated output current is the sum of ICC
and ID.
Floating power supplies for high side devices are derived
through the bootstrap technique, simplifying power supply
requirements.
Gate Drive Circuits
Gate drive for the inverter is implemented with an IR2233
monolithig 3-phase HVIC driver. An under voltage circuit
monitors the local power supply voltage. It will set the FAULT
and inhibit the PWM output in the event of a low power
condition to protect the IGBTs from excessive power loss due to
low gate drive.
A short circuit buffer power supply counters the voltage drop
across the shunt in the negative dc bus, allowing the device to
have nominal gate voltage during short circuit. This will
maintain the current to a detectable level.
The brake IGBT is generally switched at low frequency, so a
simple bipolar gate drive circuit is used to drive it.
Trip Reset
The FAULT signal can be removed by pulling down the
RESET pin for 2 µs. This should be done only after all inputs,
IN1...IN6, are inactive. The system protections cannot be
disabled by tying this pin to N because the fault logic takes
precedence over the reset.
page 11
IRPT2062
Interface With System Controller
All signals are referred to the negative dc bus (N). IN1...IN7
are TTL/CMOS compatible active low signals. Maximum
voltage rating for these signals is 5V. All channels are provided
with pull-up resistors and can be used with open collector inputs.
FAULT is an open drain, active low signal, provided with a
pull-up and a red LED. Typical current sink capacity for this pin
is 5 mA. This pin should not be directly connected to an npn
transistor base as it would appear to always be in FAULT mode.
VFB and I FB are the scaled down dc bus voltage and bus
current respectively. The on-board protection circuitry use these
signals for sensing fault conditions. Any connection to these
signals should be done through a high impedance buffer stag so
as not to disrupt the protection circuits.
Heat Sink Requirements
Figures 5a and 5b (page 6) show the thermal resistance of the
heat sink required for various output power levels and PWM
switching frequencies. Maximum total losses of the unit are also
shown.
This data assumes the following key operating conditions:
• The maximum continuous combined losses of the rectifier
and inverter occur at full pulse with modulation. These
losses set the maximum continuous operatiing temperature
of the heat sink.
• The maximum combined losses of the rectifier and inverter
at full PWM under overload set the incremental
temperature rise of the heat sink during overload, which is
limited to 10°C due to ZTHSA .
• The minimum output frequency at which full overload
current is to be delivered sets the peak IGB junction
temperatures.
• At low output frequency IGBT junction temperatures tends
to follow the instantaneous fluctuations of the output
current. Thus, peak junction temperature rise increases as
output frequency decreases.
Voltage Rise During Braking
The motor will feed energy back to the DC link during
electric braking, forcing DC bus voltage to rise above the level
defined by input line voltage. Deceleration of the motor must be
controlled by appropriate PWM control to keep the DC bus
voltage within the rated maximum vaue. For high inertial loads,
or for very fast deceleration rates, this can be achieved by the
brake provided in the system by connecting an external braking
resistor between terminals P and BR. IN7 controls the brake
transistor swtiching.
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
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http://www.irf.com/ Data and specifications subject to change without notice.
9/97
page 12