ETC LM4879MM

LM4879
1.1 Watt Audio Power Amplifier
General Description
Key Specifications
The LM4879 is an audio power amplifier primarily designed
for demanding applications in mobile phones and other portable communication device applications. It is capable of
delivering 1.1 watt of continuous average power to an 8Ω
BTL load with less than 1% distortion (THD+N) from a 5VDC
power supply.
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4879 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for lower-power portable applications where
minimal space and power consumption are primary requirements.
The LM4879 features a low-power consumption global shutdown mode, which is achieved by driving the shutdown pin
with logic low. Additionally, the LM4879 features an internal
thermal shutdown protection mechanism.
The LM4879 contains advanced pop & click circuitry which
eliminates noises which would otherwise occur during
turn-on and turn-off transitions.
The LM4879 is unity-gain stable and can be configured by
external gain-setting resistors.
j PSRR at 5V, 3V, & 217Hz
62dB (typ)
j Power Output at 5V & 1% THD
1.1W (typ)
j Power Output at 3V & 1% THD
350mW (typ)
j Shutdown Current
0.1µA (typ)
Features
n No output coupling capacitors, snubber networks or
bootstrap capacitors required
n Unity gain stable
n Ultra low current shutdown mode
n Fast turn on: 80mS (typ), 110mS (max) with 1.0µF
capacitor
n BTL output can drive capacitive loads up to 100pF
n Advanced pop & click circuitry eliminates noises during
turn-on and turn-off transitions
n 2.2V - 5.0V operation
n Available in space-saving µSMD and MSOP packages
Applications
n Mobile Phones
n PDAs
n Portable electronic devices
Typical Application
DS200243-1
FIGURE 1. Typical Audio Amplifier Application Circuit
Boomer ® is a registered trademark of National Semiconductor Corporation.
© 2001 National Semiconductor Corporation
DS200243
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LM4879 1.1 Watt Audio Power Amplifier
November 2001
LM4879
Connection Diagrams
8 Bump micro SMD
DS200243-82
Top View
Order Number LM4879IBP, LM4879IBPX
See NS Package Number BPA08DDB
8 Bump micro SMD Marking
DS200243-83
Top View
X - Date Code
T - Die Traceability
G - Boomer Family
N- LM4879IBP
Mini Small Outline (MSOP) Package
DS200243-84
Top View
NC = No Connect
Order Number LM4879MM
See NS Package Number MUB10A
MSOP Marking
DS200243-85
Top View
G - Boomer Family
79-LM4879MM
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LM4879
Connection Diagrams
(Continued)
9 Bump micro SMD
DS200243-86
Top View
Order Number LM4879IBL, LM4879IBLX
See NS package Number BLA09AAB
9 Bump micro SMD Marking
DS200243-87
Top View
X - Date Code
T - Die Traceability
G - Boomer Family
79 - LM4879IBL
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LM4879
Absolute Maximum Ratings (Note 2)
Thermal Resistance
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (Note 9)
220˚C/W (Note 10)
θJA (BLA09AAB)
180˚C/W (Note 10)
6.0V
Storage Temperature
Input Voltage
θJA (BPA08DDB)
θJC (MUB10A)
56˚C/W
θJA (MUB10A)
190˚C/W
−65˚C to +150˚C
Operating Ratings
−0.3V to VDD +0.3V
Power Dissipation (Note 3)
Internally Limited
ESD Susceptibility (Note 4)
2000V
ESD Susceptibility (Note 5)
200V
Junction Temperature
Temperature Range
TMIN ≤ TA ≤ TMAX
−40˚C ≤ TA ≤ 85˚C
2.2V ≤ VDD ≤ 5.0V
Supply Voltage
150˚C
Electrical Characteristics VDD = 5V
(Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25˚C.
LM4879
Symbol
Parameter
Conditions
Typical
Limit
(Note 6)
(Notes 7, 8)
Units
(Limits)
IDD
Quiescent Power Supply Current
VIN = 0V, 8Ω BTL
5
10
ISD
Shutdown Current
Vshutdown = GND
0.1
2.0
µA (max)
VOS
Output Offset Voltage
5
40
mV (max)
Po
Output Power
1.1
0.9
W (min)
THD+N
Total Harmonic Distortion+Noise
Po = 0.4Wrms; f = 1kHz
PSRR
Power Supply Rejection Ratio
Vripple = 200mVsine p-p, CB =
1.0µF
Input terminated with 10Ω to
ground
THD = 1% (max); f = 1kHz
0.1
mA (max)
%
68 (f =
1kHz)
62 (f =
217Hz)
55
dB (min)
VSDIH
Shutdown High Input Voltage
1.4
V (min)
VSDIL
Shutdown Low Input Voltage
0.4
V (max)
TWU
Wake-up Time
110
ms (max)
NOUT
Output Noise
CB = 1.0µF
80
A-Weighted; Measured across 8Ω
BTL
Input terminated with 10Ω to
ground
26
µVRMS
Electrical Characteristics VDD = 3.0V
(Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25˚C.
LM4879
Symbol
Parameter
Conditions
Typical
Limit
Units
(Limits)
(Note 6)
(Notes 7, 8)
IDD
Quiescent Power Supply Current
VIN = 0V, 8Ω BTL
4.5
9
ISD
Shutdown Current
Vshutdown = GND
0.1
2.0
µA (max)
VOS
Output Offset Voltage
5
40
mV (max)
320
mW
Po
Output Power
THD = 1% (max); f = 1kHz
350
THD+N
Total Harmonic Distortion+Noise
Po = 0.15Wrms; f = 1kHz
0.1
PSRR
Power Supply Rejection Ratio
Vripple = 200mVsine p-p, CB =
1.0µF
Input terminated with 10Ω to
ground
VSDIH
Shutdown High Input Voltage
VSDIL
Shutdown Low Input Voltage
TWU
Wake-up Time
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CB = 1.0µF
4
68 (f =
1kHz)
62 (f =
217Hz)
80
mA (max)
%
55
dB (min)
1.4
V (min)
0.4
V (max)
110
ms (max)
LM4879
Electrical Characteristics VDD = 3.0V
(Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA =
25˚C. (Continued)
LM4879
Symbol
NOUT
Parameter
Output Noise
Conditions
A-Weighted; Measured across 8Ω
BTL
Input terminated with 10Ω to
ground
Typical
Limit
(Note 6)
(Notes 7, 8)
26
Units
(Limits)
µVRMS
Electrical Characteristics VDD = 2.6V
(Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25˚C.
LM4879
Symbol
Parameter
Conditions
Typical
Limit
(Note 6)
(Notes 7, 8)
Units
(Limits)
IDD
Quiescent Power Supply Current
VIN = 0V, 8Ω BTL
3.5
ISD
Shutdown Current
Vshutdown = GND
0.1
µA
VOS
Output Offset Voltage
5
mV
Po
Output Power
mA
THD = 1% (max); f = 1kHz
THD+N
PSRR
RL = 8Ω
250
RL = 4Ω
350
Total Harmonic Distortion+Noise
Po = 0.1Wrms; f = 1kHz
Power Supply Rejection Ratio
Vripple = 200mVsine p-p, CB =
1.0µF
Input terminated with 10Ω to
ground
mW
0.1
%
55 (f =
1kHz)
55 (f =
217Hz)
dB
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum
allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4879, see power derating
curves for additional information.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Machine Model, 220pF–240pF discharged through all pins.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a maximum of 2µA.
Note 9: If the product is in shutdown mode, and VDD exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the ESD protection circuits.
If the source impedance limits the current to a max of 10ma, then the part will be protected. If the part is enabled when VDD is above 6V, circuit performance will
be curtailed or the part may be permanently damaged.
Note 10: All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance.
Note 11: Maximum power dissipation (PDMAX) in the device occurs at an output power level significantly below full output power. PDMAX can be calculated using
Equation 1 shown in the Application section. It may also be obtained from the power dissipation graphs.
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LM4879
External Components Description
Components
(Figure 1)
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a
high pass filter with Ci at fC= 1/(2π RiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a
highpass filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of Ci.
3.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
4.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
5.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
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LM4879
Typical Performance Characteristics
THD+N vs Frequency
at VDD = 5V, 8Ω RL, and PWR = 250mW
THD+N vs Frequency
at VDD = 3.0V, 8Ω RL, and PWR = 150mW
DS200243-37
THD+N vs Frequency
at VDD = 2.6V, 8Ω RL, and PWR = 100mW
DS200243-38
THD+N vs Frequency
at VDD = 2.6V, 4Ω RL, and PWR = 100mW
DS200243-39
THD+N vs Power Out
@ VDD = 5V, 8Ω RL, 1kHz
DS200243-40
THD+N vs Power Out
@ VDD = 3.0V, 8Ω RL, 1kHz
DS200243-41
DS200243-42
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LM4879
Typical Performance Characteristics
(Continued)
THD+N vs Power Out
@ VDD = 2.6V, 8Ω RL, 1kHz
THD+N vs Power Out
@ VDD = 2.6V, 4Ω RL, 1kHz
DS200243-43
Power Supply Rejection Ratio (PSRR) @ VDD = 5V
DS200243-44
Power Supply Rejection Ratio (PSRR) @ VDD = 3V
DS200243-45
DS200243-73
Input terminated with 10Ω R
Power Supply Rejection Ratio (PSRR) @ VDD = 2.6V
Input terminated with 10Ω R
Power Dissipation vs Output Power @ VDD = 5V
DS200243-46
DS200243-47
Input terminated with 10Ω R
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(Continued)
Power Dissipation vs
Output Power
VDD = 3.0V
Power Dissipation vs
Output Power
@ VDD = 2.6V
DS200243-49
Power Derating - MSOP
PDMAX = 670mW for 5V, 8Ω
LM4879
Typical Performance Characteristics
DS200243-48
Power Derating - 8 Bump µSMD
PDMAX = 670mW for 5V, 8Ω
DS200243-79
Power Derating - 9 Bump µSMD
PDMAX = 670mW for 5V, 8Ω
DS200243-80
Output Power vs
Supply Voltage
DS200243-81
DS200243-51
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LM4879
Typical Performance Characteristics
(Continued)
Output Power vs
Supply Voltage
Output Power vs
Load Resistance
DS200243-50
Clipping (Dropout) Voltage vs
Supply Voltage
DS200243-74
Supply Current vs
Shutdown Voltage
DS200243-52
Shutdown Hysterisis Voltage
VDD = 5V
DS200243-75
Shutdown Hysterisis Voltage
VDD = 3V
DS200243-76
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DS200243-77
10
(Continued)
Shutdown Hysterisis Voltage
VDD = 2.6V
Open Loop Frequency Response
DS200243-78
LM4879
Typical Performance Characteristics
DS200243-54
Frequency Response vs
Input Capacitor Size
DS200243-56
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LM4879
duced supply voltage, higher load impedance, or reduced
ambient temperature. Internal power dissipation is a function
of output power. Refer to the Typical Performance Characteristics curves for power dissipation information for different output powers and output loading.
Application Information
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4879 has two operational
amplifiers internally, allowing for a few different amplifier
configurations. The first amplifier’s gain is externally configurable, while the second amplifier is internally fixed in a
unity-gain, inverting configuration. The closed-loop gain of
the first amplifier is set by selecting the ratio of Rf to Ri while
the second amplifier’s gain is fixed by the two internal 20 kΩ
resistors. Figure 1 shows that the output of amplifier one
serves as the input to amplifier two which results in both
amplifiers producing signals identical in magnitude, but out
of phase by 180˚. Consequently, the differential gain for the
IC is
AVD= 2 *(Rf/Ri)
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both the bypass and power supply pins
should be as close to the device as possible. Typical applications employ a 5V regulator with 10 µF tantalum or electrolytic capacitor and a ceramic bypass capacitor which aid
in supply stability. This does not eliminate the need for
bypassing the supply nodes of the LM4879. The selection of
a bypass capacitor, especially CB, is dependent upon PSRR
requirements, click and pop performance (as explained in
the section, Proper Selection of External Components),
system cost, and size constraints.
By driving the load differentially through outputs Vo1 and
Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is
different from the classical single-ended amplifier configuration where one side of the load is connected to ground.
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified
supply voltage. Four times the output power is possible as
compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes
that the amplifier is not current limited or clipped. In order to
choose an amplifier’s closed-loop gain without causing excessive clipping, please refer to the Audio Power Amplifier
Design section.
A bridge configuration, such as the one used in LM4879,
also creates a second advantage over single-ended amplifiers. Since the differential outputs, Vo1 and Vo2, are biased
at half-supply, no net DC voltage exists across the load. This
eliminates the need for an output coupling capacitor which is
required in a single supply, single-ended amplifier configuration. Without an output coupling capacitor, the half-supply
bias across the load would result in both increased internal
IC power dissipation and also possible loudspeaker damage.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the
LM4879 contains a shutdown pin to externally turn off the
amplifier’s bias circuitry. This shutdown feature turns the
amplifier off when a logic low is placed on the shutdown pin.
By switching the shutdown pin to ground, the LM4879 supply
current draw will be minimized in idle mode. While the device
will be disabled with shutdown pin voltages less than
0.4VDC, the idle current may be greater than the typical
value of 0.1µA. (Idle current is measured with the shutdown
pin tied to ground).
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry to provide a
quick, smooth transition into shutdown. Another solution is to
use a single-pole, single-throw switch in conjunction with an
external pull-up resistor. When the switch is closed, the
shutdown pin is connected to ground which disables the
amplifier. If the switch is open, then the external pull-up
resistor to VDD will enable the LM4879. This scheme guarantees that the shutdown pin will not float thus preventing
unwanted state changes.
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Since the LM4879 has two operational amplifiers in one package, the maximum internal
power dissipation is 4 times that of a single-ended amplifier.
The maximum power dissipation for a given application can
be derived from the power dissipation graphs or from Equation 1.
PDMAX = 4*(VDD)2/(2π2RL)
(1)
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical to optimize device
and system performance. While the LM4879 is tolerant of
external component combinations, consideration to component values must be used to maximize overall system quality.
The LM4879 is unity-gain stable which gives the designer
maximum system flexibility. The LM4879 should be used in
low gain configurations to minimize THD+N values, and
maximize the signal to noise ratio. Low gain configurations
require large input signals to obtain a given output power.
Input signals equal to or greater than 1 Vrms are available
from sources such as audio codecs. Please refer to the
section, Audio Power Amplifier Design, for a more complete explanation of proper gain selection.
Besides gain, one of the major considerations is the closedloop bandwidth of the amplifier. To a large extent, the bandwidth is dictated by the choice of external components
shown in Figure 1. The input coupling capacitor, Ci, forms a
first order high pass filter which limits low frequency response. This value should be chosen based on needed
frequency response for a few distinct reasons.
It is critical that the maximum junction temperature (TJMAX)
of 150˚C is not exceeded. TJMAX can be determined from the
power derating curves by using PDMAX and the PC board foil
area. By adding additional copper foil, the thermal resistance
of the application can be reduced from a free air value of
150˚C/W, resulting in higher PDMAX. Additional copper foil
can be added to any of the leads connected to the LM4879.
It is especially effective when connected to VDD, GND, and
the output pins. Refer to the application information on the
LM4879 reference design board for an example of good heat
sinking. If TJMAX still exceeds 150˚C, then additional
changes must be made. These changes can include rewww.national.com
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A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Performance Characteristics section, the supply rail can be
easily found. A second way to determine the minimum supply rail is to calculate the required Vopeak using Equation 2
and add the output voltage. Using this method, the minimum
supply voltage would be (Vopeak + (VODTOP + VODBOT)), where
VODBOT and VODTOP are extrapolated from the Dropout Voltage vs Supply Voltage curve in the Typical Performance
Characteristics section.
(Continued)
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenuation. But in many cases the speakers used in portable
systems, whether internal or external, have little ability to
reproduce signals below 100 Hz to 150 Hz. Thus, using a
large input capacitor may not increase actual system performance.
In addition to system cost and size, click and pop performance is effected by the size of the input coupling capacitor,
Ci. A larger input coupling capacitor requires more charge to
reach its quiescent DC voltage (nominally 1/2 VDD). This
charge comes from the output via the feedback and is apt to
create pops upon device enable. Thus, by minimizing the
capacitor size based on necessary low frequency response,
turn-on pops can be minimized.
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize
turn-on pops since it determines how fast the LM4879 turns
on. The slower the LM4879’s outputs ramp to their quiescent
DC voltage (nominally 1/2 VDD), the smaller the turn-on pop.
Choosing CB equal to 1.0 µF along with a small value of Ci
(in the range of 0.1 µF to 0.39 µF), should produce a virtually
clickless and popless shutdown function. While the device
will function properly, (no oscillations or motorboating), with
CB equal to 0.1 µF, the device will be much more susceptible
to turn-on clicks and pops. Thus, a value of CB equal to
1.0 µF is recommended in all but the most cost sensitive
designs.
(2)
5V is a standard voltage, in most applications, chosen for the
supply rail. Extra supply voltage creates headroom that allows the LM4879 to reproduce peaks in excess of 1W without producing audible distortion. At this time, the designer
must make sure that the power supply choice along with the
output impedance does not violate the conditions explained
in the Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equation 3.
(3)
AVD = (Rf/Ri) 2
From Equation 3, the minimum AVD is 2.83; use AVD = 3.
Since the desired input impedance was 20 kΩ, and with a
AVD of 3, a ratio of 1.5:1 of Rf to Ri results in an allocation of
Ri = 20 kΩ and Rf = 30 kΩ. The final design step is to
address the bandwidth requirements which must be stated
as a pair of −3 dB frequency points. Five times away from a
−3 dB point is 0.17 dB down from passband response which
is better than the required ± 0.25 dB specified.
fL = 100 Hz/5 = 20 Hz
AUDIO POWER AMPLIFIER DESIGN
A 1W/8Ω AUDIO AMPLIFIER
fH = 20 kHz * 5 = 100 kHz
As stated in the External Components section, Ri in conjunction with Ci create a highpass filter.
Ci ≥ 1/(2π*20 kΩ*20 Hz) = 0.397 µF; use 0.39 µF
Given:
Power Output
Load Impedance
Input Level
Input Impedance
Bandwidth
1 Wrms
8Ω
1 Vrms
The high frequency pole is determined by the product of the
desired frequency pole, fH, and the differential gain, AVD.
With a AVD = 3 and fH = 100 kHz, the resulting GBWP =
300 kHz which is much smaller than the LM4879 GBWP of
10 MHz. This figure displays that if a designer has a need to
design an amplifier with a higher differential gain, the
LM4879 can still be used without running into bandwidth
limitations.
20 kΩ
100 Hz–20 kHz ± 0.25 dB
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LM4879
Application Information
LM4879
Application Information
(Continued)
HIGHER GAIN AUDIO AMPLIFIER
DS200243-88
Figure 2
taken when calculating the -3dB frequency in that an incorrect combination of R3 and C4 will cause rolloff before
20kHz. A typical combination of feedback resistor and capacitor that will not produce audio band high frequency rolloff
is R3 = 20kΩ and C4 = 25pf. These components result in a
-3dB point of approximately 320 kHz.
The LM4879 is unity-gain stable and requires no external
components besides gain-setting resistors, an input coupling
capacitor, and proper supply bypassing in the typical application. However, if a closed-loop differential gain of greater
than 10 is required, a feedback capacitor (C4) may be
needed as shown in Figure 2 to bandwidth limit the amplifier.
This feedback capacitor creates a low pass filter that eliminates possible high frequency oscillations. Care should be
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LM4879
Application Information
(Continued)
DIFFERENTIAL AMPLIFIER CONFIGURATION FOR LM4879
DS200243-89
Figure 3
15
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LM4879
Application Information
(Continued)
REFERENCE DESIGN BOARD and LAYOUT - micro SMD
DS200243-90
Figure 4
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LM4879
Application Information
(Continued)
LM4879 micro SMD BOARD ARTWORK
Top Layer
Silk Screen
DS200243-57
DS200243-58
Inner Layer Ground
Bottom Layer
DS200243-59
DS200243-60
Inner Layer VDD
DS200243-61
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LM4879
Application Information
(Continued)
REFERENCE DESIGN BOARD and PCB LAYOUT GUIDELINES - MSOP & SO Boards
DS200243-68
Figure 5
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LM4879
Application Information
(Continued)
LM4879 MSOP DEMO BOARD ARTWORK
Top Layer
Silk Screen
DS200243-65
DS200243-66
Bottom Layer
DS200243-67
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LM4879
Application Information
(Continued)
Mono LM4879 Reference Design Boards
Bill of Material for all 3 Demo Boards
Item
Part Number
Part Description
Qty
Ref Designator
1
551011208-001 LM4879 Mono Reference Design Board
1
10
482911183-001
LM4879 Audio AMP
1
U1
20
151911207-001
Tant Cap 1uF 16V 10
1
C1
21
151911207-002
Cer Cap 0.39uF 50V Z5U 20% 1210
1
C2
25
152911207-001
Tant Cap 1.0uF 16V 10
1
C3
30
472911207-001
Res 20K Ohm 1/10W 5
3
R1, R2, R3
35
210007039-002
Jumper Header Vertical Mount 2X1
0.100
2
J1, J2
Single-Point Power / Ground Connections
The analog power traces should be connected to the digital
traces through a single point (link). A ’Pi-filter’ can be helpful
in minimizing high frequency noise coupling between the
analog and digital sections. It is further recommended to put
digital and analog power traces over the corresponding digital and analog ground traces to minimize noise coupling.
PCB LAYOUT GUIDELINES
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
’rule-of-thumb’ recommendations and the actual results will
depend heavily on the final layout.
General Mixed Signal Layout Recommendation
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces
should be located as far away as possible from analog
components and circuit traces.
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bringing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a
major impact on low level signal performance. Star trace
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique will
take require a greater amount of design time but will not
increase the final price of the board. The only extra parts
required may be some jumpers.
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Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and cross talk.
20
LM4879
Physical Dimensions
inches (millimeters) unless otherwise noted
Note: Unless otherwise specified.
1.
2.
3.
4.
5.
Epoxy coating.
63Sn/37Pb eutectic bump.
Recommend non-solder mask defined landing pad.
Pin 1 is established by lower left corner with respect to text orientation pins are numbered counterclockwise.
Reference JEDEC registration MO-211, variation BC.
8-Bump micro SMD
Order Number LM4879IBP, LM4879IBPX
NS Package Number BPA08DDB
X1 = 1.361 ± 0.03 X2 = 1.361 ± 0.03 X3 = 0.850 ± 0.1
21
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LM4879
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Note: Unless otherwise specified.
1.
2.
3.
4.
5.
Epoxy coating.
63Sn/37Pb eutectic bump.
Recommend non-solder mask defined landing pad.
Pin 1 is established by lower left corner with respect to text orientation pins are numbered counterclockwise.
Reference JEDEC registration MO-211, variation BC.
9-Bump micro SMD
Order Number LM4879IBL
NS Package Number BLA09AAB
X1 = 1.514 ± 0.03 X2 = 1.514 ± 0.03 X3 = 0.945 ± 0.1
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22
LM4879 1.1 Watt Audio Power Amplifier
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
MSOP
Order Number LM4879MM
NS Package Number MUB10A
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