ETC NRF904

APPLICATION NOTE
nRF904 RF and antenna layout
Q$1
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Gerber files for RF layouts have been made for Nordic VLSI’s Q5) Single Chip
915MHz RF Transmitter [1]. A loop antenna for 915MHz has also been made
available.
The Gerber files for each layout are compressed into the Zip archive format. The Zip
archive files includes a file named UHDGPHZUL that must be read before importing the
Gerber files into the PCB editor.
All described layouts should be fabricated on standard 1.6mm double-sided FR4
printed circuit board.
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The RF layouts include all necessary circuitry to design the radio frequency part of a
short range communication system based on Q5). The transmitter data and
control lines DIN, XO8, PWR_DOWN, and CLOCK/ASK, are available at the
perimeter of the RF layout and should be connected to the digital part of a customer’s
application. +3V and GND are also available at the perimeter of the RF layout. The
+3V for the RF part of the application circuit should be filtered separately from the
supply voltages of any digital circuitry. Star routing is strictly recommended from the
+3V supply source to the RF, digital or other parts of the application circuit.
All RF layouts presented below are equal except for the antenna connection circuitry.
Solutions for differential connection to loop antenna and single ended connection to
50Ω antenna are presented.
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Figure 1 shows the schematics for RF layout with differential connection to a loop
antenna. The PCB layout is shown in Figure 2. The loop antenna layout described in
chapter 3 can easily be placed together with this RF layout. The connection points
numbered 1, 2 and 3 on the loop antenna layout must be connected exactly to the
corresponding connection points numbered 1, 2 and 3 on the RF layout.
The Gerber files Zip archive filename is 3&%BQ5)BGLII]LS.
The recommended external components are as given in Table 1.
Nordic VLSI ASA
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Phone +47 72 89 89 00
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November 2001
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
&RPSRQHQW
C1
C2
C3
C4
C5
C6
C7
R1
R2
R3
R4
R5
X1
'HVFULSWLRQ
NP0 ceramic chip capacitor
(REXT pin decoupling)
X7R ceramic chip capacitor
(REXT pin decoupling)
X7R ceramic chip capacitor
(Supply decoupling)
NP0 ceramic chip capacitor
(Supply decoupling)
NP0 ceramic chip capacitor
(Supply decoupling)
Tantalum chip capacitor
(Supply decoupling)
X7R ceramic chip capacitor
(Data bit stream filter)
0.1W chip resistor
(Crystal oscillator bias)
0.1W chip resistor
(Transmitter power setting)
0.1W chip resistor
(XO8 output level setting)
0.1W chip resistor
(Data bit stream filter/Frequency deviation setting)
0.1W chip resistor
(Data bit stream filter/Frequency deviation setting)
Crystal
6L]H
9DOXH
0603
33
7ROHUDQFH
pF
0603
4.7
nF
0603
4.7
nF
0603
33
pF
0603
33
pF
3216
4.7
µF
0603
680
pF
0603
150
kΩ
0603
47 1)
kΩ
0603
15 2)
kΩ
0603
22 3)
kΩ
0603
3.9 4)
kΩ
-
14.2992
5)
Table 1 Recommended External Components.
1), 2), 3), 4), 5)
See [1].
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Figure 3 shows the schematics for RF layout with single ended connection to 50Ω
antenna by using a differential to single ended matching network. The PCB layout is
shown in Figure 4.
The antenna connection point should be as close as possible to the output of the
matching network. If this is not possible of practical reasons, the PCB track between
the output of the matching network and the antenna connection should be carried out
as a 50Ω microstrip line. In such a case, the length of the microstrip line is limited to a
few centimetres. For a standard FR4 printed circuit board with 1.54mm substrate
thickness and relative dielectric constant εr ≈ 4.25 at 915MHz, the width of the
microstrip line should be 3mm.
The Gerber files Zip archive filename is 3&%BQ5)BVLQJOHBQHWZ]LS.
The recommended external components are as given in Table 1, with addition of the
components in the differential to single ended matching network as given in Table 2.
Nordic VLSI ASA
Revision: 1.1
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Vestre Rosten 81, N-7075 Tiller, Norway
3DJHRI
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Phone +47 72 89 89 00
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Fax +47 72 89 89 89
November 2001
8QLWV
MHz
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
&RPSRQHQW
C8
C9
R6
L1
L2
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NP0 ceramic chip capacitor
(Impedance matching)
NP0 ceramic chip capacitor
(Impedance matching)
0.1W chip resistor
(Impedance matching)
Chip inductor, SRF>915 MHz 6)
(Impedance matching)
Chip inductor, SRF>915 MHz 7)
(Impedance matching)
6L]H
9DOXH
7ROHUDQFH
8QLWV
0603
3.3
<±0.1
pF
0603
3.3
<±0.1
pF
0603
1
0603
68
±5%
nH
0603
15
±2%
nH
kΩ
Table 2 Recommended components in the differential to single ended matching
network
6), 7)
See [1].
Nordic VLSI ASA
Revision: 1.1
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Vestre Rosten 81, N-7075 Tiller, Norway
3DJHRI
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Phone +47 72 89 89 00
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Fax +47 72 89 89 89
November 2001
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
aaaaaaaa
VDD
+ C6
4.7uF
3216
R1
150k
0603
PWR_DOWN
aaaaaaaa
CLOCK/ASK
R2
47K
0603
DIN
C2
4.7nF
0603
C3
4.7nF
0603
R5
3.9K
R4
22K
0603
0603
Loop antenna
connection
U1
1
2
3
4
XO8
C1
33pF
0603
X1
14.2992MHz
R3
15K
0603
C4
33pF
0603
XTAL
REXT
XO8
VDD
VSS
ANT1
ANT2
DIN
8
7
6
5
1
3
2
C5
33pF aaaaaaaa
0603
nRF904
915MHz Single chip RF Transmitter
SOIC 8
C7
680pF
0603
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Figure 1. Schematics for RF layout with differential connection to a loop antenna
Top silk screen
Bottom silk screen
Top view
Bottom view
Figure 2. RF layout with differential connection to a loop antenna
Nordic VLSI ASA
Revision: 1.1
-
Vestre Rosten 81, N-7075 Tiller, Norway
3DJHRI
-
Phone +47 72 89 89 00
-
Fax +47 72 89 89 89
November 2001
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
aaaaaaaa
VDD
VDD
+ C6
4.7uF
3216
C5
33pF
0603
R1
150k
0603
R6
1K
0603
PWR_DOWN
CLOCK/ASK
DIN
C2
4.7nF
0603
C3
4.7nF
0603
R5
3.9K
R4
22K
0603
0603
C8
RF out 50 ohm
xxxxxx
U1
1
2
3
4
XO8
C1
33pF
0603
X1
14.2992MHz
R3
15K
0603
R2
47K
0603
aaaaaaaa
L1
68nH
0603
XTAL
REXT
XO8
VDD
8
7
6
5
VSS
ANT1
ANT2
DIN
L2
15nH
0603
3.3pF
0603
C9
nRF904
915MHz Single chip RF Transmitter
C4
SOIC 8
33pF
0603
3.3pF
0603
C7
680pF
0603
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Figure 3. Schematics for RF layout with single ended connection to 50Ω antenna
by using a differential to single ended matching network
Top silk screen
Bottom silk screen
Top view
Bottom view
Figure 4. RF layout with single ended connection to 50Ω antenna by using a
differential to single ended matching network
Nordic VLSI ASA
Revision: 1.1
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Vestre Rosten 81, N-7075 Tiller, Norway
3DJHRI
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Phone +47 72 89 89 00
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Fax +47 72 89 89 89
November 2001
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
/RRSDQWHQQDOD\RXWV
A loop antenna with T-match [2] is a good solution for low cost and small size radio
modules. A layout solution for a small rectangular loop antenna is described below.
Figure 5 shows the basic geometry of the designed rectangular loop antenna.
a1
C1
C2
C3
RQ
a2
d/2
d/2
3
1
2
Figure 5. Geometry of rectangular loop antenna
The loop antenna physical parameters are
D = loop antenna length [mm]
D = loop antenna width [mm]
G = feed length [mm]
E= width of loop conductor
The antenna is tuned to a resonance frequency of 915MHz with chip capacitors &
& and &.
To keep the variations in antenna gain due to capacitor variations lower than 3dB and
thus achieve reproducible values of antenna gain in mass production, the total tuning
capacitance tolerance should not exceed 5% (that is, ±2.5%). According to [2], the
antenna should then be designed for a Q-value of about 40.
For the designed loop antenna, capacitors && and & should have tolerances equal
to or better than ±0.1pF. The resistor 54 controls the 4-value of the antenna. The loop
antenna is tuned to approximately 300Ω with a T-match. The width of the loop
conductor is 1.524mm (60mil). There is no ground plane beneath the antenna.
Table 3 shows a summary of the designed loop antenna.
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>[email protected]
9.5x9.5
13
&
9DOXH
7ROHUDQFH
>S)@
>S)@
3.3
±0.1
&
9DOXH
7ROHUDQFH
>S)@
>S)@
3.9
&
9DOXH
7ROHUDQFH
>S)@
>S)@
±0.1
6.8
±0.1
54
>N:@
4
YDOXH
=R
>:@
18
40
300
Table 3 Summary of the loop antenna
8)
Thick film chip resistor with resistance tolerance 5% or better.
Nordic VLSI ASA
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Vestre Rosten 81, N-7075 Tiller, Norway
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Phone +47 72 89 89 00
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Fax +47 72 89 89 89
November 2001
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
The component values given in Table 3 are only valid when the connection points
numbered 1, 2 and 3 on the loop antenna layout, as shown in Figure 6, are connected
exactly to the corresponding connection points numbered 1, 2 and 3 on the RF layout
with differential loop antenna connection. The component footprints used in the loop
antenna layout are size 0603.
The layout of the rest of the communication system may influence the antenna tuning
and require measurement of the antenna together with the complete system in order to
find the values for C1, C2, C3 and RQ for your system.
Figure 6. Loop antenna PCB layout (not actual size)
It is recommended that a system should not be designed with a longer communication
range than the application requires. Estimations on communication range with the
antenna presented in this application note and a receiver with a given sensitivity and
antenna gain, can be made based on the theory given in [2]. Initial communication
range tests should be carried out with the lowest RF output power setting that, based
on the estimations, satisfies the range requirements. If the achieved communication
range does not satisfy the requirements, the RF output power should be increased to
the required level.
Table 4 lists the Gerber file Zip archive filename for the antenna layout.
/RRSDQWHQQD
D[D
>[email protected]
*HUEHUILOHV=LSDUFKLYHILOHQDPH
9.5x9.5
Loop_9.5x9.5mm_915MHz.zip
Table 4 Gerber files Zip archive filenames
Measured loop antenna gain relative to λ/4 dipole antenna mounted on a 40x40cm
ground plane is shown in Table 5.
/RRSDQWHQQD
D[D
>[email protected]
*DLQUHODWLYHWROGLSROH
DQWHQQD
>G%@
9.5x9.5
-15
Table 5 Measured loop antenna gain relative to λ/4 dipole antenna
mounted on a 40x40cm ground plane
Nordic VLSI ASA
Revision: 1.1
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Vestre Rosten 81, N-7075 Tiller, Norway
3DJHRI
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Phone +47 72 89 89 00
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Fax +47 72 89 89 89
November 2001
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
5HIHUHQFHV
1. Product SpecificationQ5), “Single Chip 915MHz Transmitter”,
Nordic VLSI ASA.
2. Application note Q$1, “Small loop antennas”,
Nordic VLSI ASA.
Nordic VLSI ASA
Revision: 1.1
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Vestre Rosten 81, N-7075 Tiller, Norway
3DJHRI
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Phone +47 72 89 89 00
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Fax +47 72 89 89 89
November 2001
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
/,$%,/,7<',6&/$,0(5
Nordic VLSI ASA reserves the right to make changes without further notice to the
product to improve reliability, function or design. Nordic VLSI does not assume any
liability arising out of the application or use of any product or circuits described
herein.
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These products are not designed for use in life support appliances, devices, or systems
where malfunction of these products can reasonably be expected to result in personal
injury. Nordic VLSI ASA customers using or selling these products for use in such
applications do so at their own risk and agree to fully indemnify Nordic VLSI ASA
for any damages resulting from such improper use or sale.
Application Note. Revision Date : 08.11.2001.
Application Note order code : 081101-nAN900-03
All rights reserved ®. Reproduction in whole or in part is prohibited without the prior
written permission of the copyright holder.
Nordic VLSI ASA
Revision: 1.1
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Vestre Rosten 81, N-7075 Tiller, Norway
3DJHRI
-
Phone +47 72 89 89 00
-
Fax +47 72 89 89 89
November 2001
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
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Nordic VLSI ASA
Revision: 1.1
-
Vestre Rosten 81, N-7075 Tiller, Norway
3DJHRI
-
Phone +47 72 89 89 00
-
Fax +47 72 89 89 89
November 2001
APPLICATION NOTE
Q5)5)DQGDQWHQQDOD\RXW
1RUGLF9/6,:RUOG:LGH'LVWULEXWRUV
)RU<RXUQHDUHVWGHDOHUSOHDVHVHHKWWSZZZQYOVLQR
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Vestre Rosten 81, N-7075 Tiller, Norway
Phone: +47 72 89 89 00, Fax: +47 72 89 89 89
(PDLOQ5)#QYOVLQR
9LVLWWKH1RUGLF9/6,$6$ZHEVLWHDWKWWSZZZQYOVLQR
Revision: 1.1
3DJHRI
November 2001