TS27M2C,I,M PRECISION LOW POWER CMOS DUAL OPERATIONAL AMPLIFIERS ■ LOW POWER CONSUMPTION : 150µA/op ■ OUTPUT VOLTAGE CAN SWING TO GROUND ■ EXCELLENT PHASE MARGIN ON CAPACITIVE LOADS N DIP8 (Plastic Package) ■ STABLE AND LOW OFFSET VOLTAGE ■ THREE INPUT OFFSET VOLTAGE SELECTIONS DESCRIPTION D SO8 (Plastic Micropackage) These devices are low cost, low power dual operational amplifiers designed to operate with single or dual supplies. These operational amplifiers use the ST silicon gate CMOS process allowing an excellent consumption-speed ratio. These series are ideally suited for low consumption applications. Three power consumptions are available allowing to have always the best consumption-speed ratio: P TSSOP8 (Thin Shrink Small Outline Package) ❑ ICC = 10µA/amp.: TS27L2 (very low power) ❑ ICC = 150µA/amp.: TS27M2 (low power) PIN CONNECTIONS (top view) ❑ ICC = 1mA/amp.: TS272 (standard) These CMOS amplifiers offer very high input impedance and extremely low input currents. The major advantage versus JFET devices is the very low input currents drift with temperature (see figure 2). ORDER CODE 1 8 2 - 3 + 7 4 - 6 + 5 Package Part Number Temperature Range TS27M2C/AC/BC 0°C, +70°C TS27M2I/AI/BI -40°C, +125°C TS27M2M/AM/BM -55°C, +125°C Example : TS27M2ACN N D P • • • • • • • • • N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) November 2001 1 - Output 1 2 - Inverting Input 1 3 - Non-inverting Input 1 4-V CC 5 - Non-inverting Input 2 6 - Inverting Input 2 7 - Output 2 + 8-V CC 1/9 TS27M2C,I,M BLOCK DIAGRAM VCC Current source xI Input differential Output stage Second stage Output VCC E E ABSOLUTE MAXIMUM RATINGS Symbol VCC+ Vid Vi Parameter TS27M2C/AC/BC TS27M2I/AI/BI TS27M2M/AM/BM Unit Supply Voltage 1) 18 V Differential Input Voltage 2) ±18 V -0.3 to 18 V ±30 mA Input Voltage 3) Io Output Current for Iin Input Current VCC+ ≥ 15V ±5 Toper Operating Free-Air Temperature Range Tstg Storage Temperature Range 0 to +70 mA -40 to +125 -55 to +125 °C °C -65 to +150 1. All values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage. OPERATING CONDITIONS Symbol VCC+ Vicm 2/9 Parameter Value Unit Supply Voltage 3 to 16 V Common Mode Input Voltage Range VCC+ V 0 to - 1.5 T20 T 19 T 17 T 24 T21 T18 R2 T 25 VCC T 22 T 23 T 26 T29 T 28 T27 Inpu t T3 T1 T5 VCC T4 T2 C1 Input R1 T7 T6 T9 T8 T 13 T11 T 10 T 14 T 12 T 16 Output T 15 TS27M2C,I,M SCHEMATIC DIAGRAM (for 1/2 TS27M2) 3/9 TS27M2C,I,M ELECTRICAL CHARACTERISTICS VCC+ = +10V, VCC-= 0V, Tamb = +25°C (unless otherwise specified) Symbol DV io Iio Iib TS27M2I/AI/BI TS27M2M/AM/BM Min. Min. Parameter Input Offset Voltage VO = 1.4V, Vic = 0V Vio TS27M2C/AC/BC Tmin ≤ Tamb ≤ Tmax TS27M2C/I/M TS27M2AC/AI/AM TS27M2B/C/I/M TS27M2C/I/M TS27M2AC/AI/AM TS27M2B/C/I/M Input Offset Voltage Drift Input Offset Current note Vic = 5V, V O = 5V Tmin ≤ Tamb ≤ Tmax Typ. Max. 1.1 0.9 0.25 10 5 2 12 6.5 3 Typ. 1.1 0.9 0.25 2 mV µV/°C 2 1 Input Bias Current - see note 1 V ic = 5V, VO = 5V T min ≤ Tamb ≤ Tmax VOH High Level Output Voltage V id = 100mV, R L = 100lΩ T min ≤ Tamb ≤ Tmax VOL Low Level Output Voltage V id = -100mV Avd Large Signal Voltage Gain ViC = 5V, RL = 100kΩ, Vo = 1V to 6V Tmin ≤ Tamb ≤ Tmax 1 100 1 1 150 8.7 8.6 8.9 8.7 8.5 50 8.9 V 50 30 10 50 CMR Common Mode Rejection Ratio V iC = 1V to 7.4V, V o = 1.4V 65 80 65 80 SVR Supply Voltage Rejection Ratio V CC+ = 5V to 10V, Vo = 1.4V 60 80 60 80 ICC Supply Current (per amplifier) Av = 1, no load, Vo = 5V Tmin ≤ Tamb ≤ Tmax 1 150 pA 300 50 30 20 pA 200 Gain Bandwidth Product A v = 40dB, RL = 100kΩ, CL = 100pF, fin = 100kHz V/mV MHz 1 200 250 150 mV dB dB 200 300 µA Io Output Short Circuit Current Vo = 0V, V id = 100mV 60 60 Isink Output Sink Current Vo = VCC, Vid = -100mV 45 45 SR Slew Rate at Unity Gain R L = 100kΩ, C L = 100pF, V i = 3 to 7V 0.6 0.6 φm Phase Margin at Unity Gain A v = 40dB, R L = 100kΩ, CL = 100pF 45 45 KOV Overshoot Factor 30 30 % Equivalent Input Noise Voltage f = 1kHz, Rs = 100Ω 38 38 nV -----------Hz Channel Separation 120 120 dB en Vo1/Vo2 4/9 10 5 2 12 6.5 3.5 1) GBP 1. Unit Max. Maximum values including unavoidable inaccuracies of the industrial test. mA mA V/µs Degrees TS27M2C,I,M TYPICAL CHARACTERISTICS Figure 1 : Supply Current (each amplifier) versus Supply Voltage 20 T AMB = 25 °C AV= 1 VO = VCC / 2 150 OUTPUT VOLTAGE, VOH (V) SUPPLY CURRENT, I CC ( µA) 200 100 50 0 Figure 3b : High Level Output Voltage versus High Level Output Current 4 8 12 16 12 8 0 -50 -40 -30 -20 -10 0 OUTPUT CURRENT, I OH (mA) Figure 4a : Low Level Output Voltage versus Low Level Output Current 100 1.0 VCC = 10V V i = 5V OUTPUT VOLTAGE, VOL (V) INPUT BIAS CURRENT, IIB (pA) VCC = 10V 4 16 Figure 2 : Input Bias Current versus Free Air Temperature 10 1 25 50 75 100 V CC = 3V 0.8 VCC = 5V 0.6 0.4 TAMB = 25 °C 0.2 V i = 0.5V V ID = -1V 0 125 TEMPERATURE, TAMB (°C) 1 2 3 OUTPUT CURRENT, I OL (mA) Figure 3a : High Level Output Voltage versus High Level Output Current Figure 4b : Low Level Output Voltage versus Low Level Output Current 5 3 TAMB = 25° C 4 OUTPUT VOLTAGE, VOL (V) OUTPUT VOLTAGE, VOH (V) V ID = 100mV VCC = 16V SUPPLY VOLTAGE, V CC (V) V ID = 100mV 3 VCC = 5V 2 VCC = 3 V 1 0 TAMB = 25° C -10 -8 -6 -4 -2 OUTPUT CURRENT, I OH (mA) 0 VCC = 10V VCC = 16V 2 1 0 TAMB = 25°C V i = 0.5V VID = -1V 4 8 12 16 20 OUTPUT CURRENT, I OL (mA) 5/9 TS27M2C,I,M 50 0 GAIN 30 PHASE 20 Tamb = 25°C VCC+ = 10V R L = 100k Ω C L = 100pF A VCL = 100 10 0 -10 2 10 10 3 45 Phase Margin 90 135 Gain Bandwi dth Product 4 10 105 10 FREQUENCY, f (Hz) 180 6 10 PHASE (Degrees) GAIN (dB) 40 7 80 T amb= 25°C R L = 100kΩ A V =1 VCC = 10V 70 60 50 40 0 Figure 6 : Gain Bandwidth Product versus Supply Voltage 20 40 60 80 CAPACITANCE, C L (pF) 0.9 1800 Tamb = 25°C R L = 100kΩ C L = 100pF AV = 1 1400 1000 600 200 0 4 8 12 16 Tamb = 25°C R L = 100kΩ C L = 100pF 0.8 0.6 SR 0.5 0.4 4 6 8 10 12 14 SUPPLY VOLTAGE, V CC (V) 50 40 Tamb = 25°C R L = 100kΩ C L = 100pF AV = 1 300 VCC = 10V Tamb = 25°C R S = 100Ω 200 100 0 20 0 6/9 16 Figure 10 : Input Voltage Noise versus Frequency EQUIVALENT INPUT NOISE VOLTAGE (nV/VHz) PHASEMARGIN, φ m (Degrees) Figure 7 : Phase Margin versus Supply Voltage SR 0.7 SUPPLY VOLTAGE, V CC (V) 30 100 Figure 9 : Slew Rate versus Supply Voltage SLEW RATES,SR (V/µ s) GAIN BANDW. PROD., GBP (kHz) Figure 8 : Phase Margin versus Capacitive Load PHASE MARGIN, φ m (Degrees) Figure 5 : Open Loop Frequency Response and Phase Shift 4 8 12 SUPPLY VOLTAGE, VCC (V) 16 1 100 10 FREQUENCY (Hz) 1000 TS27M2C,I,M PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP Millimeters Inches Dim. Min. A a1 B b b1 D E e e3 e4 F i L Z Typ. Max. Min. 3.32 0.51 1.15 0.356 0.204 0.020 0.045 0.014 0.008 0.065 0.022 0.012 0.430 0.384 0.313 2.54 7.62 7.62 3.18 Max. 0.131 1.65 0.55 0.304 10.92 9.75 7.95 Typ. 0.100 0.300 0.300 6.6 5.08 3.81 1.52 0.125 0260 0.200 0.150 0.060 7/9 TS27M2C,I,M PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) s b1 b a1 A a2 C c1 a3 L E e3 D M 5 1 4 F 8 Millimeters Inches Dim. Min. Typ. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 8/9 Max. Min. Typ. 1.75 0.1 0.65 0.35 0.19 0.25 0.25 1.65 0.85 0.48 0.25 0.5 4.8 5.8 5.0 6.2 Max. 0.069 0.004 0.026 0.014 0.007 0.010 0.010 0.065 0.033 0.019 0.010 0.020 0.189 0.228 0.197 0.244 45° (typ.) 1.27 3.81 3.8 0.4 0.050 0.150 4.0 1.27 0.6 0.150 0.016 8° (max.) 0.157 0.050 0.024 TS27M2C,I,M PACKAGE MECHANICAL DATA 8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) k c 0.25mm .010 inc h GAGE PLANE L1 L L L1 C SEATING PLANE E1 A E A2 A1 5 4 4 5 D b e 8 1 8 1 PIN 1 IDENTIFICATION Millimeters Inches Dim. Min. Typ. A Max. Min. Typ. 1.20 A1 A2 b c D E E1 e k l L L1 0.05 0.80 0.19 0.09 2.90 4.30 0° 0.50 0.45 1.00 3.00 6.40 4.40 0.65 0.60 0.600 1.000 Max. 0.05 0.15 1.05 0.30 0.20 3.10 0.01 0.031 0.007 0.003 0.114 4.50 0.169 8° 0.75 0.75 0° 0.09 0.018 0.039 0.118 0.252 0.173 0.025 0.0236 0.024 0.039 0.006 0.041 0.15 0.012 0.122 0.177 8° 0.030 0.030 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infring ement of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change witho ut notice. This publ ication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life suppo rt devices or systems withou t express written approval of STMicroelectronics. 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