ETC TS80C51RC2

Errata Sheet
TS87C51RC2, TS80C51RC2
This errata sheet describes the functional deviations known at the release date of this document.
Errata History
TS87C51RC2
Lot Number
Trouble list
Status
≤ Z36736
T01, T02 ,T03, T04, T05, T06
Not Fixed
> Z36736
T02 ,T03, T04, T05, T06
Not Fixed
TS80C51RC2
Lot Number
Trouble list
Status
≤ Z38711
T01, T02 ,T03, T04, T05, T06
Not Fixed
> Z38711
T02 ,T03, T04, T05, T06
Not Fixed
Trouble descriptions
T01
UART / Reception in modes 1, 2 and 3 / UART false start bits detection
Description:
Workaround:
When a false start bit occurs on the UART, some UART internal signals are not reset. Than
when a real start bit occurs, the sampling is shifted.
No
T02
During UART reception, clearing REN may generate unexpected IT
Description:
During Uart reception, if the REN bit is clear between a start bit detection and the end of
reception, the Uart will not discare the data (RI is set).
Test REN at the beginning of Interrupt routine just after CLR RI, and to run the Interrupt routine
code only if REN is set.
Workaround:
T03
JBC / Double IT when ext. IT occurs during JBC instruction
Description:
Workaround:
On polling algorithm in ISR on IE1 or IE0, when external IT appears during JBC instruction ,
flag is not cleared and next JBC see another IT, then the same IT is seen twice.
Use JB Instruction instead of JBC instruction to test bit and CLR instruction to clear it.n twice.
T04
Timer2 / Downcounter mode / Double IT with slow external clock
Description:
Double IT with slow external clock in downcount mode.Timer 2 in 16 bit autoreload in count
down mode with external clock input 2 interrupts are generated successively with low frequency
on clock input (typ 10-40KHz).
Reload FFFE into TH2-TL2 in ISR and count down to RCAP-1 (to recover cycle lost in ISR)
Workaround:
Caution : do not work if initially RCAP = 0x0000
Rev A - 29-Mar-01
1
Errata Sheet
T05
Input Trigger Consumption / All C51 type I/O ports
Description:
Workaround:
Some static consumption in input triggers of I/O ports may occur when entries are driven close
to the trigger threshold (1mA to 2mA for each I/O at Vin = 2.4V for Vcc = 5V)
No
T06
Movx / Port0 / Read mode
Description:
When reading External Ram using Movx instruction, Port0’s Sfr may contain ’0’ whereas any
acces to external memories (data or program) should write ’1’ into them .
No
Workaround:
2
Rev A - 29-Mar-01