REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 02. Add case outlines L and 3. Add vendor CAGE 01295. Change vendor CAGE 07263 to 27014. Technical and editorial changes throughout. 91-04-22 M. A. Frye B Add B, S, Q, and V test limits. Change to one part-one part number format. Add ground bounce and latch-up immunity tests. Add 10.1 substitution statement. Changes to table I. Editorial changes throughout. 92-07-09 Monica L. Poelking C Changes made IAW NOR 5962-R161-93. 93-05-21 Monica L. Poelking D Make corrections to VOL3 limits in table I. Update drawing to MIL-PRF-38535 requirements. - CFS 01-06-29 Thomas M. Hess REV SHEET REV D D D D D D D D D D D D SHEET 15 16 17 18 19 20 21 22 23 24 25 26 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Greg Pitz STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 http://www.dscc.dla.mil CHECKED BY D. A. DiCenzo APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE Michael A. Frye DRAWING APPROVAL DATE 87-12-23 AMSC N/A REVISION LEVEL D MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL BUFFER/LINE DRIVER, WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. 1 OF 5962-87760 26 5962-E097-01 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes M, B and Q) and space application (device classes S and V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 87760 Federal stock class designator \ RHA designator (see 1.2.1) 01 M R X Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT244 Octal buffer/line driver with non-inverting three-state outputs, TTL compatible inputs 02 54ACT11244 Octal buffer/line driver with non-inverting three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A B or S Certification and qualification to MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter R S L 2 3 Descriptive designator GDIP1-T20 or CDIP2-T20 GDFP2-F20 or CDFP3-F20 GDIP3-T24 or CDIP4-T24 CQCC1-N20 CQCC1-N28 Terminals 20 20 24 20 28 Package style Dual-in-line Flat pack Dual-in-line Square leadless chip carrier Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M, B and S. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 2 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) ........................................................................................ -0.5 V dc to +6.0 V dc DC input voltage (VIN) ................................................................................................ -0.5 V dc to VCC +0.5 V dc DC output voltage range (VOUT) ................................................................................. -0.5 V dc to VCC + 0.5 V dc Clamp diode current (IIK, IOK)...................................................................................... ±20 mA DC output current (IOUT) ............................................................................................. ±50 mA DC VCC or GND current (ICC, IGND).............................................................................. ±200 mA 3/ Storage temperature range (TSTG) ............................................................................. -65°C to +150°C Maximum power dissipation (PD) ............................................................................... 500 mW Lead temperature (soldering, 10 seconds) ................................................................ +300°C Thermal resistance, junction-to-case (θJC)................................................................. See MIL-STD-1835 Junction temperature (TJ) .......................................................................................... +175°C Case operating temperature (TC) ............................................................................... -55°C to +125°C 1.4 Recommended operating conditions. 1/ 2/ 4/ Supply voltage range (VCC) ........................................................................................ +4.5 V dc to +5.5 V dc Input voltage range (VIN) ............................................................................................ +0.0 V dc to VCC Output voltage range (VOUT)....................................................................................... +0.0 V dc to VCC Maximum low level input voltage (VIL)........................................................................ 0.8 V at VCC = 4.5 V 0.8 V at VCC = 5.5 V Minimum high level input voltage (VIH)....................................................................... 2.0 V at VCC = 4.5 V 2.0 V at VCC = 5.5 V Case operating temperature range (TC)..................................................................... -55°C to +125°C Input rise and fall rate (tr, and tf) maximum: VCC = 4.5 V.............................................................................................................. 10 ns/V VCC = 5.5 V.............................................................................................................. 8 ns/V Maximum high level output current (IOH) .................................................................... -24 mA Maximum low level output current (IOL) ...................................................................... 24 mA _________ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. The maximum junction temperature may be exceeded for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ For packages with multiple VCC and GND pins, this value represents the maximum total current flowing into or out of all VCC or GND pins. 4/ Unless otherwise specified, the values listed above shall apply over the full VCC and TC recommended operating range. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of the DoDISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DoDISS are the issues of the documents cited in the solicitation. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 17 - A Standardized Test Procedure for the Characterization of the LATCH-UP in CMOS Integrated Circuits JEDEC Standard No. 20 - Standardized for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices (Applications for copies should be addressed to the Electronics Industries Alliance, 2001 Eye Street, NW, Washington DC 20006.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 4 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. The individual item requirements for device classes B and S shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. This is a fully characterized military detail specification and is suitable for qualification of device classes B and S to the requirements of MIL-PRF-38535, appendix A. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device classes M, B and S. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Ground bounce load circuit and waveforms. The ground bounce load circuit and waveforms shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.2.7 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.2.8 Schematic Circuits. The schematic circuits shall be submitted to the preparing activity prior to the inclusion of a manufacturer's device in this drawing and shall be submitted to the qualifying activity as a prerequisite for qualification for device classes B and S. All qualified manufacturer's schematics shall be maintained and available upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. Test conditions for these specified characteristics and limits are as specified in table I. For device classes B and S, a pin-for-pin conditions and testing sequence for table I parameters shall be maintained and available upon request from the qualifying activity, on qualified devices. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. Radiation hardness assurance level designators M, D, and R (see MIL-PRF38535) in table I are post-irradiation end-point electrical parameters. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device classes M, B, and S shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. The compliance mark for device classes B and S shall be a "QML" or "Q" as required in MIL-PRF-38535, appendix A. 3.5.2 Correctness of indexing and marking for device classes B and S. For device classes B and S, all devices shall be subjected to the final electrical tests specified in table II after PIN marking (marked in accordance with MIL-PRF-38535, appendix A) to verify that they are correctly indexed and identified by PIN. Optionally, an approved electrical test may be deviced especially for this requirement. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 5 3.6 Certificate of compliance. For device classes B, S, Q and V, a certificate of compliance shall be required from a QML38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MILHDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MILPRF-38535 and herein or for device classes M, B and S the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device classes M, B and S in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device classes M, B and S. Device classes M, B and S devices covered by this drawing shall be in microcircuit group number 37 (see MIL-PRF-38535, appendix A). 3.11 Serialization for device class S. All device class S devices shall be serialized in accordance with MIL-PRF-38535, appendix A. 3.12 Substitution. Substitution data shall be as indicated in the appendix herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 6 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ High level output voltage 3006 Symbol Test Conditions 2/ -55°C ≤ TC ≤ +125°C +4.5 V ≤ VCC ≤ +5.5 V unless otherwise specified Device type 3/ and device class VCC Group A subgroup s Min VOH1 4/ For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, VIN = VCC or GND IOH = -50 µA All All 4.5 V 1, 2, 3 4.4 VOH2 5/ 6/ For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, M VIN = VCC or GND D IOH = -50 µA P, L, R All All 5.5 V 1, 2, 3 5.4 1 5.4 VOH3 5/ 6/ For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, M VIN = VCC or GND D IOH = -24 mA P, L, R 01 B, S, Q, V Unit Limits 2/ Max V 5.4 5.4 All All 4.5 V 01 B, S, Q, V 1, 2, 3 3.7 1 3.7 3.7 3.7 VOH4 4/ For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, VIN = VCC or GND IOH = -24 mA All All 5.5 V 1, 2, 3 4.7 VOH5 5/ 6/ 7/ For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, M VIN = VCC or GND D IOH = -50 mA P, L, R All All 5.5 V 1, 2, 3 3.85 1 3.85 01 B, S, Q, V 3.85 3.85 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 7 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Low level output voltage 3007 Symbol Test Conditions 2/ -55°C ≤ TC ≤ +125°C +4.5 V ≤ VCC ≤ +5.5 V unless otherwise specified Device type 3/ and device class VCC Group A subgroup s Min Max VOL1 4/ For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, VIN = VCC or GND IOL = 50 µA All All 4.5 V 1, 2, 3 0.1 VOL2 5/ 6/ For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, M VIN = VCC or GND D IOL = 50 µA P, L, R All All 5.5 V 1, 2, 3 0.1 1 0.1 VOL3 5/ 6/ VOL4 4/ VOL5 5/ 6/ 7/ 01 B, S, Q, V All B, S, Q, V For all other inputs, VIN = VCC or GND IOL = 24 mA 01 B, S, Q, V D 0.1 4.5 V All M 1, 3 0.4 2 0.5 1 0.4 2, 3 0.5 1 0.4 0.4 P, L, R For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, VIN = VCC or GND IOL = 24 mA For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, M VIN = VCC or GND D IOL = 50 mA P, L, R V 0.1 For all inputs affecting output under test VIN = VIH or VIL VIH = 2.0 V VIL = 0.8 V M Unit Limits 2/ 0.4 All B, S, Q, V 5.5 V All M All All 01 B, S, Q, V 5.5 V 1, 3 0.4 2 0.5 1 0.4 2,3 0.5 1, 2, 3 1.65 1 1.65 1.65 1.65 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 8 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Three-state output leakage current high 3021 Symbol IOZH 5/ 6/ Test Conditions 2/ -55°C ≤ TC ≤ +125°C +4.5 V ≤ VCC ≤ +5.5 V unless otherwise specified ___ OEn = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, VIN = VCC or GND VOUT = 5.5 V Three-state output leakage current low 3020 IOZL 5/ 6/ Positive input clamp voltage VIC+ 5/ 6/ 3022 M D All B, S, Q, V 5.5 V Group A subgroup s Min 01 B, S, Q, V 1 0.5 2 10.0 1 0.5 2, 3 10.0 10.0 5.5 V 01 B, S, Q, V 1 -0.5 2 -10.0 1 -0.5 2, 3 -10.0 1 -3.0 D -20.0 All B, S, Q, V 1 0.4 1.5 01 B, S, Q, V 1 0.4 1.5 0.4 1.5 P, L, R Negative input clamp voltage VIC5/ 6/ 3022 VCC = Open For input under test, IIN = -1 mA M D IIH 5/ 6/ For input under test, VIN = VCC For all other inputs, VIN = VCC or GND -0.4 -1.5 01 B, S, Q, V 1 -0.4 -1.5 -0.4 -1.5 -0.4 -1.5 All M D 1.5 1 All B, S, Q, V M 0.4 All B, S, Q, V P, L, R Input current high 3010 µA -10.0 P, L, R M µA 3.0 1 All M D Max 20.0 All B, S, Q, V M Unit Limits 2/ P, L, R VCC = Open For input under test, IIN = 1 mA VCC All M ___ OEn = VIH or VIL VIH = 2.0 V VIL = 0.8 V For all other inputs, VIN = VCC or GND VOUT = GND Device type 3/ and device class 01 B, S, Q, V 5.5 V 1 0.1 2 1.0 1 0.1 2, 3 1.0 1 0.1 V V µA 0.1 P, L, R 0.1 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 9 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Input current low 3009 Symbol IIL 5/ 6/ Test Conditions 2/ -55°C ≤ TC ≤ +125°C +4.5 V ≤ VCC ≤ +5.5 V unless otherwise specified For input under test, VIN = GND For all other inputs, VIN = VCC or GND Device type 3/ and device class VCC All B, S, Q, V 5.5 V D 01 B, S, Q, V Unit Limits 2/ Min All M M Group A subgroup s Max 1 -0.1 2 -1.0 1 -0.1 2, 3 -1.0 1 -0.1 µA -0.1 P, L, R -0.1 Control input capacitance 3012 CIN See 4.4.1b TC = +25°C All All GND 4 10.0 pF Output capacitance 3012 COUT See 4.4.1b TC = +25°C 01 All 5.5 V 4 15.0 pF 02 All 5.0 V 4 20.0 Power dissipation capacitance CPD 9/ See 4.4.1b TC = +25°C All All 5.0 V 4 65.0 pF Quiescent supply current delta, TTL input levels 3005 ∆ICC 5/ 6/ 10/ For input under test, VIN = VCC - 2.1 V For all other inputs, VIN = VCC or GND All B, S, Q, V 5.5 V mA M D 3 1.6 1, 2 1.0 All M 1, 2, 3 1.6 01 B, S, Q, V 1 1.6 1.6 P, L, R Quiescent supply current output high 3005 ICCH 5/ 6/ ___ OEn = GND For all other inputs, VIN = VCC 3.0 All B, S, Q, V 5.5 V All M M D 01 B, S, Q, V 1 2.0 2 40.0 1 8.0 2, 3 160.0 1 300.0 1.0 P, L, R Quiescent supply current output low 3005 ICCL 5/ 6/ ___ OEn = GND For all other inputs, VIN = GND 2.0 All B, S, Q, V All M M D µA 01 B, S, Q, V 5.5 V 1 2.0 2 40.0 1 8.0 2, 3 160.0 1 300.0 µA 1.0 P, L, R mA 2.0 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 10 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Quiescent supply current outputs three-state 3005 Symbol ICCZ 5/ 6/ Test Conditions 2/ -55°C ≤ TC ≤ +125°C +4.5 V ≤ VCC ≤ +5.5 V unless otherwise specified ___ OEn = VCC For all other inputs, VIN = VCC or GND Device type 3/ and device class VCC All B, S, Q, V 5.5 V D 01 B, S, Q, V Unit Limits 2/ Min All M M Group A subgroup s Max 1 2.0 2 40.0 1 8.0 2, 3 160.0 1 300.0 µA 1.0 P, L, R mA 2.0 Low level ground bounce noise VGBL 11/ 12/ VLD = 2.5 V, IOL = +24 mA (see figure 4) All B, S, Q, V 4.5 V 4 2000 mV High level ground bounce noise VGBH 11/ 12/ VLD = 2.5 V, IOH = -24 mA (see figure 4) All B, S, Q, V 4.5 V 4 2000 mV Latch-up input/ output overvoltage ICC (O/V1) 13/ tw ≥ 100 µs tcool ≥ tw 5 µs ≤ tr ≤ 5 ms 5 µs ≤ tf ≤ 5 ms Vtest = 6.0 V VCCQ = 5.5 V Vover = 10.5 V All B, S, Q, V 5.5 V 2 200 mA Latch-up input/ output positive over-current ICC (O/I1+) 13/ tw ≥ 100 µs tcool ≥ tw 5 µs ≤ tr ≤ 5 ms 5 µs ≤ tf ≤ 5 ms Vtest = 6.0 V VCCQ = 5.5 V Itrigger = +120 mA All B, S, Q, V 5.5 V 2 200 mA Latch-up input/ output negative over-current ICC (O/I1-) 13/ tw ≥ 100 µs tcool ≥ tw 5 µs ≤ tr ≤ 5 ms 5 µs ≤ tf ≤ 5 ms Vtest = 6.0 V VCCQ = 5.5 V Itrigger = -120 mA All B, S, Q, V 5.5 V 2 200 mA Latch-up supply over-voltage ICC (O/V2) 13/ tw ≥ 100 µs tcool ≥ tw 5 µs ≤ tr ≤ 5 ms 5 µs ≤ tf ≤ 5 ms Vtest = 6.0 V VCCQ = 5.5 V Vover = 9.0 V All B, S, Q, V 5.5 V 2 100 mA See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 11 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Truth table test output voltage 3014 Symbol 5/ 6/ 14/ Test Conditions 2/ -55°C ≤ TC ≤ +125°C +4.5 V ≤ VCC ≤ +5.5 V unless otherwise specified VIL = 0.40 V, VIH = 2.40 V, Verify output VOUT See 4.4.1c M D Device type 3/ and device class VCC All All 4.5 V All M All B, S, Q, V Group A subgroup s Min Max 7, 8 L H 5.5 V 7, 8 L H 4.5 V 7 L H L H P, L, R Propagation delay time, data to output, mAn to mYn 3003 tPHL, tPLH 5/ 6/ 15/ 16/ CL = 50 pF minimum, RL = 500Ω, See figure 5 01 B, S, Q, V 4.5 V 02 B, S, Q, V M D L H 9, 11 1.0 9.0 10 1.0 10.0 9, 11 1.0 8.9 10 1.0 10.6 01 M 9 1.0 9.0 10, 11 1.0 10.0 02 M 9 1.0 8.9 10, 11 1.0 10.6 9 1.0 9.0 1.0 9.0 1.0 9.0 01 B, S, Q, V P, L, R Propagation delay time, output enable, OEn to mYn 3003 tPZH, tPZL 5/ 6/ 15/ 16/ CL = 50 pF minimum, RL = 500Ω, See figure 5 01 B, S, Q, V 02 B, S, Q, V M D 4.5 V 9, 11 1.0 9.0 10 1.0 11.0 9, 11 1.0 11.3 10 1.0 13.4 01 M 9 1.0 9.0 10, 11 1.0 11.0 02 M 9 1.0 11.3 10, 11 1.0 13.4 9 1.0 9.0 1.0 9.0 1.0 9.0 01 B, S, Q, V P, L, R Unit Limits 2/ ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 12 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Propagation delay time, output disable, OEn to mYn 3003 Symbol tPHZ, tPLZ 5/ 6/ 15/ 16/ Test Conditions 2/ -55°C ≤ TC ≤ +125°C +4.5 V ≤ VCC ≤ +5.5 V unless otherwise specified CL = 50 pF minimum, RL = 500Ω, See figure 5 Device type 3/ and device class VCC 01 B, S, Q, V 4.5 V D Max 9, 11 1.0 9.5 10 1.0 11.5 9, 11 1.0 10.6 10 1.0 11.6 01 M 9 1.0 9.5 10, 11 1.0 11.5 02 M 9 1.0 10.6 10, 11 1.0 11.6 9 1.0 9.5 1.0 9.5 1.0 9.5 01 B, S, Q, V P, L, R Unit Limits 2/ Min 02 B, S, Q, V M Group A subgroup s ns 1/ For tests not listed in the referenced MIL-STD-883 (e.g. ∆ICC), utilize the general test procedure under the conditions listed herein. All inputs and outputs shall be tested, as applicable, to the tests in table I herein. 2/ Each input/output, as applicable shall be tested at the specified temperature for the specified limits. Output terminals not designated shall be high level logic, low level logic, or open, except as follows: a. VIC (pos) tests, the GND terminal can be open. TC = +25°C. b. VIC (neg) tests, the VCC terminal shall be open. TC = +25°C. c. All ICC and ∆ICC tests, the output terminal shall be open. When performing these tests, the current meter shall be placed in the circuit such that all current flows through the meter. For negative and positive voltage and current values: The sign designates the potential difference in reference to GND and the direction of current flow respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 3/ The word "All" in the device type and device class column, means non-RHA limits for all device types and classes. Where M, D, P, L, and R in the conditions column are postirradiation limits for those device types and classes specified in the device type and device class column. 4/ This test is guaranteed, if not tested, to the limits specified in table I. 5/ RHA samples do not have to be tested at -55°C and +125°C prior to irradiation. 6/ When performing post irradiation electrical measurements for RHA level, TA = +25°C. Limits shown are guaranteed at TA = +25°C ±5°C. 7/ Transmission driving tests are performed at VCC = 5.5 V dc with a 2 ms duration maximum. This test may be performed using VIN = VCC or GND. When VIN = VCC or GND is used, the test is guaranteed for VIN = 2.0 V or 0.8 V. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 13 TABLE I. Electrical performance characteristics - Continued. 8/ Three-state output conditions are required. 9/ Power dissipation capacitance (CPD) determines the no load dynamic power consumption, PD = (CPD + CL) (VCC x VCC)f + (ICC x VCC) + (n x d x ∆ICC x VCC). The dynamic current consumption, IS = (CPD + CL)VCCf + ICC + n x d x ∆ICC. For both PD and IS: n is the number of device inputs at TTL levels, f is the frequency of the input signal, and d is the duty cycle of the input signal. 10/ This test may be performed either one input at a time (preferred method) or with all input pins simultaneously at VIN = VCC - 2.1 V (alternate method). Classes B, S, Q, and V shall use the preferred method. When the test is performed using the alternate test method: the maximum limits are equal to the number of inputs at a high TTL input level times 1.6 mA; and the preferred method and limits are guaranteed. 11/ This test is for qualification only. Ground bounce tests are performed on a nonswitching (quiescent) output and are used to measure the magnitude of induced noise caused by other simultaneously switching outputs. The test is performed on a low noise bench test fixture with all outputs fully dc loaded (IOL maximum and IOH minimum = i.e., ±24 mA) and 50pF of load capacitance (see figure 4). The loads must be located as close as possible to the device output. Inputs are then conditioned with 1 MHz pulse (tr = tf = 3.5 ±1.5 ns) switching simultaneously and in phase such that one output is forced low and all others (possible) are switched. The low level ground bounce noise is measured at the quiet output using a F.E.T. oscilloscope probe with at least 1 MΩ impedance. Measurement is taken from the peak of the largest positive pulse with respect to the nominal low level output voltage (figure 4). The device inputs are then conditioned such that the output under test is at a high nominal VOH level. The high level ground bounce measurement is then measured from nominal VOH level to the largest negative peak. This procedure is repeated such that all outputs are tested at a high and low level with a maximum number of outputs switching. 12/ When used in synchronous TTL compatible systems, ground bounce (VGBL and VGBH) = 2,000 mV can be a possible problem. 13/ See JEDEC STD. 17 for electrically induced latch-up test methods and procedures. The values listed for Vtrigger, Itrigger and Vover, are to be accurate within ±5 percent. 14/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic patterns used for fault detection. Functional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. H ≥ 2.5 V, L ≤ 2.5 V; high inputs = 2.4 V and low inputs = 0.4 V. The input voltage levels have the allowable tolerances per MIL-STD-883 already incorporated. Functional tests at VCC = 4.5 V are worst case for RHA specified devices. 15/ Device classes B and S are tested at VCC = 4.5 V at TC = +125°C for sample testing and at VCC = 4.5 V at TC = +25°C for screening. Other voltages of VCC and temperatures are guaranteed, if not tested, see 4.4.1d. 16/ AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. Minimum ac limits for VCC = 5.5 V are 1.0 ns and guaranteed by guardbanding the VCC = 4.5 V minimum limits to 1.5 ns. For propagation delay tests, all paths must be tested. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 14 Device types 01 Case outlines R and S 02 2 Terminal number L 3 1Y1 2Y1 3Y1 4Y1 GND GND GND GND 1Y2 2Y2 3Y3 4Y2 OE2 4A2 3A2 2A2 1A2 VCC VCC 4A1 3A1 2A1 1A1 OE1 --------- NC VCC 4A1 3A1 2A1 1A1 OE1 NC 1Y1 2Y1 3Y1 4Y1 GND GND NC GND GND 1Y2 2Y2 3Y2 4Y2 NC OE2 4A2 3A2 2A2 1A2 VCC Terminal symbol ___ OE1 1A1 4Y2 2A1 3Y2 3A1 2Y2 4A1 1Y2 GND 1A2 4Y1 2A2 3Y1 3A2 2Y1 4A2 1Y1 OE2 VCC ----------------- ___ OE1 1A1 4Y2 2A1 3Y2 3A1 2Y2 4A1 1Y2 GND 1A2 4Y1 2A2 3Y1 3A2 2Y1 4A2 1Y1 OE2 VCC ----------------- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 FIGURE 1. Terminal connections. Device types 01 and 02 Inputs Outputs ___ OEn mAn mYn L L H L H X L H Z H = High voltage level L = Low voltage level X = Irrelevant Z = High impedance FIGURE 2. Truth table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 15 FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 16 Note: Resistor and capacitor tolerances = ±10% FIGURE 4. Ground bounce waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 17 Notes: 1. Preferred method - used for device type 02: When measuring tPHZ and tPZH: V test = GND When measuring tPLZ and tPZL: V test = 2 X VCC When measuring tPLH and tPHL: V test = open Alternate method - used for device type o1: When measuring tPLZ and tPZL: V test = 2 X VCC When measuring tPHZ,tPZH,tPLHand tPHL: V test = open 2. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance). 3. RT = 50Ω or equivalent. RL = 500Ω or equivalent. 4. Input signal from pulse generator: VIN = 0.0 V to 3.0 V; PRR ≤ 10 Mhz; tr ≤ 3 ns; tf ≤ 3 ns; duty cycle = 50 percent. 5. Timing parameters shall be tested at a minimum input frequency of 1 MHz. 6. Outputs are measured one at a time with one output per measurement. FIGURE 5. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 18 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. For device class B, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, Appendix A and method 5005 of MIL-STD-883, except as modified herein. For device class S, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, Appendix A and methods 5005 and 5007 of MIL-STD-883, except as modified herein 4.1.1 Burn-in and life test circuits. For device classes B and S, the burn-in and life test circuits shall be constructed so that the devices are stressed at the maximum operating conditions stated in 4.2.1a5 or 4.2.1a6 as applicable, or equivalent as approved by the qualifying activity. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. For device classes B and S, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qualification and quality conformance inspection. 4.2.1 Additional criteria for device classes M, B and S. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C or D. For device class M, the test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. For device classes B and S, the test circuit shall be submitted to the qualifying activity. (2) TA = +125°C, minimum. (3) Delete the sequence specified in 3.1.10 through 3.1.14 of method 5004 and substitute lines 1 through 7 requirements of table IIA herein. (4) For device class M, unless otherwise noted, the requirements for device class B in method 1015 of MIL-STD-883 shall be followed. (5) Static burn-in, test condition A, test method 1015 of MIL-STD-883. Test duration for each static test shall be 24 hours minimum for class S devices and in accordance with table I of method 1015 for class B devices. (a) For static burn-in I, all inputs shall be connected to GND. Outputs may be open or connected to VCC/2 ±0.5 V. Resistors R1 are optional on both inputs and open outputs, and required on outputs connected to VCC/2 ±0.5 V. R1 = 220Ω to 47 kΩ. (b) For static burn-in II, all inputs shall be connected through the R1 resistors to VCC. Outputs may be open or connected to VCC/2 ±0.5 V. Resistors R1 are optional on open outputs, and required on outputs connected to VCC/2 ±0.5 V. R1 = 220Ω to 47 kΩ. (c) VCC = 5.5 V ±0.5 V. (6) Dynamic burn-in, test condition D, method 1015 of MIL-STD-883, (a) Input resistors = 220Ω to 2 kΩ ±20 percent. (b) Output resistors = 220Ω ±20 percent. (c) VCC = 5.5 V ±0.5 V. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 19 (d) The output enable control pin(s) shall be connected through the resistors in parallel to VCC or GND, as applicable, to enable the outputs. All other inputs shall be connected through the resistors in parallel to a common clock pulse (CP) as applicable. Outputs shall be connected through the resistors to VCC/2 ±0.5 V. (e) CP = 25 kHz to 1 MHz square wave; duty cycle = 50 percent ±15 percent; VIH = 4.5 V to VCC, VIL = 0 V ±0.5 V; tr, tf ≤ 100 ns. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. For class S devices, post dynamic burn-in, or class B devices, post static burn-in, electrical parameter measurements may, at the manufacturer's option, be performed separately or included in the final electrical parameter requirements. TABLE IIA. Electrical test requirements. Test requirements Interim electrical parameters, method 5004 Static burn-in I, method 1015 (4.2.1a) Interim electrical parameters, method 5004 (4.2.1b) Static burn-in II, method 1015 (4.2.1a) Interim electrical parameters, method 5004 (see 4.2.1b) Dynamic burn-in I, method 1015 (4.2.1a) Interim electrical parameters, method 5004 (4.2.1b) Final electrical parameters, method 5004 Group A test requirements, method 5005 (4.4.1) Group B end-point electrical parameters, method 5005 (4.4.2) Group C end-point electrical parameters, method 5005 (4.4.3) Group D end-point electrical parameters, method 5005 (4.4.4) Group E end-point electrical parameters, method 5005 (4.4.5) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device Device 1/ Device 2/ class M class B class S 1 1 3/ Not required Required 4/ Subgroups (in accordance with MIL-PRF-38535, table III) Device Device class Q class V 1 1 Not required 1 5/ 3/ 3/ Required 4/ 1 5/ Required 6/ Required 4/ Required 6/ Required 4/ 1 1/, 5/ 1 2/, 5/ 1 1/, 5/ 1 2/, 5/ Not required Required 4/ Not required Required 4 1 5/ 1, 2, 3, 7, 8, 9 1/ 1, 2, 7, 9 1/, 6/ 1, 2, 7, 9 2/ 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1 5/ 1, 2, 3, 7, 8, 9, 10, 11 1/, 6/ 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 7,8, 9, 10, 11 2/, 5/ 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3 5/ 1, 2, 3, 7, 8, 9, 10, 11 5/ 1, 2, 3, 7, 8, 9, 10, 11 5/ 1, 2, 3 1, 2 5/ 1, 2, 3 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9 See footnotes on next page. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 20 1/ PDA applies to subgroup 1. 2/ PDA applies to subgroups 1 and 7. 3/ The required test condition used for burn-in shall be that submitted to DSCC-VQC with the certificate of compliance. See 4.2.1a herein. 4/ On all class S lots, the device manufacturer shall maintain read-and-record data (as a minimum on disk) for burn-in electrical parameters (group A, subgroup 1), in accordance with test method 5004 of MIL-STD-883. For pre-burn-in and interim electrical parameters the read-and-record requirements are for delta measurements only. 5/ Delta limits as specified in table III shall be required where specified, and the delta limits shall be completed with reference to the zero hour electrical parameters. 6/ The device manufacturer may at his option either complete subgroup 1 electrical parameter measurements, including delta measurements, within 96 hours after burn-in completion (removal of bias); or may complete subgroup 1 electrical measurements without delta measurements within 24 hours after burn-in completion (removal of bias). When the manufacturer elects to perform the subgroup 1 electrical parameter measurements without delta measurements, there is no requirement to perform the pre-burn-in electrical tests (first interim electrical parameters test in table IIA). 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B and as detailed in table IIB herein. 4.2.3 Percent defective allowable (PDA). a. The PDA for class S devices shall be 5 percent for static burn-in and 5 percent for dynamic burn-in, based on the exact number of devices submitted to each separate burn-in. b. Static burn-in I and II failures shall be cumulative for determining the PDA. c. The PDA for class B devices shall be in accordance with MIL-PRF-38535, appendix A for static burn-in. Dynamic burn-in is not required. d. The PDA for class M devices shall be in accordance with MIL-PRF-38535, appendix A for static burn-in and dynamic burn-in. e. Those devices whose measured characteristics, after burn-in, exceed the specified delta limits or electrical parameter limits specified in table I, subgroup I, are defective and shall be removed from the lot. The verified number of failed devices times 100 divided by the total number of devices in the lot initially submitted to burn-in shall be used to determine the percent defective for the lot and the lot shall be accepted or rejected based on the specified PDA. 4.3 Qualification inspection. 4.3.1 Qualification inspection for device classes B and S. Qualification inspection for device classes B and S, shall be in accordance with MIL-PRF-38535, appendix A. Inspections to be performed shall be those specified in method 5005 of MILSTD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 21 4.3.2 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). 4.3.3 Electrostatic discharge sensitivity qualification inspection. Electrostatic discharge sensitivity (ESDS) testing shall be in accordance with MIL-STD-883, method 3015. ESDS testing shall be measured only for initial qualification and after process or design changes which may affect ESDS classification. For device classes Q and V, only those device types that pass ESDS testing at 2000 volts or greater shall be considered as conforming to the requirements of this specification. Table IIB. Additional screening for device class V. Test MIL-STD-883, test method Lot requirement 2020 100% Particle impact noise detection Internal visual 2010, condition A or approved alternate 100% Nondestructive bond pull 2023 or approved alternate 100% Reverse bias burn-in Burn-in 2010 100% 1015, total of 240 hours at +125°C Radiographic 100% 2012 100% Table III. Burn-in and operating life test Delta parameters (+25°C). Parameter 1/ Device types Limits ICCH, ICCL, ICCZ All ±100 nA 1/ These parameters shall be recorded before and after the required burn-in and life tests to determine delta limits. 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Quality conformance inspection for device classes B and S shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device classes M, B, and S shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. CIN, COUT, and CPD shall be measured only for initial qualification and after process or design changes which may affect capacitance. CIN and COUT shall be measured between the designated terminal and GND at a frequency of 1 MHz. CPD shall be tested in accordance with the latest revision of JEDEC Standard No. 20 and table I herein. For CIN, COUT, and CPD, test all applicable pins on five devices with zero failures. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 22 c. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table in figure 2 herein. The test vectors used to verify the truth table shall test all possible input to output logic patterns. For device classes B and S, subgroups 7 and 8 tests shall be sufficient to verify the truth table as approved by the qualifying activity. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. d. Latch-up and ground bounce tests are required for device classes B, S, Q, and V. These tests shall be performed only for initial qualification and after process or design changes which may affect the performance of the device. Latch-up tests shall be considered destructive. For latch-up and ground bounce tests, test all applicable pins on five devices with zero failures. f. For device classes B and S, subgroups 9 and 11 tests shall be measured only for initial qualification and after process or design changes which may affect dynamic performance. 4.4.2 Group B inspection. The group B inspection end-point electrical parameters shall be as specified in table IIA herein and as follows. a. Class S steady-state life (accelerated) shall be conducted using test condition D of method 1005 of MIL-STD-883 and the circuit described in 4.2.1a6 herein, or equivalent as approved by the qualifying activity. The actual test circuit used shall be submitted to the qualifying activity. b. End-point electrical parameters shall be as specified in table IIA herein. Delta limits shall apply only to subgroup 5 of group B inspections and shall consist of tests specified in table III herein. 4.4.3 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.3.1 Additional criteria for device classes M and B. Steady-state life test conditions, method 1005 of MIL-STD-883: a. End-point electrical parameters shall be as specified in table IIA herein. Delta limits shall apply only to subgroup 1 of group C inspection and shall consist of tests specified in table III herein. b. Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. c. TA = +125°C, minimum. d. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.3.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. 4.4.4 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.5 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). RHA levels for device classes B, S, Q, and V shall be M, D, and R and for device class M shall be M and D. RHA quality conformance inspection sample tests shall be performed at the RHA level specified in the acquisition document. a. RHA tests for device classes B and S for levels M, D, and R or for device class M for levels M and D shall be performed through each level to determine at what levels the devices meet the RHA requirements. These RHA tests shall be performed for initial qualification and after design or process changes which may affect the RHA performance of the device. b. End-point electrical parameters shall be as specified in table IIA herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 23 c. Prior to total dose irradiation, each selected sample shall be assembled in its qualified package. It shall pass the specified group A electrical parameters in table I for subgroups specified in table IIA herein. d. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device classes M, B, and S, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ±5°C, after exposure, to the subgroups specified in table IIA herein. e. Prior to and during total dose irradiation characterization and testing, the devices for characterization shall be biased so that 50 percent are at inputs high and 50 percent are at inputs low, and the devices for testing shall be biased to the worst case condition established during characterization. The devices shall be biased as follows: (1) Inputs tested high, VCC = 5.5 V dc +5 percent, RCC = 10Ω ±20 percent, VIN = 5.0 V dc +5 percent, RIN = 1 kΩ ±20 percent and all outputs are open. The output enable control pin(s) shall be connected to RIN in parallel to VCC or GND, as applicable, to enable the outputs. (2) Inputs tested low, VCC = 5.5 V dc +5 percent, RCC = 10Ω ±20 percent, VIN = 0.0 V dc, RIN = 1 kΩ ±20 percent and all outputs are open. The output enable control pin(s) shall be connected to RIN in parallel to VCC or GND, as applicable, to enable the outputs. f. For device classes M, B, and S, subgroups 1 and 2 in table V, method 5005 of MIL-STD-883 shall be tested as appropriate for device construction. Device classes Q and V, shall be tested as appropriate for device construction, as determined in the device manufacturers QM plan. g. When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied. 4.5 Methods of inspection. Methods of inspection shall be specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal. Currents given are conventional current and positive when flowing into the referenced terminal. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device classes M, B, and S. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone (614) 692-0547. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 24 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes B and S. Sources of supply for device classes B and S are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.3 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 25 APPENDIX A A.1 SCOPE A.1.1 Scope. This appendix contains the PIN substitution information to support the one part-one part number system. For new designs, after the date of this document the NEW PIN shall be used in lieu of the OLD PIN. For existing designs prior to the date of this document the NEW PIN can be used in lieu of the OLD PIN. This appendix is a mandatory part of the specification. The information contained herein is intended for compliance. The PIN substitution data shall be as follows. A.2 APPLICATION DOCUMENTS This section is not applicable to this appendix. A.3 SUBSTITUTION DATA New PIN 5962-8776001MRX 5962-8776001MSX 5962-8776001M2X 5962-8776001MLX 5962-8776001M3X Old PIN 5962-8776001RX 5962-8776001SX 5962-87760012X 5962-8776001LX 5962-87760013X STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87760 A REVISION LEVEL D SHEET 26 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 01-06-29 Approved sources of supply for SMD 5962-87760 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit drawing PIN 1/ 5962-8776001MRA 5962-8776001MSA 5962-8776001M2A 5962-8776001BRA 5962-8776001BSA 5962-8776001B2A 5962-8776001SRA 5962-8776001SSA 5962-8776001S2A 5962-87760023A 5962-8776002LA 5962-8776002M3A 5962-8776002MLA 5962R8776001BRA 5962R8776001BSA 5962R8776001B2A 5962R8776001SRA 5962R8776001SSA 5962R8776001S2A Vendor CAGE number 27014 01295 27014 01295 27014 01295 27014 27014 27014 3/ 3/ 27014 3/ 3/ 3/ 3/ 27014 27014 27014 27014 27014 27014 Vendor similar PIN 2/ 54ACT244DMQB SNJ54ACT244J 54ACT244FMQB SNJ54ACT244W 54ACT244LMQB SNJ54ACT244FK JM54ACT244BRA JM54ACT244BSA JM54ACT244B2A 54ACT244 54ACT244 JM54ACT244S2A 54ACT11244 54ACT11244 54ACT11244 54ACT11244 JM54ACT244BRA-RH JM54ACT244BSA-RH JM54ACT244B2A-RH JM54ACT244SRA-RH JM54ACT244SSA-RH JM54ACT244S2A-RH 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. Vendor CAGE number 27014 01295 Vendor name and address National Semiconductor 2900 Semiconductor Drive P.O. Box 58090 Santa Clara, CA 95052-8090 Point of contact: 5 Foden Road South Portland, ME 04106 Texas Instruments 8505 Forest Ln. P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84 M/S 853 Sherman, TX 75090-9493 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.