ETC 5962D9568802VGC

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Update boilerplate and make change to output resistance test as specified
in table I. - ro
98-06-16
R. MONNIN
B
Changes to 1.2.4, 1.3, and 1.4. Update boilerplate. –rrp
99-06-08
R. MONNIN
REV
SHEET
REV
B
SHEET
15
REV STATUS
REV
B
B
B
B
B
B
B
B
B
B
B
B
B
B
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
RICK OFFICER
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
CHECKED BY
RAJESH PITHADIA
APPROVED BY
MICHAEL FRYE
MICROCIRCUIT, LINEAR, RADIATION HARDENED,
WIDEBAND, HIGH INPUT
DRAWING APPROVAL DATE
95-11-07
REVISION LEVEL
B
IMPEDANCE, OPERATIONAL AMPLIFIER,
MONOLITHIC SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1 OF
5962-95688
15
5962-E302-99
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)
and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
*
*
*
Federal
stock class
designator
\
D
*
*
*
RHA
designator
(see 1.2.1)
95688
01
*
*
*
Device
type
(see 1.2.2)
V
*
*
*
Device
class
designator
(see 1.2.3)
/
G
*
*
*
Case
outline
(see 1.2.4)
X
*
*
*
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
HS-2620RH
02
HS-2622RH
Circuit function
Radiation hardened, D.I., wideband, high
impedance, uncompensated operational amplifier
Radiation hardened, D.I., wideband, high
impedance, uncompensated operational amplifier
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows:
Device class
Device requirements documentation
M
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN
class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
G
P
Descriptive designator
MACY1-X8
GDIP1-T8 or CDIP2-T8
Terminals
8
8
Package style
Can
Dual-in-line
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
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REVISION LEVEL
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2
1.3 Absolute maximum ratings. 1/
Voltage between +VS and -VS ..........................................................................................
Differential input voltage (VIND)..........................................................................................
Voltage at either input terminal .........................................................................................
Peak output current ..........................................................................................................
Maximum package dissipation (PD) at TA = +125°C:
Case G ............................................................................................................................
Case P ............................................................................................................................
Junction temperature (TJ).................................................................................................
Storage temperature range ..............................................................................................
Lead temperature (soldering, 10 seconds) ......................................................................
Thermal resistance, junction-to-case (θJC):
Case G ............................................................................................................................
Case P ............................................................................................................................
Thermal resistance, junction-to-ambient (θJA):
Case G ............................................................................................................................
Case P ............................................................................................................................
40 V
12 V
+VS to -VS
Full short circuit protection
0.31 W 2/
0.44 W 2/
+175°C
-65°C to +150°C
+300°C
70°C/W
28°C/W
160°C/W
115°C/W
1.4 Recommended operating conditions.
Supply voltage range (±VS)...............................................................................................
Common-mode input voltage (VCMIN)...............................................................................
Load resistance (RL) .........................................................................................................
Ambient operating temperature range (TA) ......................................................................
±15 V
≤1/2 (+VS - -VS)
≥2 kΩ
-55°C to +125°C
1.5 Radiation features.
Neutron ........................................................................................................................... 3/
Maximum total dose available (dose rate = 50 – 300 rads (Si)/s).................................. 10 Krads (Si)
Latch up .......................................................................................................................... 4/
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of
this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue
of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
1/
2/
3/
4/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based
on θJA)at the following rates:
Case outline G..............................................................................6.2 mW/°C
Case outline P ..............................................................................8.7 mW/°C
Value to be specified when testing is complete.
Not required for this technology.
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STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 MIL-STD-973 MIL-STD-1835 -
Test Method Standard Microcircuits.
Configuration Management.
Interface Standard For Microcircuit Case Outlines.
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings (SMD's).
Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific
exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device
class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Radiation exposure circuit. The radiation exposure circuit shall be as specified on figure 2.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical
performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient
operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests
for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked
as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the
manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator
shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M
shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
STANDARD
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TABLE I. Electrical performance characteristics.
Test
Input offset voltage
Symbol
VIO
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
1
01
Min
-4
Max
+4
02
-5
+5
01
-6
+6
02
-7
+7
01
-6
+6
VCM = 0 V
2,3
M,D
Input bias current
+IIB
1
VCM = 0 V, +RS = 100 kΩ,
-IIB
02
-7
+7
01
-15
+15
02
-25
+25
2,3
01
-35
+35
02
-60
+60
01
-35
+35
02
-60
+60
01
-15
+15
02
-25
+25
01
-35
+35
02
-60
+60
01
-35
+35
02
-60
+60
01
-15
+15
02
-25
+25
01
-35
+35
02
-60
+60
01
-35
+35
02
-60
+60
01
80
02
74
01
80
02
74
01
80
02
74
01
80
02
74
1
VCM = 0 V, +RS = 100 Ω,
1
-RS = 100 kΩ
2,3
M,D
Input offset current
IIO
1
1
VCM = 0 V, +RS = 100 kΩ,
-RS = 100 kΩ
2,3
M,D
Common mode rejection
+CMRR
ratio
1
∆VCM = +10 V,
1,2,3
+VS = +5 V, -VS = -25 V,
VOUT = -10 V
M,D
-CMRR
1
∆VCM = -10 V,
1,2,3
+VS = +25 V, -VS = -5 V,
VOUT = +10 V
M,D
Unit
1
-RS = 100 Ω
M,D
Limits
1
mV
nA
nA
dB
See footnotes at end of table.
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TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Common mode voltage
+VCMR
+VS = +4 V, -VS = -26 V
range
-VCMR
+VS = +26 V, -VS = -4 V
Output voltage swing
+VOUT
RL = 2 kΩ
Group A
subgroups
Device
type
1,2,3
01,02
Min
11
1,2,3
01,02
+10
1
1,2,3
RL = 2 kΩ
M,D
Output current
+IOUT
VOUT = -10 V
1
VOUT = +10 V
M,D
Quiescent power supply
+ICC
VOUT = 0 V, IOUT = 0 mA
M,D
-10
-10
+15
+10
2,3
01,02
+7.5
1
01,02
+7.5
1
01
02
-10
2,3
01,02
-7.5
1
01,02
-7.5
1
01
3.7
02
4.0
01
4.0
02
4.3
01
4.0
1
1
2,3
M,D
+PSRR
ratio
1
+VS = 10 V and -VS = -15 V,
1,2,3
+VS = 20 V and -VS = -15 V,
mA
-15
02
VOUT = 0 V, IOUT = 0 mA
V
01
2,3
Power supply rejection
V
02
current
-ICC
Max
+10
01,02
1
M,D
-IOUT
Unit
-11
M,D
-VOUT
Limits
mA
4.3
01
-3.7
02
-4
01
-4
02
-4.3
01
-4
02
-4.3
01
80
02
74
01
80
02
74
01
80
02
74
01
80
02
74
dB
∆VSUP = ±5 V
M,D
-PSRR
1
+VS = 15 V and -VS = -10 V,
1,2,3
+VS = 15 V and -VS = -20 V,
∆VSUP = ±5 V
M,D
1
See footnotes at end of table.
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TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
VOUT = 1 V, RL = 10 Ω, 3/
1
01,02
Limits
Min
Output short circuit
+ISC
current
CL = 50 pF
-ISC
VOUT = -1 V, RL = 10 Ω, 3/
Quiescent power
consumption
PC
VOUT = 0 V, 3/ 4/
IOUT = 0 mA, CL = 50 pF
Large signal voltage
+AVOL
VOUT = 0 V and +10 V,
gain
2
45
60
2
-45
-60
1,2,3
01,02
4
01
02
80
5,6
01
70
02
60
01
70
-AVOL
4
VOUT = 0 V and -10 V,
4
RL = 2 kΩ
5,6
M,D
Slew rate
+SR
4
VOUT = -5 V to +5 V,
4
measured at 25 % and 75 %
points, CL = 50 pF,
5,6
RL = 2 kΩ, AVCL = +5 V/V
-SR
VOUT = +5 V to -5 V,
4
measured at 75 % and 25 %
points, CL = 50 pF,
5,6
RL = 2 kΩ, AVCL = +5 V/V
Overshoot
+OS
VOUT = 0 V to 200 mV,
4,5,6
CL = 50 pF, RL = 2 kΩ,
AVCL = +5 V/V
-OS
VOUT = 0 V to -200 mV,
4,5,6
CL = 50 pF, RL = 2 kΩ,
AVCL = +5 V/V
Differential input
resistance
RIN
4
VCM = 0 V, RL = 2 kΩ, 3/
CL = 50 pF, TA = +25°C
mA
-50
3
RL = 2 kΩ
M,D
Max
50
3
1
CL = 50 pF
Unit
240
100
02
60
01
100
02
80
01
70
02
60
01
70
02
60
01
25
02
20
01
20
02
15
01
25
02
20
01
20
02
15
kV/V
V/µs
01
70
02
80
01
70
02
80
01
65
02
40
mW
%
MΩ
See footnotes at end of table.
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TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Open loop, RL = 2 kΩ, 3/
4
01,02
4
01
400
02
320
4,5,6
01,02
5
9
01,02
45
10,11
01
60
02
70
9
01,02
45
10,11
01
60
02
70
Limits
Min
Output resistance
ROUT
Full power bandwidth
FPBW
Unit
Max
30
Ω
CL = 50 pF, TA = +25°C
VPK = 10 V, RL = 2 kΩ 3/ 5/
CL = 50 pF, TA = +25°C
Minimum closed loop
CLSG
RL = 2 kΩ, CL = 50 pF 3/
TRR
VOUT = 0 V to 200 mV,
measured at 10 % to 90 %,
kHz
V/V
stable gain
Rise and fall time
RL = 2 kΩ, CL = 50 pF
AV = +5 V/V
TRF
VOUT = 0 V to -200 mV,
measured at 10 % to 90 %,
RL = 2 kΩ, CL = 50 pF
AV = +5 V/V
ns
1/ Unless otherwise specified, device tested at +VS = +15 V, -VS = -15 V, source resistance (RS) = 100 Ω,
load resistance (RL) = 500 kΩ, VOUT = 0 V. See figure 3.
2/ Devices supplied to this drawing meet all levels M and D of irradiation however this device is only tested at the D level.
Pre and post irradiation values are identical unless otherwise specified in table I.
3/ If not tested, shall be guaranteed to the limits specified in table I herein.
4/ Quiescent power consumption based upon quiescent supply current test maximum. No load on outputs.
5/ Full power bandwidth guarantee based on slew rate measurement using FPBW = slew rate / (2πVPK).
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed
manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing
shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or
for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein)
involving devices acquired to this drawing is required for any change as defined in MIL-STD-973.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available
onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit
group number 49 (see MIL-PRF-38535, appendix A).
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Device type
01
Case outlines
G and P
Terminal number
Terminal symbol
1
BALANCE
2
-INPUT
3
+INPUT
4
-VS
5
BALANCE
6
OUTPUT
7
+VS
8
COMPENSATION
FIGURE 1. Terminal connections.
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FIGURE 2. Radiation exposure circuit.
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NOTE: Measured on both positive and negative transitions. Capacitance at compensation pin should be minimized.
FIGURE 3. Timing diagrams.
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4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MILPRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not
affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance
with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on
all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with
method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015.
(2) TA = +125°C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device
manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document
revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B or as modified in the device manufacturer’s Quality Management (QM) plan.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 or as specified in QM plan including groups A, B, C, D, and E inspections and as specified herein except where
option 2 of MIL-PRF-38535 permits alternate in-line control testing. Quality conformance inspection for device class M shall be in
accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be
those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
Subgroups 7 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted.
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TABLE IIA. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-STD-883,
method 5005, table I)
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Device
class M
Device
class Q
Device
class V
Interim electrical
parameters (see 4.2)
1,4,9
1,4,9
1,4,9
Final electrical
parameters (see 4.2)
1,2,3,4,5,6, 1/
9,10,11
1,2,3,4,5, 1/
6,9,10,11
1,2,3, 1/ 2/
4,5,6,9,10,11
Group A test
requirements (see 4.4)
1,2,3,4,5,6,
9,10,11
1,2,3,4,5,6,
9,10,11
1,2,3,4,5,6,
9,10,11
Group C end-point electrical
parameters (see 4.4)
1,2,3,4,5,6,
9,10,11
1,2,3,4,5,6,
9,10,11
1,2,3,4,5, 2/
6,9,10,11
Group D end-point electrical
parameters (see 4.4)
1,4,9
1,4,9
1,4,9
Group E end-point electrical
parameters (see 4.4)
1,4
1,4
1,4
1/ PDA applies to subgroup 1. For class V to subgroups 1, 4, 9, and ∆.
2/ Delta limits (see table IIB) shall be required and the delta values shall be computed with
reference to the zero hour electrical parameters (see table I).
TABLE IIB. Burn-in and operating life test delta parameters (+25°C).
Parameters
Input offset voltage
Positive input bias current
Negative input bias current
Symbol
VIO
+IIB
-IIB
Delta limits
±2 mA
±10 nA
±10 nA
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs,
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MILSTD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-95688
A
REVISION LEVEL
B
SHEET
13
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or
approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test
circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MILSTD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein). RHA levels for device classes M, Q, and V shall be as specified in MIL-PRF-38535. End-point electrical
parameters shall be as specified in table IIA herein.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883 method
1019 condition A and as specified herein.
4.4.4.1.1 Accelerated aging test. Accelerated aging tests shall be performed on all devices requiring a RHA level greater than 5k
rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be the pre-irradiation
end-point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and after any design or process
changes which may affect the RHA response of the device.
4.4.4.2 Neutron testing. Neutron testing shall be performed in accordance with test method 1017 of MIL-STD-883 and herein.
All device classes must meet the post irradiation end-point electrical parameter limits as defined in table I, for the subgroups
12
2
specified in Table IIA herein at TA = +25°C ± 5°C after an exposure of 2 x 10 neutrons/cm (minimum).
4.4.4.3 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with test method
1020 of MIL-STD-883 and as specified herein (see 1.5). Tests shall be performed on devices, SEC, or approved test structures at
technology qualification and after any design or process changes which may effect the RHA capability of the process.
4.4.4.4 Dose rate burnout. When required by the customer, test shall be performed on devices, SEC, or approved test
structures at technology qualifications and after any design or process changes which may effect the RHA capability of the process.
Dose rate burnout shall be performed in accordance with test method 1023 of MIL-STD-883 and as specified herein.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q
and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original
equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared
specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the
individual documents. This coordination will be accomplished in accordance with MIL-STD-973 using DD Form 1692, Engineering
Change Proposal.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-95688
A
REVISION LEVEL
B
SHEET
14
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application
requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will
be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC
5962) should contact DSCC-VA, telephone (614) 692-0525.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone (614)
692-0674.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The
vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this
drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The
vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to
and accepted by DSCC-VA.
6.7 Additional information. When applicable a copy of the following additional data shall be maintained and available from the
device manufacturer.
a. RHA upset levels.
b. Test conditions (SEP).
c. Number of upsets (SEP).
d. Number of transients (SEP).
e. Occurrence of latchup (SEP).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-95688
A
REVISION LEVEL
B
SHEET
15
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 99-06-08
Approved sources of supply for SMD 5962-95688 are listed below for immediate acquisition information only and shall
be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised
to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of
compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of
MIL-HDBK-103 and QML-38535.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962D9568801VGA
34371
HS2-2620RH-Q
5962D9568801VPA
34371
HS7-2620RH-Q
5962D9568801VPC
34371
HS7B-2620RH-Q
5962D9568802VGA
34371
HS2-2622RH-Q
5962D9568802VPA
34371
HS7-2622RH-Q
5962D9568802VPC
34371
HS7B-2622RH-Q
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed, contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
34371
Vendor name
and address
Harris Semiconductor
P.O. Box 883
Melbourne, FL 32902-0883
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.