ETC CY74FCT2245T

CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
D
D
D
D
D
D
D
D
P, Q, OR SO PACKAGE
(TOP VIEW)
Function and Pinout Compatible With FCT
and F Logic
25-Ω Output Series Resistors to Reduce
Transmission-Line Reflection Noise
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
Ioff Supports Partial-Power-Down Mode
Operation
Fully Compatible With TTL Input and
Output Logic Levels
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
12-mA Output Sink Current
15-mA Output Source Current
3-State Outputs
T/R
A0
A1
A2
A3
A4
A5
A6
A7
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE
B0
B1
B2
B3
B4
B5
B6
B7
description
The CY74FCT2245T contains eight noninverting, bidirectional buffers with 3-state outputs intended for
bus-oriented applications. On-chip termination resistors at the outputs reduce system noise caused by
reflections. For this reason, the CY74FCT2245T can replace the CY74FCT245T in an existing design. The
CY74FCT2245T current-sinking capability is 12 mA at the A and B ports.
The transmit/receive (T/R) input determines the direction of data flow through the bidirectional transceiver.
Transmit (active high) enables data from A ports to B ports; receive (active low) enables data from B ports to
A ports. The output-enable (OE) input, when high, disables both the A and B ports by putting them in the
high-impedance state.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
PACKAGE†
TA
QSOP – Q
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Tape and reel
4.1
CY74FCT2245CTQCT
Tube
4.1
CY74FCT2245CTSOC
Tape and reel
4.1
CY74FCT2245CTSOCT
DIP – P
Tube
4.6
CY74FCT2245ATPC
74FCT2245ATPC
QSOP – Q
Tape and reel
4.6
CY74FCT2245ATQCT
FCT2245A
Tube
4.6
CY74FCT2245ATSOC
Tape and reel
4.6
CY74FCT2245ATSOCT
Tape and reel
7.0
CY74FCT2245TQCT
Tube
7.0
CY74FCT2245TSOC
Tape and reel
7.0
CY74FCT2245TSOCT
SOIC – SO
–40°C
40°C to 85°C
SPEED
(ns)
SOIC – SO
QSOP – Q
SOIC – SO
FCT2245
FCT2245
FCT2245A
FCT2245
FCT2245
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
FUNCTION TABLE
INPUTS
OE
OUTPUT
T/R
L
L
Bus B data to bus A
L
H
Bus A data to bus B
H
X
Z
H = High logic level, L = Low logic level,
X = Don’t care, Z = High-impedance state
logic diagram (positive logic)
T/R
1
19
A0
OE
2
18
B0
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θJA (see Note 1): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
NOM
MAX
UNIT
5
5.25
V
Supply voltage
VIL
IOH
Low-level input voltage
0.8
V
High-level output current
–15
mA
IOL
TA
Low-level output current
12
mA
85
°C
High-level input voltage
2
Operating free-air temperature
–40
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
2
MIN
4.75
VCC
VIH
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
V
CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
VOH
VCC = 4.75,
VCC = 4.75,
IIN = –18 mA
IOH = –15 mA
VOL
Rout
VCC = 4.75,
VCC = 4.75,
IOL = 12 mA
IOL = 12 mA
Vhys
II
All inputs
IIH
IIL
IOZH
IOZL
IOS‡
Ioff
ICC
∆ICC
ICCD¶
IC#
MIN
2.4
20
TYP†
MAX
UNIT
–0.7
–1.2
V
3.3
V
0.3
0.55
V
25
40
Ω
5
µA
±1
µA
±1
µA
10
µA
0.2
VCC = 5.25 V,
VCC = 5.25 V,
VIN = VCC
VIN = 2.7 V
VCC = 5.25 V,
VCC = 5.25 V,
VIN = 0.5 V
VOUT = 2.7 V
VCC = 5.25 V,
VCC = 5.25 V,
VOUT = 0.5 V
VOUT = 0 V
–60
VCC = 0 V,
VCC = 5.25 V,
–120
V
–10
µA
–225
mA
±1
µA
VOUT = 4.5 V
VIN ≤ 0.2 V,
VIN ≥ VCC – 0.2 V
VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open
0.1
0.2
mA
0.5
2
mA
VCC = 5.25 V, One input switching at 50% duty cycle, Outputs open,
T/R = OE = GND, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V
0.06
0.12
mA/
MHz
0.7
1.4
1
2.4
1.3
2.6||
3.3
10.6||
5
10
VCC = 5.25 V,
Outputs open,
open
T/R = OE = GND
One input switching
at f1 = 10 MHz
at 50% duty cycle
Eight bits switching
at f1 = 2.5 MHz
at 50% duty cycle
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
VIN = 3.4 V or GND
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
VIN = 3.4 V or GND
Ci
mA
pF
Co
9
12
pF
† Typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In
any sequence of parameter tests, IOS tests should be performed last.
§ Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
¶ This parameter is derived for use in total power-supply calculations.
# IC
= ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1)
Where:
IC
= Total supply current
ICC = Power-supply current with CMOS input levels
∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)
DH
= Duty cycle for TTL inputs high
NT
= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0
= Clock frequency for registered devices, otherwise zero
f1
= Input signal frequency
N1
= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
switching characteristics over operating free-air temperature range (see Figure 1)
4
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
An or Bn
Bn or An
tPZH
tPZL
OE
A or B
tPHZ
tPLZ
OE
A or B
POST OFFICE BOX 655303
CY74FCT2245T
CY74FCT2245AT
CY74FCT2245CT
MIN
MAX
MIN
MAX
MIN
MAX
1.5
7
1.5
4.6
1.5
4.1
1.5
7
1.5
4.6
1.5
4.1
1.5
9.5
1.5
6.2
1.5
5.8
1.5
9.5
1.5
6.2
1.5
5.8
1.5
7.5
1.5
5
1.5
4.5
1.5
7.5
1.5
5
1.5
4.5
• DALLAS, TEXAS 75265
UNIT
ns
ns
ns
CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
PARAMETER MEASUREMENT INFORMATION
7V
From Output
Under Test
From Output
Under Test
Test
Point
CL = 50 pF
(see Note A)
Open
TEST
GND
CL = 50 pF
(see Note A)
500 Ω
S1
500 Ω
S1
Open
7V
Open
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
500 Ω
LOAD CIRCUIT FOR
3-STATE OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
1.5 V
Timing Input
0V
tw
tsu
3V
1.5 V
Input
1.5 V
th
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPLH
tPHL
1.5 V
1.5 V
VOL
tPHL
Out-of-Phase
Output
tPLZ
≈3.5 V
1.5 V
tPZH
VOH
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
0V
Output
Waveform 1
(see Note B)
tPLH
1.5 V
1.5 V
tPZL
VOH
In-Phase
Output
3V
Output
Control
Output
Waveform 2
(see Note B)
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH – 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
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Copyright  2001, Texas Instruments Incorporated