1CY74FCT16445T/2 H245T CY74FCT16245T CY74FCT162245T CY74FCT162H245T Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. 16-Bit Transceivers SCCS026B - July 1994 - Revised September 2001 Features Functional Description • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temperature range of –40˚C to +85˚C • VCC = 5V ± 10% CY74FCT16245T Features: • 64 mA sink current, 32 mA source current • Typical VOLP (ground bounce)<1.0V at VCC = 5V, TA = 25˚C These 16-bit transceivers are designed for use in bidirectional synchronous communication between two buses, where high speed and low power are required. With the exception of the CY74FCT16245T, these devices can be operated either as two independent octals or a single 16-bit transceiver. Direction of data flow is controlled by (DIR), the Output Enable (OE) transfers data when LOW and isolates the buses when HIGH. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16245T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162245T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162245T is ideal for driving transmission lines. CY74FCT162245T Features: • Balanced output drivers: 24 mA • Reduced system switching noise • Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25˚C CY74FCT162H245T Features: • Bus hold on data inputs • Eliminates the need for external pull-up or pull-down resistors The CY74FCT162H245T is a 24-mA balanced output part that has bus hold on the data inputs. The device retains the input’s last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs. Logic Block Diagrams CY74FCT16245T,CY74FCT162245T, CY74FCT162H245T 1DIR Pin Configuration SSOP/TSSOP Top View 2DIR 1OE 1A1 2OE 1DIR 1 48 1OE 1B1 2 3 47 46 1A2 GND 1B3 4 5 45 44 GND 1A3 1B4 VCC 1B5 6 2B2 2B3 GND 2A1 1B1 1A2 1B2 2B1 2A2 1B2 1A3 2A3 1B3 1A4 1B4 1A5 2B4 1A6 2A6 1A7 2B6 2A7 1B7 1A8 2B7 2A8 1B8 FCT16245–1 VCC 1A5 GND 1B7 11 38 1A7 1B8 12 13 37 36 1A8 35 34 2A2 GND 14 15 GND 2B3 16 33 2A3 2B4 17 32 2A4 VCC 2B5 18 31 19 30 VCC 2A5 2B2 2B5 1B6 1A4 2B1 2A5 1B5 43 7 16245T 42 8 162245T 41 162H245T 9 40 10 39 1B6 2A4 2B8 1A1 1A6 2A1 2B6 20 29 2A6 GND 21 28 GND 2B7 22 27 2A7 2B8 23 26 2A8 2DIR 24 25 2OE FCT16245–3 FCT16245–2 Copyright © 2001, Texas Instruments Incorporated CY74FCT16245T CY74FCT162245T CY74FCT162H245T Maximum Ratings[3, 4] Pin Description Name (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ........................Com’l -55°C to +125°C Description OE Three-State Output Enable Inputs (Active LOW) DIR Direction Control A Inputs or Three-State Outputs[1] Ambient Temperature with Power Applied....................................Com’l -55°C to +125°C B Inputs or Three-State Outputs[1] DC Input Voltage ........................................... –0.5V to +7.0V DC Output Voltage......................................... –0.5V to +7.0V DC Output Current (Maximum Sink Current/Pin) ........................–60 to +120 mA Function Table[2] Inputs Power Dissipation .......................................................... 1.0W OE DIR Outputs L L Bus B Data to Bus A Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) L H Bus A Data to Bus B Operating Range H X High Z State Range Industrial Ambient Temperature VCC –40°C to +85°C 5V ± 10% Notes: 1. On CY74FCT162H245T these pins have bus hold. 2. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance. 3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range. 4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. Electrical Characteristics Over the Operating Range Parameter Description VIH Input HIGH Voltage VIL Input LOW Voltage VH Input Hysteresis[6] VIK Input Clamp Diode Voltage IIH Input HIGH Current Test Conditions Min. Typ.[5] 2.0 0.8 100 VCC=Min., IIN=–18 mA Standard Input LOW Current Standard –0.7 VCC=Max., VI=VCC IBBH IBBL Bus Hold Sustain Current on Bus Hold IBHHO IBHLO Bus Hold Overdrive Current on Bus Hold IOZH High Impedance Output Current (Three-State Output pins) IOZL IOS IO IOFF Input[7] V mV –1.2 V ±1 µA ±100 VCC=Max., VI=GND Bus Hold Input[7] Unit V Bus Hold IIL Max. VCC=Min. VI=2.0V –50 VI=0.8V +50 ±1 µA ±100 µA µA TBD mA VCC=Max., VOUT=2.7V ±1 µA High Impedance Output Current (Three-State Output pins) VCC=Max., VOUT=0.5V ±1 µA Short Circuit Current[8] VCC=Max., VOUT=GND –80 –200 mA Current[8] VCC=Max., VOUT=2.5V –50 –180 mA ±1 µA Output Drive Power-Off Disable VCC=Max., VI=1.5V VCC=0V, VOUT≤4.5V 2 [9] –140 CY74FCT16245T CY74FCT162245T CY74FCT162H245T Output Drive Characteristics for CY74FCT16245T Parameter VOH VOL Min. Typ.[5] VCC=Min., IOH=–3 mA 2.5 3.5 V VCC=Min., IOH=–15 mA 2.4 3.5 V VCC=Min., IOH=–32 mA 2.0 3.0 V Description Output HIGH Voltage Output LOW Voltage Test Conditions VCC=Min., IOL=64 mA Max. Unit 0.2 0.55 V Typ.[5] Max. Unit Output Drive Characteristics for CY74FCT162245T, CY74FCT162H245T Parameter Description [8] Test Conditions Min. IODL Output LOW Current VCC=5V, VIN=VIH or VIL, VOUT=1.5V 60 115 150 mA IODH Output HIGH Current[8] VCC=5V, VIN=VIH or VIL, VOUT=1.5V –60 –115 –150 mA VOH Output HIGH Voltage VCC=Min., IOH=–24 mA 2.4 3.3 VOL Output LOW Voltage VCC=Min., IOL=24 mA 0.3 V 0.55 V Notes: 5. Typical values are at VCC=5.0V, TA=+25˚C ambient. 6. This parameter is specified but not tested. 7. Pins with bus hold are described in Pin Description. 8. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 9. Tested at +25˚C. Capacitance[6] (TA = +25˚C, f = 1.0 MHz) Parameter Description Test Conditions Typ.[5] Max. Unit CIN Input Capacitance VIN = 0V 4.5 6.0 pF COUT Output Capacitance VOUT = 0V 5.5 8.0 pF 3 CY74FCT16245T CY74FCT162245T CY74FCT162H245T Power Supply Characteristics Parameter Description Test Conditions Typ.[5] Max. Unit 5 500 µA 0.5 1.5 mA ICC Quiescent Power Supply Current VCC=Max. VIN<0.2V, VIN>VCC-0.2V ∆ICC Quiescent Power Supply Current VCC=Max. (TTL inputs HIGH) VIN=3.4V[10] ICCD Dynamic Power Supply Current[11] VCC=Max., One Input Toggling, VIN=VCC or 50% Duty Cycle, Outputs Open, VIN=GND OE=DIR=GND 60 100 µA/MHz IC Total Power Supply Current[12] VCC=Max., f1=10 MHz, VIN=VCC or 50% Duty Cycle, Outputs Open, VIN=GND One Bit Toggling, VIN=3.4V or OE=DIR=GND VIN=GND 0.6 1.5 mA 0.9 2.3 mA VCC=Max., f1=2.5 MHz, 50% Duty Cycle, Outputs Open, Sixteen Bits Toggling, OE=DIR=GND VIN=VCC or VIN=GND 2.4 4.5[13] mA VIN=3.4V or VIN=GND 6.4 16.5[13] mA Notes: 10. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. = IQUIESCENT + IINPUTS + IDYNAMIC 12. IC IC = ICC+∆ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) DH = Duty Cycle for TTL inputs HIGH NT = Number of TTL inputs at DH ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 N1 = Number of inputs changing at f1 All currents are in milliamps and all frequencies are in megahertz. 13. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 4 CY74FCT16245T CY74FCT162245T CY74FCT162H245T ] Switching Characteristics Over the Operating Range[14] 74FCT16245T 74FCT162245T Parameter Description 74FCT16245AT 74FCT162245AT 74FCT162H245AT Min. Max. Min. Max. Unit Fig. No.[15] tPLH tPHL Propagation Delay Data to Output A to B, B to A 1.5 7.0 1.5 4.5 ns 1, 3 tPZH tPZL Output Enable Time OE to A or B 1.5 9.5 1.5 6.2 ns 1, 7, 8 tPHZ tPLZ Output Disable Time OE to A or B 1.5 7.5 1.5 5.0 ns 1, 7, 8 tPZH tPZL Output Enable Time DIR to A or B 1.5 9.5 1.5 6.2 ns 1, 7, 8 tPHZ tPLZ Output Disable Time DIR to A or B 1.5 7.5 1.5 5.0 ns 1, 7, 8 tSK(O) Output Skew[16] 0.5 ns — 0.5 74FCT16245CT 74FCT162245CT 74FCT162H245CT Parameter Description Min. Max. Unit Fig. No.[15] tPLH tPHL Propagation Delay Data to Output A to B, B to A 1.5 4.1 ns 1, 3 tPZH tPZL Output Enable Time OE to A or B 1.5 5.8 ns 1, 7, 8 tPHZ tPLZ Output Disable Time OE to A or B 1.5 4.8 ns 1, 7, 8 tPZH tPZL Output Enable Time DIR to A or B 1.5 5.8 ns 1, 7, 8 tPHZ tPLZ Output Disable Time DIR to A or B 1.5 4.8 ns 1, 7, 8 tSK(O) Output Skew[16] 0.5 ns — Note: 14. Minimum limits are specified but not tested on Propagation Delays. 15. See “Parameter Measurement Information” in the General Information section. 16. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design. Ordering Information CY74FCT16245 Speed (ns) 4.1 4.5 7.0 Ordering Code Package Name Package Type CY74FCT16245CTPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT16245CTPVC/PVCT O48 48-Lead (300-Mil) SSOP CY74FCT16245ATPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT16245ATPVC/PVCT O48 48-Lead (300-Mil) SSOP CY74FCT16245TPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT16245TPVC/PVCT O48 48-Lead (300-Mil) SSOP 5 Operating Range Industrial Industrial Industrial CY74FCT16245T CY74FCT162245T CY74FCT162H245T Ordering Information CY74FCT162245 Speed (ns) 4.1 4.5 7.0 Ordering Code Package Name Package Type CY74FCT162245CTPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT162245CTPVC O48 48-Lead (300-Mil) SSOP 74FCT162245CTPVCT O48 48-Lead (300-Mil) SSOP 74FCT162245ATPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT162245ATPVC O48 48-Lead (300-Mil) SSOP 74FCT162245ATPVCT O48 48-Lead (300-Mil) SSOP CY74FCT162245TPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT162245TPVC/PVCT O48 48-Lead (300-Mil) SSOP Operating Range Industrial Industrial Industrial Ordering Information CY74FCT162H245 Speed (ns) 4.1 4.5 Ordering Code Package Name Package Type 74FCT162H245CTPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT162H245CTPVC O48 48-Lead (300-Mil) SSOP 74FCT162H245CTPVCT O48 48-Lead (300-Mil) SSOP 74FCT162H245ATPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT162H245ATPVC O48 48-Lead (300-Mil) SSOP 74FCT162H245ATPVCT O48 48-Lead (300-Mil) SSOP 6 Operating Range Industrial Industrial CY74FCT16245T/2245T CY74FCT16445T/2H245T Package Diagrams 48-Lead Shrunk Small Outline Package O48 7 CY74FCT16245T CY74FCT162245T CY74FCT162H245T Package Diagrams 48-Lead Thin Shrunk Small Outline Package Z48 8 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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