AD AD829

High Speed, Low Noise
Video Op Amp
AD829
CONNECTION DIAGRAMS
8-Lead
PDIP(N), Cerdip (Q), and SOIC (R) Packages
OFFSET NULL 1
8
OFFSET NULL
–IN
2
7
+VS
+IN
3
6
OUTPUT
AD829
TOP VIEW 5 CCOMP
(Not to Scale)
–VS 4
20-Lead LCC Pinout
NC
OFFSET
NULL
NC
OFFSET
NULL
NC
FEATURES
High Speed
120 MHz Bandwidth, Gain = –1
230 V/␮s Slew Rate
90 ns Settling Time to 0.1%
Ideal for Video Applications
0.02% Differential Gain
0.04ⴗ Differential Phase
Low Noise
1.7 nV/√Hz Input Voltage Noise
1.5 pA/√Hz Input Current Noise
Excellent DC Precision
1 mV Max Input Offset Voltage (Over Temp)
0.3 mV/ⴗC Input Offset Drift
Flexible Operation
Specified for ⴞ5 V to ⴞ15 V Operation
ⴞ3 V Output Swing into a 150 ⍀ Load
External Compensation for Gains 1 to 20
5 mA Supply Current
Available in Tape and Reel in Accordance with
EIA-481A Standard
3
2
1 20 19
18 NC
NC 4
17 +V
–IN 5
AD829
NC 6
TOP VIEW
(Not to Scale)
+IN 7
16 NC
15 OUTPUT
14 NC
NC 8
The AD829’s external compensation pin gives it exceptional
versatility. For example, compensation can be selected to
optimize the bandwidth for a given load and power supply voltage.
As a gain-of-two line driver, the –3 dB bandwidth can be increased
to 95 MHz at the expense of 1 dB of peaking. The AD829’s
output can also be clamped at its external compensation pin.
The AD829 exhibits excellent dc performance. It offers a minimum open-loop gain of 30 V/mV into loads as low as 500 Ω,
low input voltage noise of 1.7 nV/√Hz, and a low input offset
voltage of 1 mV maximum. Common-mode rejection and power
supply rejection ratios are both 120 dB.
This op amp is also useful in multichannel, high speed data
conversion where its fast (90 ns to 0.1%) settling time is important. In such applications, the AD829 serves as an input buffer
for 8-bit to 10-bit A/D converters and as an output I/V converter for high speed DACs.
REV. G
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
NC
–V
NC = NO CONNECT
NC
CCOMP
The AD829 is a low noise (1.7 nV/√Hz), high speed op amp
with custom compensation that provides the user with gains of
± 1 to ± 20 while maintaining a bandwidth greater than 50 MHz.
The AD829’s 0.04° differential phase and 0.02% differential
gain performance at 3.58 MHz and 4.43 MHz, driving reverseterminated 50 Ω or 75 Ω cables, makes it ideally suited for
professional video applications. The AD829 achieves its 230 V/µs
uncompensated slew rate and 750 MHz gain bandwidth while
requiring only 5 mA of current from power supplies.
NC
9 10 11 12 13
GENERAL DESCRIPTION
Operating as a traditional voltage feedback amplifier, the AD829
provides many of the advantages a transimpedance amplifier
offers. A bandwidth greater than 50 MHz can be maintained for
a range of gains through the replacement of the external compensation capacitor. The AD829 and the transimpedance
amplifier are both unity gain stable and provide similar voltage
noise performance (1.7 nV/√Hz); however, the current noise of
the AD829 (1.5 pA/√Hz) is less than 10% of the noise of
transimpedance amps. The inputs of the AD829 are symmetrical.
PRODUCT HIGHLIGHTS
1. Input voltage noise of 2 nV/√Hz, current noise of 1.5 pA/√Hz,
and 50 MHz bandwidth, for gains of 1 to 20, make the AD829
an ideal preamp.
2. Differential phase error of 0.04° and a 0.02% differential
gain error, at the 3.58 MHz NTSC and 4.43 MHz PAL and
SECAM color subcarrier frequencies, make the op amp an
outstanding video performer for driving reverse-terminated
50 Ω and 75 Ω cables to ± 1 V (at their terminated end).
3. The AD829 can drive heavy capacitive loads.
4. Performance is fully specified for operation from ± 5 V to
± 15 V supplies.
5. The AD829 is available in plastic, CERDIP, and small outline
packages. Chips and MIL-STD-883B parts are also available.
The SOIC-8 package is available for the extended temperature range of –40°C to +125°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2004 Analog Devices, Inc. All rights reserved.
AD829–SPECIFICATIONS (@ T = 25ⴗC and V = ⴞ15 V dc, unless otherwise noted.)
A
Model
Conditions
INPUT OFFSET VOLTAGE
TMIN to TMAX
Offset Voltage Drift
INPUT BIAS CURRENT
S
VS
Min
AD829JR
Typ Max
± 5 V, ± 15 V
0.2
± 5 V, ± 15 V
0.3
± 5 V, ± 15 V
3.3
7
8.2
3.3
7
9.5
± 5 V, ± 15 V
50
500
500
50
500
500
± 5 V, ± 15 V
0.5
TMIN to TMAX
INPUT OFFSET CURRENT
TMIN to TMAX
Offset Current Drift
VO = ± 2.5 V
RLOAD = 500 Ω
TMIN to TMAX
RLOAD = 150 Ω
VOUT = ± 10 V
RLOAD = 1 kΩ
TMIN to TMAX
RLOAD = 500 Ω
OPEN-LOOP GAIN
DYNAMIC PERFORMANCE
Gain Bandwidth Product
Full Power Bandwidth1, 2
VO = 2 V p-p
RLOAD = 500 Ω
VO = 20 V p-p
RLOAD = 1 kΩ
RLOAD = 500 Ω
RLOAD = 1 kΩ
AV = –19
–2.5 V to +2.5 V
10 V Step
CLOAD = 10 pF
RLOAD = 1 kΩ
Slew Rate2
Settling Time to 0.1%
Phase Margin2
AD829AR
Min Typ Max
1
1
0.2
AD829AQ/S
Min Typ Max
1
1
0.1
0.3
mV
mV
µV/°C
3.3
7
9.5
µA
µA
50
500
500
nA
nA
nA/°C
0.3
0.5
Unit
0.5
0.5
0.5
±5 V
30
20
65
30
20
65
40
30
20
40
65
V/mV
V/mV
V/mV
40
± 15 V
50
20
100
50
20
100
85
50
20
85
100
85
V/mV
V/mV
V/mV
±5 V
± 15 V
600
750
600
750
600
750
MHz
MHz
±5 V
25
25
25
MHz
± 15 V
±5 V
± 15 V
3.6
150
230
3.6
150
230
3.6
150
230
MHz
V/µs
V/µs
±5 V
± 15 V
± 15 V
65
90
65
90
65
90
ns
ns
60
60
60
Degrees
0.02
0.02
0.02
%
RLOAD = 100 Ω
CCOMP = 30 pF
± 15 V
DIFFERENTIAL PHASE ERROR
RLOAD = 100 Ω
CCOMP = 30 pF
± 15 V
COMMON-MODE REJECTION
VCM = ± 2.5 V
VCM = ± 12 V
TMIN to TMAX
±5 V
± 15 V
POWER SUPPLY REJECTION
VS = ± 4.5 V to ± 18 V
TMIN to TMAX
INPUT VOLTAGE NOISE
f = 1 kHz
± 15 V
1.7
INPUT CURRENT NOISE
f = 1 kHz
± 15 V
1.5
1.5
1.5
pA/√Hz
±5 V
+4.3
–3.8
+14.3
–13.8
+4.3
–3.8
+14.3
–13.8
+4.3
–3.8
+14.3
–13.8
V
V
V
V
± 3.6
± 3.0
± 1.4
± 13.3
± 12.2
32
V
V
V
V
V
mA
3
DIFFERENTIAL GAIN ERROR
3
INPUT COMMON-MODE
VOLTAGE RANGE
0.04
Degrees
100
100
96
120
120
0.04
100
100
96
120
120
100
100
96
120
120
dB
dB
dB
98
94
120
98
94
120
98
94
120
dB
dB
± 15 V
OUTPUT VOLTAGE SWING
RLOAD = 500 Ω
RLOAD = 150 Ω
RLOAD = 50 Ω
RLOAD = 1 kΩ
RLOAD = 500 Ω
Short Circuit Current
±5 V
±5 V
±5 V
± 15 V
± 15 V
± 5 V, ± 15 V
INPUT CHARACTERISTICS
Input Resistance (Differential)
Input Capacitance (Differential)4
Input Capacitance (Common Mode)
CLOSED-LOOP OUTPUT
RESISTANCE
AV = +1, f = 1 kHz
–2–
± 3.0
± 2.5
± 12
± 10
± 3.6
± 3.0
± 1.4
± 13.3
± 12.2
32
0.04
2
1.7
± 3.0
± 2.5
± 3.6
± 3.0
± 1.4
± 12 ± 13.3
± 10 ± 12.2
32
2
1.7
± 3.0
± 2.5
± 12
± 10
2
nV/√Hz
13
5
1.5
13
5
1.5
13
5
1.5
kΩ
pF
pF
2
2
2
mΩ
REV. G
AD829
Model
Conditions
POWER SUPPLY
Operating Range
Quiescent Current
VS
± 15 V
TMIN to TMAX
Min
AD829JR
Typ
Max
± 4.5
5
± 15 V
5.3
TMIN to TMAX
TRANSISTOR COUNT
Number of Transistors
± 18
6.5
8.0
6.8
8.3
Min
± 4.5
46
NOTES
1
Full Power Bandwidth = Slew Rate/2 π VPEAK.
2
Tested at Gain = +20, C COMP = 0 pF.
3
3.58 MHz (NTSC) and 4.43 MHz (PAL and SECAM).
4
Differential input capacitance consists of 1.5 pF package capacitance plus 3.5 pF from the input differential pair.
Specifications subject to change without notice.
REV. G
–3–
AD829AR
Typ Max
5
5.3
46
± 18
6.5
8.0
6.8
9.0
AD829AQ/S
Min
Typ
Max
± 4.5
5
5.3
46
± 18
6.5
8.2/8.7
6.8
8.5/9.0
Unit
V
mA
mA
mA
mA
AD829
ABSOLUTE MAXIMUM RATINGS 1
METALLIZATION PHOTO
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation2
PDIP (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W
SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 W
CERDIP (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 W
LCC (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 W
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± V
Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . . ± 6 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (Q, E) . . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD829J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
AD829A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
AD829S . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C
Contact factory for latest dimensions.
Dimensions shown in inches and (mm).
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; the functional operation of
the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Maximum internal power dissipation is specified so that T J does not exceed
150°C at an ambient temperature of 25°C.
Thermal characteristics:
8-lead PDIP package: θJA = 100°C/W (derate at 8.7 mW/°C)
8-lead CERDIP package: θJA = 110°C/W (derate at 8.7 mW/°C)
20-lead LCC package: θJA = 77°C/W
8-lead SOIC package: θJA = 125°C/W (derate at 6 mW/°C).
3
If the differential voltage exceeds 6 V, external series protection resistors should
be added to limit the input current.
SUBSTRATE CONNECTED TO +V S
MAXIMUM POWER DISSIPATION (W)
2.5
2.0
PDIP
LCC
1.5
1.0
0.5
CERDIP
SOIC
0
–55 –45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105 115 125
AMBIENT TEMPERATURE (ⴗC)
Figure 1. Maximum Power Dissipation vs. Temperature
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD829 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
–4–
REV. G
AD829
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
AD829AR
AD829AR-REEL
AD829AR-REEL7
AD829ARZ*
AD829ARZ-REEL*
AD829ARZ-REEL7*
AD829JN
AD829JR
AD829JR-REEL
AD829JR-REEL7
AD829AQ
AD829SQ
AD829SQ/883B
5962-9312901MPA
AD829SE/883B
5962-9312901M2A
AD829JCHIPS
AD829SCHIPS
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
–40°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic PDIP
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead CERDIP
8-Lead CERDIP
8-Lead CERDIP
8-Lead CERDIP
20-Lead LCC
20-Lead LCC
Die
Die
R-8
R-8
R-8
R-8
R-8
R-8
N-8
R-8
R-8
R-8
Q-8
Q-8
Q-8
Q-8
E-20A
E-20A
*Z = Pb-free part.
REV. G
–5–
AD829–Typical Performance Characteristics
20
15
+VOUT
10
–VOUT
5
0
5
10
15
SUPPLY VOLTAGE (ⴞV)
15
+VOUT
10
–VOUT
5
RLOAD = 1k⍀
0
20
5.0
4.5
0
5
10
15
SUPPLY VOLTAGE (ⴞV)
VS = ⴞ5V, ⴞ15V
–3
–2
– 60 – 40 – 20
20
0 20 40 60 80 100 120 140
TEMPERATURE (ⴗC)
4
3
– 60 – 40 – 20
0 20 40 60 80 100 120 140
TEMPERATURE (ⴗC)
TPC 7. Quiescent Current vs.
Temperature
SHORT CIRCUIT CURRENT LIMIT (mA)
VS = ⴞ5V
AV = +20
CCOMP = 0pF
AV = +1
CCOMP = 68pF
0.01
0.001
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
TPC 6. Closed-Loop Output
Impedance vs. Frequency
65
35
25
10k
0.1
VS = ±15V
AV = +20
CCOMP = 0pF
NEGATIVE
CURRENT LIMIT
30
1k
100
LOAD RESISTANCE (⍀)
1
40
5
ⴞ5 V
SUPPLIES
5
10
TPC 5. Input Bias Current vs.
Temperature
7
VS = ⴞ15V
10
100
–4
TPC 4. Quiescent Current vs.
Supply Voltage
6
15
TPC 3. Output Voltage Swing
vs. Resistive Load
CLOSED-LOOP OUTPUT IMPEDANCE (⍀)
5.5
20
0
10
20
–5
INPUT BIAS CURRENT (␮A)
QUIESCENT CURRENT (mA)
6.0
QUIESCENT CURRENT (mA)
5
10
15
SUPPLY VOLTAGE (±V)
ⴞ15 V
SUPPLIES
25
TPC 2. Output Voltage Swing
vs. Supply Voltage
TPC 1. Input Common-Mode
Range vs. Supply Voltage
4.0
0
POSITIVE
CURRENT LIMIT
VS = ⴞ5V
–3 dB BANDWIDTH (MHz)
0
30
OUTPUT VOLTAGE SWING (V p–p)
MAGNITUDE OF THE OUTPUT
VOLTAGE (V)
INPUT COMMON-MODE RANGE (V)
20
60
55
50
20
15
– 60 – 40 – 20 0 20 40 60 80 100 120 140
AMBIENT TEMPERATURE (ⴗC)
TPC 8. Short-Circuit Current
Limit vs. Temperature
–6–
45
– 60 – 40 – 20
0 20 40 60 80 100 120 140
TEMPERATURE (ⴗC)
TPC 9. –3 dB Bandwidth vs.
Temperature
REV. G
AD829
120
100
105
80
100
120
+SUPPLY
40
GAIN
ⴞ5V
SUPPLIES
500⍀ LOAD
40
20
CCOMP = 0pF
VS = ⴞ15V
95
VS = ⴞ5V
90
80
– SUPPLY
60
85
40
80
0
20
100
PSRR (dB)
60
60
OPEN-LOOP GAIN (dB)
OPEN-LOOP GAIN (dB)
GAIN
ⴞ15V
SUPPLIES
1k⍀ LOAD
80
PHASE (Degrees)
PHASE
100
CCOMP = 0pF
0
100
1k
10k
100k
1M
FREQUENCY (Hz)
10M
–20
100M
20
75
10
TPC 10. Open-Loop Gain and
Phase Margin vs. Frequency
1k
100
LOAD RESISTANCE (⍀)
10k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
TPC 12. Power Supply Rejection
Ratio (PSRR) vs. Frequency
TPC 11. Open-Loop Gain vs.
Resistive Load
10
30
120
1k
OUTPUT SWING FROM 0 TO ⴞV
8
25
OUTPUT VOLTAGE (V p–p)
CMRR (dB)
100
80
60
CCOMP = 0pF
40
VS = ±15V
RL = 1k⍀
AV = +20
20
CCOMP = 0pF
15
VS = ±5V
RL = 500⍀
AV = +20
10
CCOMP = 0pF
5
6
4
2
1%
0.1%
1%
0.1%
0
–2
ERROR
AV = –19
CCOMP = 0pF
–4
–6
–8
0
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
1
TPC 13. Common-Mode
Rejection Ratio vs. Frequency
10
INPUT FREQUENCY (MHz)
–85
RL = 500⍀
–90
–95
–40
THIRD HARMONIC
–50
SECOND HARMONIC
–100
–60
RL = 2k⍀
–105
–70
300
1k
3k
10k
FREQUENCY (Hz)
30k
100k
TPC 16. Total Harmonic
Distortion (THD) vs. Frequency
REV. G
40
60 80 100 120 140 160
SETTLING TIME (ns)
5
VIN = 2.24V RMS
AV = –1
RL = 250⍀
CLOAD = 0
CCOMP = 30pF
–30
THD (dB)
–80
20
TPC 15. Output Swing and Error vs.
Settling Time
–20
VIN = 3V RMS
AV = –1
CCOMP = 30pF
CLOAD = 100pF
–75
–110
100
0
100
TPC 14. Large Signal Frequency
Response
–70
THD (dB)
–10
0
500k
1.5M
1.0M
FREQUENCY (Hz)
2.0M
TPC 17. Second and Third
Harmonic Distortion vs.
Frequency
–7–
INPUT VOLTAGE NOISE (nV/ Hz)
20
4
3
2
1
0
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
TPC 18. Input Voltage Noise
Spectral Density
10M
AD829
AV = +20
SLEW RATE 10% to 90%
RISE
300
250
DIFFERENTIAL PHASE (Degrees)
SLEW RATE (V/␮s)
350
FALL
VS = ⴞ15V
RISE
200
FALL
150
100
– 60 – 40 – 20
VS = ⴞ5V
0 20 40 60 80 100 120 140
TEMPERATURE (ⴗC)
TPC 19. Slew Rate vs. Temperature
0.02
DIFF GAIN
0.01
0.043ⴗ
0.05
DIFF PHASE
0.04
0.03
ⴞ5
ⴞ10
SUPPLY VOLTAGE (V)
DIFFERENTIAL GAIN (Percent)
0.03
400
+15V
0.1␮F
+VS
AD829
0.1␮F
20k⍀
OFFSET
NULL
ADJUST
ⴞ15
TPC 20. Differential Gain and Phase
vs. Supply
0.1␮F
CCOMP
(EXTERNAL)
–VS
Figure 2. Offset Null and
External Shunt Compensation
Connections
CCOMP
15pF
50⍀
CABLE
HP8130A
5ns RISE TIME
50⍀
50⍀ CABLE
50⍀
AD829
TEKTRONIX
TYPE 7A24
PREAMP
50⍀
0.1␮F
5pF
300⍀
–15V
300⍀
Figure 3a. Follower Connection. Gain = +2
Figure 3c. Gain-of-2 Follower Small
Signal Pulse Response
Figure 3b. Gain-of-2 Follower
Large Signal Pulse Response
–8–
REV. G
AD829
+15V
50⍀
CABLE
HP8130A
5ns RISE TIME
0.1␮F
100⍀
45⍀
FET PROBE
AD829
5⍀
TEKTRONIX
TYPE 7A24
PREAMP
0.1␮F
1pF
2k⍀
–15V
CCOMP = 0pF
105⍀
Figure 4a. Follower Connection. Gain = +20
Figure 4b. Gain-of-20 Follower
Large Signal Pulse Response
Figure 4c. Gain-of-20 Follower
Small Signal Pulse Response
5pF
300⍀
+15V
0.1␮F
50⍀
CABLE
HP8130A
5ns RISE TIME
300⍀
50⍀
50⍀
AD829
50⍀
CABLE
CCOMP
15pF
TEKTRONIX
TYPE 7A24
PREAMP
50⍀
0.1␮F
–15V
Figure 5a. Unity Gain Inverter Connection
Figure 5c. Unity Gain Inverter
Small Signal Pulse Response
Figure 5b. Unity Gain Inverter
Large Signal Pulse Response
REV. G
–9–
AD829
+VS
THEORY OF OPERATION
The AD829 is fabricated on Analog Devices’ proprietary complementary bipolar (CB) process, which provides PNP and NPN
transistors with similar fTs of 600 MHz. As shown in Figure 6,
the AD829 input stage consists of an NPN differential pair in
which each transistor operates at 600 µA collector current. This
gives the input devices a high transconductance, which in turn
gives the AD829 a low noise figure of 2 nV/√Hz @ 1 kHz.
15⍀
OUTPUT
R
500⍀
C
12.5pF
The input stage drives a folded cascode that consists of a fast
pair of PNP transistors. These PNPs drive a current mirror that
provides a differential-input-to-single-ended-output conversion.
The high speed PNPs are also used in the current-amplifying
output stage, which provides high current gain of 40,000. Even
under conditions of heavy loading, the high fTs of the NPN and
PNPs, produced using the CB process, permits cascading two
stages of emitter followers while maintaining 60° phase margin
at closed-loop bandwidths greater than 50 MHz.
+IN
15⍀
–IN
1.2mA
–VS
OFFSET NULL
Two stages of complementary emitter followers also effectively
buffer the high impedance compensation node (at the CCOMP pin)
from the output so the AD829 can maintain a high dc open-loop
gain, even into low load impedances: 92 dB into a 150 Ω load and
100 dB into a 1 kΩ load. Laser trimming and PTAT biasing
ensure low offset voltage and low offset voltage drift, enabling
the user to eliminate ac coupling in many applications.
For added flexibility, the AD829 provides access to the internal
frequency compensation node. This allows the user to customize
frequency response characteristics for a particular application.
CCOMP
Figure 6. Simplified Schematic
Shunt Compensation
Figures 7 and 8 show that shunt compensation has an external
compensation capacitor, CCOMP, connected between the compensation pin and ground. This external capacitor is tied in
parallel with approximately 3 pF of internal capacitance at the
compensation node. In addition, a small capacitance, CLEAD,
in parallel with resistor R2, compensates for the capacitance at
the amplifier’s inverting input.
Unity gain stability requires a compensation capacitance of 68 pF
(Pin 5 to ground), which will yield a small signal bandwidth of
66 MHz and slew rate of 16 V/µs. The slew rate and gain bandwidth product will vary inversely with compensation capacitance.
Table I and Figure 8 show the optimum compensation capacitance
and the resulting slew rate for a desired noise gain. For gains
between 1 and 20, CCOMP can be chosen to keep the small signal
bandwidth relatively constant. The minimum gain that will still
provide stability depends on the value of external compensation
capacitance.
An RC network in the output stage (Figure 6) completely
removes the effect of capacitive loading when the amplifier is
compensated for closed-loop gains of 10 or higher. At low frequencies, and with low capacitive loads, the gain from the compensation
node to the output is very close to unity. In this case, C is
bootstrapped and does not contribute to the compensation
capacitance of the device. As the capacitive load is increased, a
pole is formed with the output impedance of the output stage
this reduces the gain, and subsequently, C is incompletely bootstrapped. Therefore, some fraction of C contributes to the
compensation capacitance, and the unity gain bandwidth falls. As
the load capacitance is further increased, the bandwidth continues
to fall and the amplifier remains stable.
R2
CLEAD
+VS
50⍀
COAX
CABLE
VIN
0.1␮F
R1
50⍀
AD829
VOUT
1k⍀
CCOMP
–VS
0.1␮F
Figure 7. Inverting Amplifier Connection Using External
Shunt Compensation
+VS
0.1␮F
50⍀
CABLE
VIN
50⍀
AD829
VOUT
R2
1k⍀
CCOMP
Externally Compensating the AD829
The AD829 is stable with no external compensation for noise
gains greater than 20. For lower gains, two different methods of
frequency compensating the amplifier can be used to achieve
closed-loop stability: shunt and current feedback compensation.
–VS
0.1␮F
CLEAD
R1
Figure 8. Noninverting Amplifier Connection Using
External Shunt Compensation
–10–
REV. G
AD829
Table I. Component Selection for Shunt Compensation
Follower
Gain
Inverter
Gain
R1
(⍀)
R2
(⍀)
CL
(pF)
CCOMP
(pF)
Slew
Rate
(V/␮s)
–3 dB Small Signal
Bandwidth (MHz)
1
2
5
10
20
25
100
–1
–4
–9
–19
–24
–99
Open
1k
511
226
105
105
20
100
1k
2.0 k
2.05 k
2k
2.49
2k
0
5
1
0
0
0
0
68
25
7
3
0
0
0
16
38
90
130
230
230
230
66
71
76
65
55
39
7.5
Table I gives the recommended CCOMP and CLEAD values, as
well as the corresponding slew rates and bandwidth. The capacitor
values were selected to provide a small signal frequency response
with less than 1 dB of peaking and less than 10% overshoot. For
this table, supply voltages of ± 15 V should be used. Figure 9 is
a graphical extension of the table that shows the slew rate/gain
trade-off for lower closed-loop gains, when using the shunt
compensation scheme.
then
1k
100
100
SLEW RATE (V/␮s)
CCOMP (pF)
10
VS = ⴞ15V
10
100
1
1
10
NOISE GAIN
Figure 9. Value of CCOMP and Slew Rate vs. Noise Gain
Current Feedback Compensation
Bipolar, nondegenerated, single pole, and internally compensated
amplifiers have their bandwidths defined as
fT =
1
=
2 π r e CCOMP
This shows that the slew rate will be only 0.314 V/µs for every
MHz of bandwidth. The only way to increase slew rate is to
increase the fT, and that is difficult because of process limitations.
Unfortunately, an amplifier with a bandwidth of 10 MHz can
only slew at 3.1 V/µs, which is barely enough to provide a full
power bandwidth of 50 kHz.
The AD829 is especially suited to a new form of compensation
that allows for the enhancement of both the full power bandwidth and slew rate of the amplifier. The voltage gain from the
inverting input pin to the compensation pin is large; therefore, if
a capacitance is inserted between these pins, the amplifier’s
bandwidth becomes a function of its feedback resistor and the
capacitance. The slew rate of the amplifier is now a function of
its internal bias (2I) and the compensation capacitance.
SLEW RATE
CCOMP
Slew Rate
kT
=4π
q
fT
Since the closed-loop bandwidth is a function of RF and CCOMP
(Figure 10), it is independent of the amplifier closed-loop gain,
as shown in Figure 12. To preserve stability, the time constant
of RF and CCOMP needs to provide a bandwidth of less than
65 MHz. For example, with CCOMP = 15 pF and RF = 1 kΩ, the
small signal bandwidth of the AD829 is 10 MHz. Figure 11 shows
that the slew rate is in excess of 60 V/µs. As shown in Figure 12,
the closed-loop bandwidth is constant for gains of –1 to –4; this is
a property of current feedback amplifiers.
RF
I
kT
2 π q CCOMP
CCOMP
0.1␮F +V
S
50⍀
COAX
CABLE
where
fT is the unity gain bandwidth of the amplifier.
I is the collector current of the input transistor.
CCOMP is the compensation capacitance.
re is the inverse of the transconductance of the input transistors.
kT/q approximately equals 26 mV @ 27°C.
VIN
REV. G
2I
CCOMP
IN4148
AD829
VOUT
50⍀
0.1␮F
*RECOMMENDED VALUE
OF CCOMP FOR C1
Since both fT and slew rate are functions of the same variables,
the dynamic behavior of an amplifier is limited. Since
Slew Rate =
R1
C1*
<7pF
7pF
0pF
15pF
RL
1k⍀
–VS
CCOMP SHOULD NEVER EXCEED
15pF FOR THIS CONNECTION
Figure 10. Inverting Amplifier Connection Using Current
Feedback Compensation
–11–
AD829
Figure 11. Large Signal Pulse Response of Inverting
Amplifier Using Current Feedback Compensation,
CCOMP = 15 pF, C1 = 15 pF, RF = 1 kΩ, R1 = 1 kΩ
Figure 13. Large Signal Pulse Response of the Inverting
Amplifier Using Current Feedback Compensation,
CCOMP = 1 pF, RF = 3 kΩ, R1 = 3 kΩ
15
12
GAIN = –4
–3dB @ 8.2MHz
CLOSED-LOOP GAIN (dB)
9
GAIN = –2
6
–3dB @ 9.6MHz
3
GAIN = –1
0
–3dB @ 10.2MHz
–3
–6
–9
–12
–15
100k
VIN = –30dBM
VS = ⴞ15V
RL = 1k⍀
RF = 1k⍀
CCOMP = 15pF
C1 = 15pF
1M
10M
FREQUENCY (Hz)
100M
Figure 14. Small Signal Pulse Response of Inverting
Amplifier Using Current Feedback Compensation,
CCOMP = 4 pF, RF = 1 kΩ, R1 = 1 kΩ
Figure 12. Closed-Loop Gain vs. Frequency for the Circuit
of Figure 9
Figure 13 is an oscilloscope photo of the pulse response of a
unity gain inverter that has been configured to provide a small
signal bandwidth of 53 MHz and a subsequent slew rate of
180 V/µs; resistor RF = 3 kΩ and capacitor CCOMP = 1 pF. Figure 14
shows the excellent pulse response as a unity gain inverter, this
using component values of RF = 1 kΩ and CCOMP = 4 pF.
15
12
GAIN = –4
CCOMP = 2pF
GAIN = –2
CCOMP = 3pF
GAIN = –1
CCOMP = 4pF
CLOSED-LOOP GAIN (dB)
9
Figures 15 and 16 show the closed-loop frequency response of the
AD829 for different closed-loop gains and different supply voltages.
If a noninverting amplifier configuration using current feedback
compensation is needed, the circuit of Figure 17 is recommended.
This circuit provides a slew rate twice that of the shunt compensated noninverting amplifier of Figure 18 at the expense of
gain flatness. Nonetheless, this circuit delivers 95 MHz bandwidth
with ± 1 dB flatness into a back terminated cable, with a differential gain error of only 0.01% and a differential phase error of
only 0.015° at 4.43 MHz.
6
3
0
–3
VS = ⴞ15V
RL = 1k⍀
RF = 1k⍀
VIN = –30dBM
–6
–9
–12
–15
1
10
FREQUENCY (MHz)
100
Figure 15. Closed-Loop Frequency Response for the
Inverting Amplifier Using Current Feedback Compensation
–12–
REV. G
AD829
+15V
–17
0.1␮F
–20
50⍀
COAX
CABLE
–23
OUTPUT LEVEL (dB)
ⴞ5V
VIN
–26
ⴞ15V
50⍀
–29
50⍀
AD829
50⍀
COAX
CABLE
VOUT
50⍀
–32
3pF
CCOMP
–15V
0.1␮F
–35
VIN = –20dBM
RL = 1k⍀
RF = 1k⍀
GAIN = –1
CCOMP = 4pF
–38
–41
–44
2k⍀
Figure 17. Noninverting Amplifier Connection Using
Current Feedback Compensation
–47
1
2k⍀
10
FREQUENCY (MHz)
100
+15V
Figure 16. Closed-Loop Frequency Response vs. Supply
for the Inverting Amplifier Using Current Feedback
Compensation
0.1␮F
75⍀
COAX
CABLE
75⍀
VIN
A Low Error Video Line Driver
AD829
The buffer circuit shown in Figure 18 will drive a back-terminated
75 Ω video line to standard video levels (1 V p-p) with 0.1 dB
gain flatness to 30 MHz with only 0.04° and 0.02% differential
phase and gain at the 4.43 MHz PAL color subcarrier frequency.
This level of performance, which meets the requirements for high
definition video displays and test equipment, is achieved using
only 5 mA quiescent current.
75⍀
0.1␮F
30pF
CCOMP
–15V
300⍀
OPTIONAL
2pF to 7pF
FLATNESS
TRIM
300⍀
A High Gain, Video Bandwidth, Three Op Amp In Amp
Figure 19 shows a three op amp instrumentation amplifier circuit
that provides a gain of 100 at video bandwidths. At a circuit gain
of 100, the small signal bandwidth equals 18 MHz into a FET
probe. Small signal bandwidth equals 6.6 MHz with a 50 Ω load.
The 0.1% settling time is 300 ns.
VOUT
75⍀
Figure 18. A Video Line Driver with a Flatness over
Frequency Adjustment
The input amplifiers operate at a gain of 20, while the output
op amp runs at a gain of 5. In this circuit, the main bandwidth
limitation is the gain/bandwidth product of the output amplifier.
Extra care should be taken while breadboarding this circuit, since
even a couple of extra picofarads of stray capacitance at the compensation pins of A1 and A2 will degrade circuit bandwidth.
3pF
(G = 20)
+VIN
2pF to 8pF
SETTLING TIME
AC CMR ADJUST
A1
AD829
1k⍀
2k⍀
RG
210⍀
1pF
200⍀
1pF
200⍀
AD848
A3
(G = 5)
2k⍀
INPUT
FREQUENCY
2k⍀
100 Hz
1 MHz
10 MHz
3pF
970⍀
AD829
A2
+VIN
DC CMR
ADJUST
50⍀
+VS
+15V
PIN 7
10␮F
0.1␮F
1␮F
0.1␮F
10␮F
0.1␮F
1␮F
0.1␮F
COMM
(G = 20)
3pF
CMRR
64.6dB
44.7dB
23.9dB
CIRCUIT GAIN =
+ 1( 5
( 4000⍀
RG
–15V
–VS
Figure 19. A High Gain, Video Bandwidth, Three Op Amp In Amp Circuit
REV. G
–13–
EACH
AMPLIFIER
PIN 4
AD829
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
Dimensions shown in millimeters and (inches)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
4
6.20 (0.2440)
5.80 (0.2284)
COPLANARITY
SEATING
0.10
PLANE
0.50 (0.0196)
ⴛ 45ⴗ
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
5
1
1.27 (0.0500)
BSC
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015
(0.38)
MIN
0.180
(4.57)
MAX
8
0.51 (0.0201)
0.31 (0.0122)
8ⴗ
0.25 (0.0098) 0ⴗ 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20A)
8-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-8)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
0.100 (2.54)
0.064 (1.63)
0.095 (2.41)
0.075 (1.90)
3
4
19
18 20
0.358 (9.09)
0.342 (8.69)
SQ
0.358
(9.09)
MAX
SQ
0.088 (2.24)
0.054 (1.37)
0.011 (0.28)
0.007 (0.18)
R TYP
0.075 (1.91)
REF
0.055 (1.40)
0.045 (1.14)
1
BOTTOM
VIEW
14
13
0.005 (0.13)
MIN
0.200 (5.08)
REF
0.100 (2.54) REF
0.015 (0.38)
MIN
0.075 (1.91)
REF
8
5
0.310 (7.87)
0.220 (5.59)
PIN 1
0.028 (0.71)
0.022 (0.56)
1
4
0.100 (2.54) BSC
0.050 (1.27)
BSC
8
0.055 (1.40)
MAX
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
9
45 TYP
0.200 (5.08)
MAX
0.150 (3.81)
BSC
0.200 (5.08)
0.125 (3.18)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.023 (0.58)
0.014 (0.36)
0.060 (1.52)
0.015 (0.38)
0.150 (3.81)
MIN
SEATING
0.070 (1.78) PLANE
0.030 (0.76)
15
0
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
–14–
REV. G
AD829
Revision History
Location
Page
4/04—Data Sheet changed from REV. F to REV. G.
Added new Figure 1 and renumbered all figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Updated Table I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Updated Figure 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Updated Figure 16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2/03—Data Sheet changed from REV. E to REV. F.
Renumbered Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Changes made to PRODUCT HIGHLIGHTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes made to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes made to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Changes made to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
REV. G
–15–
–16–
C00880–0–4/04(G)