PD - 91372B
IRF1010NS/L
HEXFET® Power MOSFET
l
l
l
l
l
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Advanced Process Technology
Surface Mount (IRF1010NS)
Low-profile through-hole (IRF1010NL)
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
D
RDS(on) = 0.011W
G
ID = 84A
Description
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRF1010NL) is available for lowprofile applications.
D 2 Pak
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
VDSS = 55V
TO-262
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
84
60
290
3.8
170
1.1
± 20
360
43
17
5.0
-55 to + 175
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
300 (1.6mm from case )
°C
Thermal Resistance
Parameter
RqJC
RqJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
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Typ.
Max.
Units
0.90
40
°C/W
1
5/13/99
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IRF1010NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
DV(BR)DSS/DTJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
2.0
29
Typ.
0.06
11
66
40
46
LS
Internal Source Inductance
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
2900
880
330
V(BR)DSS
IDSS
IGSS
Drain-to-Source Leakage Current
Max. Units
Conditions
V
V GS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
0.011
W
V GS = 10V, ID = 43A
4.0
V
V DS = V GS, ID = 250µA
S
VDS = 25V, I D = 43A
25
V DS = 55V, V GS = 0V
µA
250
V DS = 44V, VGS = 0V, TJ = 150°C
100
V GS = 20V
nA
-100
V GS = -20V
130
ID = 43A
23
nC
V DS = 44V
53
VGS = 10V, See Fig. 6 and 13
VDD = 28V
ID = 43A
ns
RG = 3.6W
RD = 0.62W, See Fig. 10
Between lead,
nH
and center of die contact
V GS = 0V
pF
VDS = 25V
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
VSD
t rr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
84
showing the
A
G
integral reverse
390
S
p-n junction diode.
1.3
V
TJ = 25°C, IS = 43A, VGS = 0V
81 120
ns
TJ = 25°C, IF = 43A
240 370
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width £ 300µs; duty cycle £ 2%.
VDD = 25V, starting TJ = 25°C, L = 390 µH
Uses IRF1010N data and test conditions
RG = 25W, IAS = 43A. (See Figure 12)
ISD £ 43A, di/dt £ 260A/µs, VDD £ V(BR)DSS,
TJ £ 175°C
Caculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the
package refer to Design Tip # 93-4
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
2
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IRF1010NS/L
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
4.5V
10
0.1
20µs PULSE WIDTH
TCJ == 25°C
T
25°C
1
10
A
100
4.5V
100
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
3.0
TJ = 25°C
TJ = 175°C
10
V DS = 25V
20µs PULSE WIDTH
5
6
7
8
9
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
A
100
Fig 2. Typical Output Characteristics
1000
1
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
20µs PULSE WIDTH
TCJ =
T
= 175°C
175°C
10
0.1
VDS , Drain-to-Source Voltage (V)
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
TOP
10
A
I D = 72A
2.5
2.0
1.5
1.0
0.5
VGS = 10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF1010NS/L
4000
V GS = 0V,
f = 1MHz
C iss = Cgs + Cgd , Cds SHORTED
C rss = C gd
Ciss C oss = Cds + C gd
3000
Coss
20
V GS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
5000
I D = 43A
V DS = 44V
V DS = 28V
16
12
2000
Crss
1000
0
10
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
1
8
100
0
20
VDS , Drain-to-Source Voltage (V)
60
80
100
120
A
140
Q G , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
100
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
40
TJ = 175°C
TJ = 25°C
10µs
100
100µs
1ms
10
10ms
VGS = 0V
10
0.4
0.8
1.2
1.6
2.0
2.4
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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A
2.8
TC = 25°C
TJ = 175°C
Single Pulse
1
1
A
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF1010NS/L
V DS
V GS
100
LIMITED BY PACKAGE
D.U.T.
RG
+
V- DD
I D , Drain Current (A)
80
10V
Pulse Width £ 1 µs
Duty Factor £ 0.1 %
60
Fig 10a. Switching Time Test Circuit
40
VDS
90%
20
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
td(on)
Fig 9. Maximum Drain Current Vs.
Case Temperature
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
0.00001
PDM
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
DRIVER
L
VDS
D.U.T
RG
+
- VDD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
IRF1010NS/L
1000
TOP
BOTTOM
800
ID
18A
31A
43A
600
400
200
0
VDD = 25V
25
50
A
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
QG
.3µF
10 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
6
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ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRF1010NS/L
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
· Low Stray Inductance
· Ground Plane
· Low Leakage Inductance
Current Transformer
+
D.U.T
+
-
-
+
RG
·
·
·
·
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
D=
Period
+
-
V DD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS
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ISD
= 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRF1010NS/L
D2Pak Package Outline
10.54 (.415)
10.29 (.405)
1.40 (.055)
MAX.
-A-
1.32 (.052)
1.22 (.048)
2
1.78 (.070)
1.27 (.050)
1
10.16 (.400)
REF.
-B-
4.69 (.185)
4.20 (.165)
6.47 (.255)
6.18 (.243)
3
15.49 (.610)
14.73 (.580)
2.79 (.110)
2.29 (.090)
2.61 (.103)
2.32 (.091)
5.28 (.208)
4.78 (.188)
3X
1.40 (.055)
1.14 (.045)
5.08 (.200)
0.55 (.022)
0.46 (.018)
0.93 (.037)
3X
0.69 (.027)
0.25 (.010)
M
8.89 (.350)
REF.
1.39 (.055)
1.14 (.045)
B A M
MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
NOTES:
1
2
3
4
DIMENSIONS AFTER SOLDER DIP.
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH.
HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082)
2X
2.54 (.100)
2X
Part Marking Information
D2Pak
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
8
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A
PART NUMBER
F530S
9246
9B
1M
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
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IRF1010NS/L
Package Outline
TO-262 Outline
Part Marking Information
TO-262
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9
IRF1010NS/L
Tape & Reel Information
D2Pak
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
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http://www.irf.com/ Data and specifications subject to change without notice. 5/99
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