ETC LM101AHRQMLV

MICROCIRCUIT DATA SHEET
Original Creation Date: 01/20/00
Last Update Date: 05/08/00
Last Major Revision Date: 01/20/00
MRLM101A-X-RH REV 0B0
SINGLE OPERATIONAL AMPLIFIER - EXTERNALLY COMPENSATED:
ALSO AVAILABLE GUARANTEED TO 100K RAD(Si) TESTED TO
MIL-STD-883, METHOD 1019.5
General Description
The LM101A is a general purpose operational amplifier which features improved performance
over industry standards such as the LM709. Advanced processing techniques make possible
an order of magnitude reduction in input currents, and a redesign of the biasing circuitry
reduces the temperature drift of input current.
This amplifier offers many features which make its application nearly foolproof: overload
protection on the input and output, no latch-up when the common mode range is exceeded,
and freedom from oscillations and compensation with a single 30 pF capacitor. It has
advantages over internally compensated amplifiers in that the frequency compensation can
be tailored to the particular application. For example, in low frequency circuits it can
be overcompensated for increased stability margin. Or the compensation can be optimized
to give more than a factor of ten improvement in high frequency performance for most
applications.
In addition, the device provides better accuracy and lower noise in high impedance
circuitry. The low input currents also make it particularly well suited for long interval
integrators or timers, sample and hold circuits and low frequency waveform generators.
Further, replacing circuits where matched transistor pairs buffer the inputs of
conventional IC op amps, it can give lower offset voltage and a drift at a lower cost.
Industry Part Number
NS Part Numbers
LM101A
LM101AHRQML
LM101AHRQMLV
LM101AJRQML
LM101AJRQMLV
LM101AWRQML
LM101AWRQMLV
Prime Die
LM101A
Controlling Document
SEE FEATURES SECTION
Processing
Subgrp Description
MIL-STD-883, Method 5004
1
2
3
4
5
6
7
8A
8B
9
10
11
Quality Conformance Inspection
MIL-STD-883, Method 5005
1
Static tests at
Static tests at
Static tests at
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Temp ( oC)
+25
+125
-55
+25
+125
-55
+25
+125
-55
+25
+125
-55
MICROCIRCUIT DATA SHEET
MRLM101A-X-RH REV 0B0
Features
-
Offset voltage 3 mV maximum over temperature
Input current 100 nA maximum over temperature
Offset current 20 nA maximum over temperature
Guaranteed drift characteristics
Offsets guaranteed over entire common mode and supply voltage ranges
Slew rate of 10V/us as a summing amplifier
CONTROLLING DOCUMENTS:
LM101AHRQML
5962R9951501QGA
LM101AHRQMLV
5962R9951501VGA
LM101AJRQML
5962R9951501QPA
LM101AJRQMLV
5962R9951501VPA
LM101AWRQML
5962R9951501QHA
LM101AWRQMLV
5962R9951501VHA
2
MICROCIRCUIT DATA SHEET
MRLM101A-X-RH REV 0B0
(Absolute Maximum Ratings)
(Note 1)
Supply Voltage
+22V
Differential Input Voltage
+30V
Input Voltage
(Note 3)
+15V
Ouput Short Circuit Duration
(Note 2)
Continuous
Operating Ambient Temp. Range
-55 C < Ta < +125 C
Maximum Junction Temperature
150 C
Power Dissipation at TA =
(Note 2)
H-Pkg (Still Air)
H-Pkg (500LF/Min Air
J8-Pkg (Still Air)
J8-Pkg (500LF/Min Air
W-Pkg (Still Air)
W-Pkg (500LF/Min Air
Thermal Resistance
ThetaJA
H-Pkg (Still Air)
H-Pkg (500LF/Min Air
J8-Pkg (Still Air)
J8-Pkg (500LF/Min Air
W-Pkg (Still Air)
W-Pkg (500LF/Min Air
25 C
750mW
1200mW
1000mW
1500mW
500mW
800mW
Flow)
Flow)
Flow)
165
89
128
75
233
155
Flow)
Flow)
Flow)
ThetaJC
H-Pkg
J8-Pkg
W-Pkg
Storage Temperature Range
C/W
C/W
C/W
C/W
C/W
C/W
39 C/W
26 C/W
26 C/W
-65 C to +150 C
Lead Temperature
(Soldering, 10 seconds)
ESD Tolerance
(Note 4)
300 C
2000V
Note 1:
Note 2:
Note 3:
Note 4:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Operating Ratings indicate conditions for which the device is intended to be
functional, but do not guarantee specific performance limits. For guaranteed
specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance
characteristics may degrade when the device is not operated under the listed test
conditions.
The maximum power dissipation must be derated at elevated temperatures and is
dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to
ambient thermal resistance), and TA (ambient temperature). The maximum allowable
power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number
given in the Absolute Maximum Ratings, whichever is lower.
For supply voltages less than +15V, the absolute maximum input voltage is equal to
the supply voltage.
Human body model, 100 pF discharged through 1.5k Ohms.
3
MICROCIRCUIT DATA SHEET
MRLM101A-X-RH REV 0B0
Electrical Characteristics
DC PARAMETERS: See NOTE 3
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC: +Vcc = +20V, Vcm = 0V, Rs = 50 ohms
SYMBOL
Vio
PARAMETER
Input Offset
Voltage
CONDITIONS
NOTES
+Vcc = 35V, -Vcc = -5V, Vcm = -15V
+Vcc = 5V, -Vcc = -35V, Vcm = +15V
Vcm = 0V
+Vcc = 5V, -Vcc = -5V, Vcm = 0V
Iio
Input Offset
Current
+Vcc = 35V, -Vcc = -5V, Vcm = -15V,
Rs = 100K Ohms
+Vcc = 5V, -Vcc = -35V, Vcm = +15V,
Rs = 100K Ohms
Vcm = 0V, Rs = 100K Ohms
+Vcc = 5V, -Vcc = -5V, Vcm = 0V,
Rs = 100K Ohms
Iib+
Input Bias
Current
+Vcc = 35V, -Vcc = -5V, Vcm = -15V,
Rs = 100K Ohms
+Vcc = 5V, -Vcc = -35V, Vcm = +15V,
Rs = 100K Ohms
Vcm = 0V, Rs = 100K Ohms
+Vcc = 5V, -Vcc = -5V, Vcm = 0V,
Rs = 100K Ohms
4
PINNAME
MIN
MAX
UNIT
SUBGROUPS
-2
+2
mV
1
-3
+3
mV
2, 3
-2
+2
mV
1
-3
+3
mV
2, 3
-2
+2
mV
1
-3
+3
mV
2, 3
-2
+2
mV
1
-3
+3
mV
2, 3
-10
+10
nA
1, 2
-20
+20
nA
3
-10
+10
nA
1, 2
-20
+20
nA
3
-10
+10
nA
1, 2
-20
+20
nA
3
-10
+10
nA
1, 2
-20
+20
nA
3
-0.1
75
nA
1, 2
-0.1
100
nA
3
-0.1
75
nA
1, 2
-0.1
100
nA
3
-0.1
75
nA
1, 2
-0.1
100
nA
3
-0.1
75
nA
1, 2
-0.1
100
nA
3
MICROCIRCUIT DATA SHEET
MRLM101A-X-RH REV 0B0
Electrical Characteristics
DC PARAMETERS: See NOTE 3(Continued)
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC: +Vcc = +20V, Vcm = 0V, Rs = 50 ohms
SYMBOL
Iib-
PARAMETER
Input Bias
Current
CONDITIONS
NOTES
+Vcc = 35V, -Vcc = -5V, Vcm = -15V,
Rs = 100K Ohms
+Vcc = 5V, -Vcc = -35V, Vcm = +15V,
Rs = 100K Ohms
Vcm = 0V, Rs = 100K Ohms
+Vcc = 5V, -Vcc = -5V, Vcm = 0V,
Rs = 100K Ohms
+PSRR
-PSRR
Power Supply
Rejection Ratio
Power Supply
Rejection Ratio
+Vcc = 10V, -Vcc = -20V
+Vcc = 20V, -Vcc = -10V
CMRR
Common Mode
Rejection Ratio
Vcc = +35V to +5V, Vcm = +15V
VioADJ(+)
Adjustment for
Input Offset
Voltage
VioADJ(-)
Adjustment for
Input Offset
Voltage
Ios+
Output Short
Circuit Current
+Vcc = 15V, -Vcc = -15V, t < 25mS,
Vcm = -15V
Ios-
Output Short
Circuit Current
+Vcc = 15V, -Vcc = -15V, t <25mS,
Vcm = +15V
Icc
Power Supply
Current
+Vcc = 15V, -Vcc = -15V
PINNAME
MIN
MAX
UNIT
SUBGROUPS
-0.1
75
nA
1, 2
-0.1
100
nA
3
-0.1
75
nA
1, 2
-0.1
100
nA
3
-0.1
75
nA
1, 2
-0.1
100
nA
3
-0.1
75
nA
1, 2
-0.1
100
nA
3
-50
+50
uV/V 1
-100
+100
uV/V 2, 3
-50
+50
uV/V 1
-100
+100
uV/V 2, 3
80
dB
1, 2,
3
4
mV
1, 2,
3
mV
1, 2,
3
mA
1, 2,
3
+60
mA
1, 2,
3
3
mA
1
2.32
mA
2
3.5
mA
3
-4
-60
Delta
Vio/Delta
T
Temperature
Coefficient of
Input Offset
Voltage
+25 C < TA < +125 C
1
-15
+15
uV/ C 2
+25 C < TA < -55 C
1
-18
+18
uV/ C 3
Delta
Iio/Delta
T
Temperature
Coefficient of
Input Offset
Current
+25 C < TA < +125 C
1
-100
+100
pA/ C 2
+25 C < TA < -55 C
1
-200
+200
pA/ C 3
5
MICROCIRCUIT DATA SHEET
MRLM101A-X-RH REV 0B0
Electrical Characteristics
DC PARAMETERS: See NOTE 3(Continued)
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC: +Vcc = +20V, Vcm = 0V, Rs = 50 ohms
SYMBOL
Avs-
PARAMETER
Large Signal
(Open Loop)
Voltage Gain
CONDITIONS
NOTES
Rl = 2K Ohms, Vout = -15V
Large Signal
(Open Loop)
Voltage Gain
Vop+
Vop-
Large Signal
(Open Loop)
Voltage Gain
Output Voltage
Swing
Output Voltage
Swing
MAX
UNIT
SUBGROUPS
50
V/mV 4
2
25
V/mV 5, 6
2
50
V/mV 4
2
25
V/mV 5, 6
2
50
V/mV 4
2
25
V/mV 5, 6
2
50
V/mV 4
2
25
V/mV 5, 6
Vcc = +5V, Rl = 2K Ohms, Vout = +2V
2
10
V/mV 4, 5,
6
Vcc = +5V, Rl = 10K Ohms, Vout = +2V
2
10
V/mV 4, 5,
6
Rl = 10K Ohms, Vcm = -20V
+16
V
4, 5,
6
Rl = 2K Ohms, Vcm = -20V
+15
V
4, 5,
6
Rl = 2K Ohms, Vout = +15V
Rl = 10K Ohms, Vout = +15V
Avs
MIN
2
Rl = 10K Ohms, Vout = -15V
Avs+
PINNAME
Rl = 10K Ohms, Vcm = 20V
-16
V
4, 5,
6
Rl = 2K ohms, Vcm = 20V
-15
V
4, 5,
6
AC PARAMETERS: See NOTE 3
(The following conditions apply to all the following parameters, unless otherwise specified.)
AC: +Vcc = +20V, Vcm = 0V, Rs = 50 Ohms
Sr+
Sr-
Slew Rate
Slew Rate
Av = 1, Vin = -5V to +5V
Av = 1, Vin = +5V to -5V
0.3
V/uS 7, 8A
0.2
V/uS 8B
0.3
V/uS 7, 8A
0.2
V/uS 8B
TR(tr)
Rise Time
Av = 1, Vin = 50mV
800
nS
7, 8A,
8B
TR(os)
Overshoot
Av = 1, Vin = 50mV
25
%
7, 8A,
8B
NI(BB)
Noise Broadband
BW = 10Hz to 5KHz, Rs = 0 Ohms
15
uVrms 7
NI(PC)
Noise Popcorn
BW = 10Hz to 5KHz, Rs = 100K Ohms
80
uVpk 7
6
MICROCIRCUIT DATA SHEET
MRLM101A-X-RH REV 0B0
Electrical Characteristics
DC PARAMETERS: DRIFT VALUES
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC: +Vcc = +20V, Vcm = 0V, Rs = 50 Ohms. "Delta calculations performed on JAN S and QMLV devices at group
B, subgroup 5 only".
SYMBOL
PARAMETER
CONDITIONS
NOTES
PINNAME
MIN
MAX
UNIT
SUBGROUPS
Vio
Input Offset
Voltage
Vcm = 0V
-0.5
0.5
mV
1
Iib+
Input Bias
Current
Vcm = 0V, Rs = 100K Ohms
-7.5
7.5
nA
1
Iib-
Input Bias
Current
Vcm = 0V, Rs = 100K Ohms
-7.5
7.5
nA
1
Note 1:
Note 2:
Note 3:
Calculated parameter.
Datalog reading of K = V/mV.
Pre and post irradiation limits are identical to those listed under AC and DC
electrical characteristics except as listed in the Post Radiation Limits Table. These
parts may be dose rate sensitive in a space environment and demonstrate enhanced low
dose rate effect. Radiation end point limits for the noted parameters are guaranteed
only for the conditions as specified in MIL-STD-883, Method 1019.5
7
MICROCIRCUIT DATA SHEET
MRLM101A-X-RH REV 0B0
Graphics and Diagrams
GRAPHICS#
DESCRIPTION
08337HRB2
CERPACK (W), 10 LEAD (B/I CKT)
09384HRA4
METAL CAN, (H) TO-99,8 LEAD,.200 DIA P.C.(B/I CKT)
09413HRB1
CERDIP (J), 8 LEAD (B/I CKT)
H08CRF
METAL CAN (H), TO-99, 8LD, .200 DIA P.C. (P/P DWG)
J08ARL
CERDIP (J), 8 LEAD (P/P DWG)
P000178A
METAL CAN (H), 8 LEAD (PINOUT)
P000180A
CERPACK (W), 10 LEAD (PINOUT)
P000226A
CERDIP (J), 8 LEAD (PINOUT)
W10ARG
CERPACK (W), 10 LEAD (P/P DWG)
See attached graphics following this page.
8
N
N
N
MICROCIRCUIT DATA SHEET
MRLM101A-X-RH REV 0B0
Revision History
Rev
ECN #
Originator
Changes
0A0
M0003656 05/08/00
Rel Date
Rose Malone
Initial MDS Release: MRLM101A-X-RH, Rev. 0A0
0B0
M0003678 05/08/00
Rose Malone
Update MDS: MRLM101A-X-RH, Rev. 0A0 to MRLM101A-X-RH,
Rev. 0B0. Typo error in Features Section Controlling
Documents: SMD Suffix VPA should be QPA for
LM101AJRQML.
9