AD ADA4051

1.8 V, Micropower, Zero-Drift,
Rail-to-Rail Input/Output Op Amp
ADA4051-2
PIN CONFIGURATION
OUT A 1
8
V+
–IN A 2
ADA4051-2
7
OUT B
+IN A 3
TOP VIEW
(Not to Scale)
6
–IN B
5
+IN B
V– 4
08056-001
FEATURES
Very low supply current: 13 μA
Low offset voltage: 15 μV maximum
Offset voltage drift: 20 nV/°C
Single-supply operation: 1.8 V to 5.5 V
High PSRR: 110 dB minimum
High CMRR: 110 dB minimum
Rail-to-rail input and output
Unity gain stable
Extended industrial temperature range
Figure 1. 8-Lead MSOP (RM-8)
APPLICATIONS
Pressure and position sensors
Temperature measurements
Electronic scales
Medical instrumentation
Battery-powered equipment
Handheld test equipment
GENERAL DESCRIPTION
The ADA4051-2 is a CMOS, micropower, zero-drift operational amplifier utilizing an innovative chopping technique.
This amplifier features rail-to-rail input and output swing and
extremely low offset voltage while operating from a 1.8 V to
5.5 V power supply. This amplifier also offers high PSRR and
CMRR, while operating with a supply current of only 13 μA per
amplifier. This combination of features makes the ADA4051-2
amplifier an ideal choice for battery-powered applications where
high precision as well as low power consumption is important.
The ADA4051-2 is specified for the extended industrial temperature range of −40°C to +125°C. The ADA4051-2 amplifier is
available in the standard 8-pin MSOP.
The ADA4051-2 is a member of a growing series of zero-drift
op amps offered by Analog Devices, Inc. Refer to Table 1 for a
list of these devices.
Table 1. Op Amps
Supple
Single
Dual
Quad
Low Power, 5 V
AD8538
AD8539
5V
AD8628
AD8629
AD8630
16 V
AD8638
AD8639
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
ADA4051-2
TABLE OF CONTENTS
Features .............................................................................................. 1
Thermal Resistance .......................................................................5
Applications ....................................................................................... 1
Power Sequencing .........................................................................5
Pin Configuration ............................................................................. 1
ESD Caution...................................................................................5
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................6
Revision History ............................................................................... 2
Theory of Operation ...................................................................... 15
Specifications..................................................................................... 3
Input Voltage Range ................................................................... 16
Electrical Characteristics—5 V Operation................................ 3
Output Phase Reversal ............................................................... 17
Electrical Characteristics—1.8 V Operation ............................ 4
Outline Dimensions ....................................................................... 18
Absolute Maximum Ratings............................................................ 5
Ordering Guide .......................................................................... 18
REVISION HISTORY
7/09—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADA4051-2
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
VSY = 5.0 V, VCM = VSY/2 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Bias Current
Symbol
Conditions
VOS
∆VOS/∆T
IB
0 V ≤ VCM ≤ 5 V
−40°C ≤ TA ≤ +125°C
Min
Typ
Max
Unit
2
0.02
20
15
0.1
70
200
100
150
5
μV
μV/°C
pA
pA
pA
pA
V
dB
dB
dB
dB
MΩ
pF
pF
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large-Signal Voltage Gain
AVO
Input Resistance
Input Capacitance, Differential Mode
Input Capacitance, Common Mode
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
Phase Margin
Channel Separation
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
40
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
0 V ≤ VCM ≤ 5 V
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, 0.1 V ≤ VOUT ≤ VSY − 0.1 V
−40°C ≤ TA ≤ +125°C
0
110
106
115
106
RIN
CINDM
CINCM
VOH
VOL
ISC
ZOUT
PSRR
ISY
SR+
SR−
tS
135
135
8
2
5
RL = 10 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to VCM
−40°C ≤ TA ≤ +125°C
VOUT = VSY or GND
f = 1 kHz, G = 10
4.96
4.9
4.996
4.985
1.8 V ≤ VSY ≤ 5.5 V
−40°C ≤ TA ≤ +125°C
VOUT = VSY/2
−40°C ≤ TA ≤ +125°C
110
106
4.99
4.998
9
1
30
90
4
13
15
1
135
13
17
20
V
V
V
V
mV
mV
mV
mV
mA
Ω
dB
dB
μA
μA
0.06
0.04
110
V/μs
V/μs
μs
GBP
ΦM
CS
RL = 10 kΩ, CL = 100 pF, G = 1
RL = 10 kΩ, CL = 100 pF, G = 1
To 0.1%, VIN = 1 V p-p,
RL = 10 kΩ, CL = 100 pF
CL = 100 pF, G = 1
CL = 100 pF, G = 1
VIN = 4.99 V, f = 100 Hz
125
40
140
kHz
Degrees
dB
en p-p
en
in
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
1.96
95
100
μV p-p
nV/√Hz
fA/√Hz
Rev. 0 | Page 3 of 20
ADA4051-2
ELECTRICAL CHARACTERISTICS—1.8 V OPERATION
VSY = 1.8 V, VCM = VSY/2 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Bias Current
Symbol
Conditions
VOS
∆VOS/∆T
IB
0 V ≤ VCM ≤ 1.8 V
−40°C ≤ TA ≤ +125°C
Min
Typ
Max
Unit
2
0.02
5
15
0.1
50
200
100
150
1.8
μV
μV/°C
pA
pA
pA
pA
V
dB
dB
dB
dB
MΩ
pF
pF
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large-Signal Voltage Gain
AVO
Input Resistance
Input Capacitance, Differential Mode
Input Capacitance, Common Mode
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
Phase Margin
Channel Separation
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
10
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
0 V ≤ VCM ≤ 1.8 V
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, 0.1 V ≤ VOUT ≤ VSY − 0.1 V
−40°C ≤ TA ≤ +125°C
0
105
100
106
100
RIN
CINDM
CINCM
VOH
VOL
ISC
ZOUT
PSRR
ISY
SR+
SR−
tS
125
130
8
2
5
RL = 10 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to VCM
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to VCM
−40°C ≤ TA ≤ +125°C
VOUT = VSY or GND
f = 1 kHz, G = 10
1.76
1.7
1.796
1.79
1.8 V ≤ VSY ≤ 5.5 V
−40°C ≤ TA ≤ +125°C
VOUT = VSY/2
−40°C ≤ TA ≤ +125°C
110
106
1.796
1.799
3
1
20
40
3
9
13
1
135
13
17
20
V
V
V
V
mV
mV
mV
mV
mA
Ω
dB
dB
μA
μA
0.04
0.03
120
V/μs
V/μs
μs
GBP
ΦM
CS
RL = 10 kΩ, CL = 100 pF, G = 1
RL = 10 kΩ, CL = 100 pF, G = 1
To 0.1%, VIN = 1 V p-p,
RL = 10 kΩ, CL = 100 pF
CL = 100 pF, G = 1
CL = 100 pF, G = 1
VIN = 1.7 V, f = 100 Hz
115
40
140
kHz
Degrees
dB
en p-p
en
in
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
1.96
95
100
μV p-p
nV/√Hz
fA/√Hz
Rev. 0 | Page 4 of 20
ADA4051-2
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 4.
Parameter
Supply Voltage
Input Voltage
Input Current1
Differential Input Voltage2
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
θJA is specified with the device soldered on a circuit board with
its exposed paddle soldered to a pad (if applicable) on a 4-layer
JEDEC standard PC board with zero air flow, unless otherwise
specified.
Rating
6V
±VSY ± 0.3 V
±10 mA
±VSY
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
Table 5. Thermal Resistance
Package Type
8-Lead MSOP (RM-8)
θJA
186
θJC
52
Unit
°C/W
POWER SEQUENCING
1
The input pins have clamp diodes to the power supply pins. Limit input
current to 10 mA or less whenever input signals exceed the power supply
rail by 0.3 V.
2
Inputs are protected against high differential voltages by internal series
1.33 kΩ resistors and back-to-back diode-connected N-MOSFETs (with a
typical VT of 0.7 V for VCM of 0 V).
The op amp supplies must be established simultaneously with,
or before, any input signals are applied. If this is not possible,
the input current must be limited to 10 mA.
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 5 of 20
ADA4051-2
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
300
300
VSY = 5V
VCM = VSY/2
VSY = 1.8V
VCM = VSY/2
250
NUMBER OF AMPLIFIERS
200
150
100
200
150
100
50
50
–10
–8
–6
–4
–2
0
2
4
6
8
0
08056-002
0
10
VOS (µV)
–10
–6
–4
–2
0
2
4
6
8
10
VOS (µV)
Figure 5. Input Offset Voltage Distribution
Figure 2. Input Offset Voltage Distribution
10
–8
08056-005
NUMBER OF AMPLIFIERS
250
8
VSY = 1.8V
–40°C ≤ TA ≤ +125°C
VSY = 5V
–40°C ≤ TA ≤ 125°C
6
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
8
6
4
4
2
0.01 0.02 0.03 0.04 0.05
0.06 0.07 0.08 0.09 0.10
TCVOS (µV/°C)
0
Figure 6. Input Offset Voltage Drift Distribution with Temperature
15
15
VSY = 5V
10
5
5
VOS (µV)
10
0
DEVICE 1
DEVICE 2
DEVICE 3
DEVICE 4
DEVICE 5
DEVICE 6
DEVICE 7
DEVICE 8
DEVICE 9
DEVICE 10
–5
–10
0.3
0.6
0.9
1.2
1.5
0
DEVICE 1
DEVICE 2
DEVICE 3
DEVICE 4
DEVICE 5
DEVICE 6
DEVICE 7
DEVICE 8
DEVICE 9
DEVICE 10
–5
–10
1.8
VCM (V)
–15
08056-004
VOS (µV)
VSY = 1.8V
0
0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10
TCVOS (µV/°C)
Figure 3. Input Offset Voltage Drift Distribution with Temperature
–15
0
0
1
2
3
4
5
VCM (V)
Figure 4. Input Offset Voltage vs. Input Common-Mode Voltage
Figure 7. Input Offset Voltage vs. Input Common-Mode Voltage
Rev. 0 | Page 6 of 20
08056-007
0
08056-003
0
08056-006
2
ADA4051-2
TA = 25°C, unless otherwise noted.
100
VSY = 5V
IB–
80
60
60
40
20
0
0
25
50
75
100
125
TEMPERATURE (°C)
IB–
40
20
–20
25
50
Figure 8. Input Bias Current vs. Temperature
400
VSY = 1.8V
150
300
100
200
50
100
0
VSY = 5V
0
0
0.3
0.6
0.9
1.2
1.5
–300
1.8
VCM (V)
–400
08056-009
–150
Figure 9. Input Bias Current vs. Common-Mode Voltage and Temperature
VSY = 1.8V
1000
100
10
1
0.1
0.01
0.1
1
10
LOAD CURRENT (mA)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Figure 12. Input Bias Current vs. Common-Mode Voltage and Temperature
08056-010
0.01
0.001
–40°C
+25°C
+85°C
+125°C
0
VCM (V)
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
10,000
IB+, 25°C
IB–, 25°C
IB+, 85°C
IB–, 85°C
IB+, 125°C
IB–, 125°C
–200
08056-012
IB+, 25°C
IB–, 25°C
IB+, 85°C
IB–, 85°C
IB+, 125°C
IB–, 125°C
–100
OUTPUT VOLTAGE (VOH) TO SUPPLY RAIL (mV)
125
–100
–50
–200
100
Figure 11. Input Bias Current vs. Temperature
IB (pA)
IB (pA)
200
75
TEMPERATURE (°C)
Figure 10. Output Voltage (VOH) to Supply Rail vs. Load Current and
Temperature
10,000
VSY = 5V
1000
100
10
1
0.1
0.01
0.001
–40°C
+25°C
+85°C
+125°C
0.01
0.1
1
10
100
LOAD CURRENT (mA)
Figure 13. Output Voltage (VOH) to Supply Rail vs. Load Current and
Temperature
Rev. 0 | Page 7 of 20
08056-013
–20
IB+
08056-011
IB (pA)
80
08056-008
IB (pA)
100
IB+
VSY = 1.8V
ADA4051-2
TA = 25°C, unless otherwise noted.
10,000
1000
100
10
1
0.1
–40°C
+25°C
+85°C
+125°C
0.01
0.001
0.01
0.1
1
10
100
LOAD CURRENT (mA)
1000
100
10
1
–40°C
+25°C
+85°C
+125°C
0.1
0.01
0.001
0.01
0.1
1
10
100
LOAD CURRENT (mA)
Figure 14. Output Voltage (VOL) to Supply Rail vs. Load Current and
Temperature
Figure 17. Output Voltage (VOL) to Supply Rail vs. Load Current and
Temperature
5000
1800
OUTPUT VOLTAGE [VOH] (mV)
1798
1797
RL = 100kΩ
4998
RL = 100kΩ
1799
OUTPUT VOLTAGE [VOH] (mV)
VSY = 5V
08056-017
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
VSY = 1.8V
08056-014
OUTPUT VOLTAGE (VOL) TO SUPPLY RAIL (mV)
10,000
RL = 10kΩ
1796
4996
4994
4992
RL = 10kΩ
4990
4988
4986
1795
–10
5
20
35
50
65
80
95
110
125
TEMPERATURE (°C)
OUTPUT VOLTAGE [VOL] (mV)
12
10
8
6
4
RL = 10kΩ
2
80
95
110
125
125
10
RL = 10kΩ
8
6
4
2
5
20
35
50
65
80
95
110
TEMPERATURE (°C)
125
08056-016
–10
65
VSY = 5V
VCM = VSY/2
RL = 100kΩ
RL = 100kΩ
–25
50
14
VSY = 1.8V
VCM = VSY/2
0
–40
35
Figure 18. Output Voltage (VOH) vs. Temperature
12
OUTPUT VOLTAGE [VOL] (mV)
20
TEMPERATURE (°C)
Figure 15. Output Voltage (VOH) vs. Temperature
14
5
08056-018
–25
VSY = 5V
VCM = VSY/2
4982
–40 –25 –10
08056-015
1794
–40
08056-019
4984
VSY = 1.8V
VCM = VSY/2
Figure 16. Output Voltage (VOL) vs. Temperature
0
–40
–25
–10
5
20
35
50
65
80
95
110
TEMPERATURE (°C)
Figure 19. Output Voltage (VOL) vs. Temperature
Rev. 0 | Page 8 of 20
ADA4051-2
TA = 25°C, unless otherwise noted.
10
5
20
15
10
5
VCM = VSY/2
–40°C ≤ TA ≤ 125°C
2.0
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
0
–40
135
60
90
40
45
GAIN
0
0
–20
–45
–40
1k
10k
100k
1M
65
80
125
135
90
PHASE
20
45
GAIN
0
0
–90
–40
–90
–135
–60
100
1k
10k
100k
–135
1M
FREQUENCY (Hz)
Figure 24. Open-Loop Gain and Phase vs. Frequency
VSY = 1.8V
RL = 10kΩ
CL = 50pF
40
110
180
50
50
95
VSY = 5V
CL= 100pF
Figure 21. Open-Loop Gain and Phase vs. Frequency
VSY = 5V
RL = 10kΩ
CL = 50pF
40
30
CLOSED-LOOP GAIN (dB)
30
20
10
0
–10
–20
20
10
0
–10
–20
–30
–30
G=1
G = 10
G = 100
–40
1k
10k
100k
FREQUENCY (Hz)
1M
–50
100
08056-061
–50
100
50
–45
FREQUENCY (Hz)
–40
35
–20
08056-022
–60
100
OPEN-LOOP GAIN (dB)
PHASE
20
20
80
PHASE (Degrees)
40
CLOSED-LOOP GAIN (dB)
OPEN-LOOP GAIN (dB)
60
5
Figure 23. Total Supply Current vs. Temperature
180
VSY = 1.8V
CL= 100pF
–10
TEMPERATURE (°C)
Figure 20. Total Supply Current vs. Supply Voltage and Temperature
80
–25
PHASE (Degrees)
1.5
08056-025
1.0
08056-020
0.5
08056-023
15
0
VSY = 1.8V
25
20
0
VSY = 5V
VCM = VSY/2
TOTAL SUPPLY CURRENT (µA)
25
TOTAL SUPPLY CURRENT (µA)
30
+125°C
+85°C
+25°C
–40°C
G=1
G = 10
G = 100
1k
10k
100k
FREQUENCY (Hz)
Figure 22. Closed-Loop Gain vs. Frequency
Figure 25. Closed-Loop Gain vs. Frequency
Rev. 0 | Page 9 of 20
1M
08056-062
30
ADA4051-2
TA = 25°C, unless otherwise noted.
10k
VSY = 1.8V
1k
1k
100
100
ZOUT (Ω)
10
VSY = 5V
10
1
G = −1
G = −10
G = −100
10k
100k
1M
FREQUENCY (Hz)
0.1
1k
08056-026
0.1
1k
G = −1
G = −10
G = −100
10k
100k
1M
FREQUENCY (Hz)
Figure 29. Output Impedance vs. Frequency
Figure 26. Output Impedance vs. Frequency
110
110
VSY = 5V
100
90
90
80
70
80
70
60
60
50
50
100
1k
10k
100k
1M
FREQUENCY (Hz)
40
10
100
1k
10k
100k
Figure 30. CMRR vs. Frequency
Figure 27. CMRR vs. Frequency
120
120
VSY = 5V
100
80
80
PSRR (dB)
100
60
PSRR+
60
PSRR+
40
40
20
20
PSRR–
PSRR–
1k
10k
100k
FREQUENCY (Hz)
1M
08056-028
PSRR (dB)
VSY = 1.8V
0
100
1M
FREQUENCY (Hz)
08056-030
CMRR (dB)
100
08056-027
CMRR (dB)
VSY = 1.8V
40
10
08056-029
1
0
100
1k
10k
100k
FREQUENCY (Hz)
Figure 31. PSRR vs. Frequency
Figure 28. PSRR vs. Frequency
Rev. 0 | Page 10 of 20
1M
08056-031
ZOUT (Ω)
10k
ADA4051-2
TA = 25°C, unless otherwise noted.
VSY = ±2.5V
VIN = 50mV p-p
RL = 10kΩ
CL= 50pF
50
40
OVERSHOOT (%)
30
20
40
−OVERSHOOT
30
20
−OVERSHOOT
+OVERSHOOT
+OVERSHOOT
10
0
10
08056-032
0
10
100
LOAD CAPACITANCE (pF)
08056-035
10
100
LOAD CAPACITANCE (pF)
Figure 32. Small-Signal Overshoot vs. Load Capacitance
Figure 35. Small-Signal Overshoot vs. Load Capacitance
VSY = 5V
RL = 10kΩ
CL = 100pF
G=1
VIN = 4V p-p
08056-033
VOLTAGE (1V/DIV)
VOLTAGE (500mV/DIV)
VSY = 1.8V
RL = 10kΩ
CL = 100pF
G=1
VIN = 1.5V p-p
TIME (100µs/DIV)
08056-036
OVERSHOOT (%)
50
60
VSY = ±0.9V
VIN = 50mV p-p
RL = 10kΩ
CL= 50pF
TIME (100µs/DIV)
Figure 36. Large Signal Transient Response
Figure 33. Large-Signal Transient Response
VSY = 5V
RL = 10kΩ
CL = 100pF
G=1
VIN = 50mV p-p
TIME (100µs/DIV)
08056-034
VOLTAGE (10mV/DIV)
VOLTAGE (10mV/DIV)
VSY = 1.8V
RL = 10kΩ
CL = 100pF
G=1
VIN = 50mV p-p
TIME (100µs/DIV)
Figure 34. Small-Signal Transient Response
Figure 37. Small Signal Transient Response
Rev. 0 | Page 11 of 20
08056-037
60
ADA4051-2
TA = 25°C, unless otherwise noted.
VSY = 5V
INPUT VOLTAGE NOISE (0.5µV/DIV)
TIME (4s/DIV)
TIME (4s/DIV)
Figure 38. Input Voltage Noise 0.1 Hz to 10 Hz
Figure 41. Input Voltage Noise 0.1 Hz to 10 Hz
1k
VSY = 1.8V
VOLTAGE NOISE DENSITY (nV/√Hz)
VSY = 5V
100
10
100
1k
10k
FREQUENCY (Hz)
100
10
1
10
1k
10k
FREQUENCY (Hz)
Figure 39. Voltage Noise Density vs. Frequency
Figure 42. Voltage Noise Density vs. Frequency
0.4
VSY = ±0.9V
G = –10
INPUT VOLTAGE
0
0.5
OUTPUT VOLTAGE
0
–0.5
INPUT VOLTAGE (100mV/DIV)
0.05
–0.05
VSY = ±2.5V
G = –10
0.3
OUTPUT VOLTAGE (500mV/DIV)
0.10
0.2
0.1
INPUT VOLTAGE
0
OUTPUT VOLTAGE
–0.1
–2
08056-040
–1.5
0
–1
–1.0
TIME (40µs/DIV)
1
OUTPUT VOLTAGE (1V/DIV)
0.15
INPUT VOLTAGE (50mV/DIV)
100
TIME (40µs/DIV)
Figure 43. Positive Overload Recovery
Figure 40. Positive Overload Recovery
Rev. 0 | Page 12 of 20
–3
08056-043
1
10
08056-039
VOLTAGE NOISE DENSITY (nV/√Hz)
1k
08056-041
1.96µV p-p
08056-038
1.94µV p-p
08056-042
INPUT VOLTAGE NOISE (0.5µV/DIV)
VSY = 1.8V
ADA4051-2
TA = 25°C, unless otherwise noted.
0.05
0.1
1.5
–0.15
1.0
0.5
OUTPUT VOLTAGE
–0.1
–0.2
4
–0.3
3
–0.4
2
1
OUTPUT VOLTAGE
0
–0.5
TIME (40µs/DIV)
Figure 47. Negative Overload Recovery
ERROR
BAND
VSY = ±2.5V
VIN = 1V p-p
RL = 10kΩ
CL = 100pF
TIME (40µs/DIV)
TIME (40µs/DIV)
Figure 46. Negative Settling Time to 0.1%
5
OUTPUT VOLTAGE
ERROR
BAND
0
–5
VSY = ±2.5V
VIN = 1V p-p
RL = 10kΩ
CL = 100pF
TIME (40µs/DIV)
Figure 49. Negative Settling Time to 0.1%
Rev. 0 | Page 13 of 20
OUTPUT VOLTAGE (5mV/DIV)
INPUT VOLTAGE
08056-049
–5
INPUT VOLTAGE (500mV/DIV)
0
08056-046
5
OUTPUT VOLTAGE (5mV/DIV)
Figure 48. Positive Settling Time to 0.1%
INPUT VOLTAGE
VSY = ±0.9V
VIN = 1V p-p
RL = 10kΩ
CL = 100pF
–5
TIME (40µs/DIV)
Figure 45. Positive Settling Time to 0.1%
OUTPUT VOLTAGE
0
OUTPUT VOLTAGE (5mV/DIV)
–5
VSY = ±0.9V
VIN = 1V p-p
RL = 10kΩ
CL = 100pF
5
OUTPUT VOLTAGE
08056-048
0
INPUT VOLTAGE (500mV/DIV)
5
OUTPUT VOLTAGE
OUTPUT VOLTAGE (5mV/DIV)
INPUT VOLTAGE
08056-045
INPUT VOLTAGE (500mV/DIV)
INPUT VOLTAGE
ERROR
BAND
–1
TIME (40µs/DIV)
Figure 44. Negative Overload Recovery
ERROR
BAND
0
VSY = ±2.5V
G = –10
08056-044
VSY = ±0.9V
G = –10
INPUT VOLTAGE
OUTPUT VOLTAGE (1V/DIV)
–0.10
INPUT VOLTAGE (100mV/DIV)
OUTPUT VOLTAGE (500mV/DIV)
–0.05
INPUT VOLTAGE (500mV/DIV)
INPUT VOLTAGE (50mV/DIV)
0
08056-047
INPUT VOLTAGE
0
ADA4051-2
TA = 25°C, unless otherwise noted.
–100
VIN = 0.5V
VIN = 1V
VIN = 1.7V
1kΩ
CHANNEL SEPARATION (dB)
–110
–120
–130
–140
VSY = 1.8V
G = –100
RL= 10kΩ
CL= 50pF
200
2k
20k
FREQUENCY (Hz)
–110
–120
–130
–140
VSY = 5V
G = –100
RL= 10kΩ
CL = 50pF
–150
20
200
1.5
5
OUTPUT SWING (V)
6
1.2
0.9
0.6
4
3
2
VSY = 1.8V
VIN = 1.7V
G=1
RL= 10kΩ
CL = 50pF
1
1k
10k
100k
FREQUENCY (Hz)
VSY = 5V
VIN = 4.9V
G=1
RL= 10kΩ
CL = 50pF
0
100
08056-051
0
100
20k
Figure 53. Channel Separation vs. Frequency
1.8
1k
10k
100k
FREQUENCY (Hz)
Figure 51. Output Swing vs. Frequency
Figure 54. Output Swing vs. Frequency
VSY = ±2.5V
G=1
RL= NO LOAD
CL = NO LOAD
VOLTAGE (1V/DIV)
VSY = ±0.9V
G=1
RL= NO LOAD
CL = NO LOAD
VOUT
VOUT
VIN
VIN
TIME (200µs/DIV)
08056-052
VOLTAGE (500mV/DIV)
OUTPUT SWING (V)
Figure 50. Channel Separation vs. Frequency
0.3
2k
FREQUENCY (Hz)
TIME (200µs/DIV)
Figure 55. No Phase Reversal
Figure 52. No Phase Reversal
Rev. 0 | Page 14 of 20
08056-055
–150
20
VIN = 1V
VIN = 3V
VIN = 4.99V
100kΩ
08056-050
CHANNEL SEPARATION (dB)
1kΩ
08056-053
100kΩ
08056-054
–100
ADA4051-2
THEORY OF OPERATION
Auto-zeroing and chopping are widely used for a high precision
CMOS amplifier to achieve low offset, low offset drift, and no
1/f noise. Auto-zeroing and chopping both have pros and cons.
Auto-zeroing gets more in-band noise due to aliasing introduced by sampling. Chopping has offset-related ripple, because
it modulates the initial offset associated with the amplifier up to
its chopping frequency.
To accomplish the best noise vs. power trade-off, the chopping
technique is the right approach to design a low offset amplifier.
It is preferable to suppress the offset-related ripple in a chopper
amplifier in the amplifier itself, which otherwise must be
eliminated by an extra off-chip post filter.
Figure 56 shows the block diagram design of the ADA4051-2
chopper amplifier, employing a local feedback loop called auto
correction feedback (ACFB). The main signal path contains
an input chopping switch network (CHOP1), a first transconductance amplifier (Gm1), an output chopping switch network
(CHOP2), a second transconductance amplifier (Gm2), and a
third transconductance amplifier (Gm3). CHOP1 and CHOP2
operate at 40 kHz of chopping frequency to modulate the initial
offset and 1/f noise from Gm1 up to the chopping frequency. A
fourth transconductance amplifier (Gm4) in the ACFB senses
the modulated ripple at the output of CHOP2, caused by the
initial offset voltage of Gm1. Then, the ripple is demodulated
down to a dc domain through a third chopping switch network
(CHOP3), operating with the same chopping clock as CHOP1
and CHOP2. Finally, a null transconductance amplifier (Gm5)
tries to null out any dc component at the output of Gm1, which
would otherwise appear in the overall output as ripple.
A switched capacitor notch filter (NF) functions to selectively
suppress the undesired offset-related ripple, without disturbing
the desired input signal from the overall input. The desired
input dc signal appears as a dc signal at CHOP2’s output. Then,
it is modulated up to the chopping frequency by CHOP3 and
filtered out by the NF. Therefore, it does not create any feedback and does not disturb the desired input signal. The NF is
synchronized with the chopping clock to perfectly filter out the
modulated component. In the same manner, the offset of Gm5
is filtered out by the combination of CHOP3 and the NF,
enabling accurate ripple sensing at the output of CHOP2.
In parallel with the high dc gain path, a feedforward transconductance amplifier (Gm6) is added to bypass the phase shift
introduced by the ACFB at the chopping frequency. The Gm6
is designed to have the same transconductance as the Gm1 to
avoid the pole-zero doublets. Such design avoids any instability
introduced by the ACFB in the overall feedback loop.
CHOP1
Gm1
CHOP2
Gm2
+IN
C2
Gm3
OUT
–IN
Rev. 0 | Page 15 of 20
C3
Gm5
C1
NF CHOP3 Gm4
Gm6 (= Gm1)
08056-060
The ADA4051-2 micropower chopper operational amplifier
features a novel patent-pending technique that suppresses
offset-related ripple in a chopper amplifier. It nulls out the
amplifier’s initial offset in the dc domain that otherwise
becomes a ripple at the overall output, instead of filtering
the ripple in the ac domain.
Figure 56. ADA4051-2 Chopper Amplifier Block Diagram
ADA4051-2
The voltage noise density is essentially flat from dc to the
chopping frequency, whose level is just the thermal noise floor
dominated by the Gm1, without receiving any addition due
to the ACFB. Although the ACFB suppresses the ripple related
to the chopping, there is a remaining voltage ripple. To further
suppress the remaining ripple down to a desired level, it is
recommended to have a post filter at the output of the amplifier.
The remaining voltage ripple is composed of two ingredients.
The first ripple’s ingredient is due to the residual ripple associated
with the initial offset of the Gm1. It is proportional to the magnitude of the initial offset and creates a spectrum at the chopping
frequency (fCHOP). When the amplifier is configured as a unity
gain buffer, this ripple has a typical value of 4.9 μV rms and a
maximum of 34.7 μV rms. The second ripple’s ingredient is due
to the intermodulation between the high frequency input signal
and the chopping frequency. It depends on the input frequency
(fIN) and creates a spectrum at frequencies equal to the difference between the chopping frequency and the input
frequency (fCHOP − fIN) and at their summation (fCHOP + fIN).
The magnitude of the ripple for different input frequencies
is shown in Figure 57.
400
300
200
100
0
•
•
•
•
Considerable suppression of the offset-related ripple
No affect on the desired input signal as long as its
frequency is much lower than the chopping frequency
shown in Figure 57
Achievement of low offset similar to a conventional
chopper amplifier
No introduction of excess noise
The ADA4051-2 chopper amplifier provides rail-to-rail input
range with 1.8 V to 5.5 V supply voltage range and 20 μA supply
current consumption over the −40°C to +125°C extended
industrial temperature range. The gain bandwidth is 125 kHz
as a unity gain stable amplifier up to 100 pF load capacitance.
INPUT VOLTAGE RANGE
The ADA4051-2 has internal ESD protection diodes. These
diodes are connected between the inputs and each supply rail
to protect the input MOSFETs against an electrical discharge
event and are normally reversed-biased. This protection
scheme allows voltages as high as approximately 0.3 V beyond
the supplies (±VSY ± 0.3 V) to be applied at the input of either
terminal without causing permanent damage.
If either input exceeds either supply rail by more than 0.3 V, these
ESD diodes become forward-biased and large amounts of
current begin to flow through them. Without current limiting,
this excessive current causes permanent damage to the device.
If the inputs are expected to be subject to overvoltage conditions, install a resistor in series with each input to limit the
input current to 10 mA maximum.
0
1
2
3
4
5
6
7
INPUT FREQUENCY (kHz)
8
9
10
08056-063
MODULATED OUTPUT RIPPLE (µV rms)
500
The design architecture of the ADA4051-2 specifically targets
precision signal conditioning applications requiring accurate
and stable performance from dc to 10 Hz bandwidth. In
summary, the main features of the ADA4051-2 chopper
amplifier are
Figure 57. ADA4051-2 Modulated Output Ripple vs. Input Frequency
The ADA4051-2 also has internal circuitry that protects the input
stage from high differential voltages. This circuitry is composed
of internal 1.33 kΩ resistors in series with each input and backto-back diode-connected N-MOSFETs (with a typical VT of
0.7 V for VCM of 0 V) after these series resistors. Under normal
negative feedback operating conditions, the ADA4051-2 amplifier
corrects its output to ensure the two inputs are at the same voltage.
However, if the device is configured as a comparator or is under
some unusual operating condition, the input voltages may be
forced to different potentials, which may cause excessive
current to flow through the internal diode-connected NMOSFETs.
Although the ADA4051-2 is a rail-to-rail input amplifier, take
care to ensure that the potential difference between the inputs
does not exceed ±VSY to avert permanent damage to the device.
Rev. 0 | Page 16 of 20
ADA4051-2
OUTPUT PHASE REVERSAL
Output phase reversal occurs in some amplifiers when the input
common-mode voltage range is exceeded. As a common-mode
voltage moves outside the common-mode range, the outputs
of these amplifiers can suddenly jump in the opposite direction
to the supply rail. This usually occurs when one of the internal
stages of the amplifier no longer has sufficient bias voltage
across it and subsequently turns off.
The ADA4051-2 amplifier has been carefully designed to
prevent any output phase reversal, provided both inputs are
maintained approximately within 0.3 V above and below the
supply voltages (±VSY ± 0.3 V). If one or both inputs exceed the
input voltage range but remain within the ±VSY ± 0.3 V range,
an internal loop opens and the output remains in saturation
mode, without phase reversal, until the input voltage is brought
back to within the input voltage range limits as is shown in
Figure 52 and Figure 55.
Rev. 0 | Page 17 of 20
ADA4051-2
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
3.20
3.00
2.80
1
5
5.15
4.90
4.65
4
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.23
0.08
8°
0°
0.80
0.60
0.40
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 58. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADA4051-2ARMZ 1
ADA4051-2ARMZ-R71
ADA4051-2ARMZ-RL1
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
Z = RoHS Compliant Part.
Rev. 0 | Page 18 of 20
Package Option
RM-8
RM-8
RM-8
Branding
A2M
A2M
A2M
ADA4051-2
NOTES
Rev. 0 | Page 19 of 20
ADA4051-2
NOTES
©2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08056-0-7/09(0)
Rev. 0 | Page 20 of 20