ETC ALTIVECPEMAD

Freescale Semiconductor, Inc.
ALTIVECPEMAD/D
(Motorola Order Number)
3/1999
REV. 0
Freescale Semiconductor, Inc...
ª
Errata
AltiVecª Technology Programming
Environments Manual Errata
This errata describes corrections to the AltiVec Technology Programming
Environments Manual (order #: ALTIVECPEM/D, rev. 0) referred to as the
PEM. For convenience, the section number and page number are provided.
This document contains information on a new product under development by Motorola. Motorola reserves the right to change or
discontinue this product without notice.
© Motorola, Inc., 1999. All rights reserved.
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Freescale Semiconductor, Inc.
Section #/Page #
Changes
2.1.2, Page 2-4
0
Field VR0
Replace Figure 2-4, ÒSaving/Restoring the AltiVec Context Register
(VRSAVE)Ó with the following:
1
2
3
4
5
6
7
8
VR1
VR2
VR3
VR4
VR5
VR6
VR7
VR8
Reset
10
11
12
13
14
15
0000_0000_0000_0000
R/W
Freescale Semiconductor, Inc...
9
VR9 VR10 VR11 VR12 VR13 VR14 VR15
R/W using mfspr or mtspr instructions
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Field VR16 VR17 VR18 VR19 VR20 VR21 VR22 VR23 VR24 VR25 VR26 VR27 VR28 VR29 VR30 VR31
Reset
0000_0000_0000_0000
R/W
R/W using mfspr or mtspr instructions
SPR
SPR256
2.2, Page 2-9
Figure 2-10ÑThe vector registers are 128 bits wide not 64 bits wide
as shown.
4.2.2.4, Page 4-20
Change Table 4-9 as follows:
¥ the mnemonic for Vector Round to Floating-Point Integer Nearest
should be vrÞn not fvrÞn.
¥ the mnemonic for Vector Round to Floating-Point Integer toward
Zero should be vrÞz,not fvrÞz.
¥ the mnemonic for Vector Round to Floating-Point Integer toward
Positive InÞnity should be vrÞp, not fvrÞp.
¥ the mnemonic for Vector Round to Floating-Point Integer toward
Minus InÞnity should be vrÞm, not fvrÞm.
Change the mfvscr encoding as shown below (note: bit 31 is not 0):
6.2, Page 6-24
04
0
vD
5
6
04
6
15 16
1540
20 21
31
00000
10
11
vB
15 16
1604
20 21
31
Change the mfvscr encoding as shown below (note: bit 31 is not 0):
A.1, Page A-2
2
11
00000
5
mfvscr
10
00000
Change the mtvscr encoding as shown below (note: bit 31 is not 0):
6.2, Page 6-25
0
00000
04
vD
00000
00000
AltiVecª Technology Programming Environments Manual Errata
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MOTOROLA
Freescale Semiconductor, Inc.
Section #/Page #
A.1, Page A-2
Change the mtvscr encoding as shown below (note: bit 31 is not 0 and
vD should be vB):
mtvscr
04
A.2, Page A-9
Freescale Semiconductor, Inc...
mfvscr
000100
000100
mfvscr
1604
vD
00000
00000
110 0000 0100
00000
00000
vB
110 0100 0100
Change the mfvscr encoding as shown below (note: bit 31 is not 0):
04
A.3, Page A-14
MOTOROLA
vB
00000
Change the mtvscr encoding as shown below (note: bit 31 is not 0):
A.3, Page A-14
mtvscr
00000
Change the mfvscr encoding as shown below (note: bit 31 is not 0):
A.2, Page A-9
mtvscr
Changes
vD
00000
00000
1540
Change the mtvscr encoding as shown below (note: bit 31 is not 0):
04
00000
00000
vB
AltiVecª Technology Programming Environments Manual Errata
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Go to: www.freescale.com
1604
3
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