ETC BUK7107

BUK7107-55ATE
TrenchPLUS standard level FET
Rev. 01 — 29 July 2002
M3D322
Product data
1. Product profile
1.1 Description
N-channel enhancement mode field-effect power transistor in a plastic package using
TrenchMOS™ technology, featuring both very low on-state resistance, and diode for
temperature sensing.
Product availability:
BUK7107-55ATE in SOT426 (D2-PAK).
1.2 Features
■ Integrated temperature sensor
■ ESD protection
■ Q101 compliant
■ Standard level compatible
1.3 Applications
■ Variable Valve Timing for engines
■ Automotive and power switching
■ Electrical Power Assisted Steering
■ Fan control
1.4 Quick reference data
■ VDS = 55 V (max)
■ ID = 75 A (max)
■ RDSon = 5.8 mΩ (typ)
■ VF = 658 mV (typ)
■ SF = −1.54 mV/K (typ)
■ Ptot = 272 W
2. Pinning information
Table 1:
Pinning - SOT426 simplified outline and symbol
Pin
Description
1
gate (g)
2
anode (a)
3
drain (d)
4
cathode (k)
5
source (s)
mb
mounting base;
connected to drain (d)
Simplified outline
Symbol
d
a
s
k
mb
g
1 2 3 4 5
MBL317
Front view
MBK127
SOT426
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
3. Limiting values
Table 2: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VDS
drain-source voltage (DC)
VDGS
drain-gate voltage (DC)
VGS
gate-source voltage (DC)
ID
drain current (DC)
Conditions
IDG = 250 µA
Min
Max
Unit
-
55
V
-
55
V
-
±20
V
Tmb = 25 °C; VGS = 10 V;
Figure 2 and 3
[1]
-
140
A
[2]
-
75
A
Tmb = 100 °C; VGS = 10 V; Figure 2
[2]
-
75
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
Figure 3
-
560
A
Ptot
total power dissipation
Tmb = 25 °C; Figure 1
-
272
W
IGS(CL)
gate-source clamping current
continuous
-
10
mA
tp = 5 ms; δ = 0.01
-
50
mA
Visol(FET-TSD) FET to temperature sense diode
isolation voltage
-
±100
V
Tstg
storage temperature
−55
+175
°C
Tj
junction temperature
−55
+175
°C
[1]
-
140
A
[2]
-
75
A
Tmb = 25 °C; pulsed; tp ≤ 10 µs
-
560
A
unclamped inductive load; ID = 68 A;
VDS ≤ 55 V; VGS = 10 V; RGS = 50 Ω;
starting Tj = 25 °C
-
460
mJ
6
kV
Source-drain diode
Tmb = 25 °C
reverse drain current
IDR
IDRM
peak reverse drain current
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-source avalanche
energy
Electrostatic Discharge
Vesd
[1]
[2]
electrostatic discharge voltage; pins
1,3,5
Human Body Model; C = 100 pF;
R = 1.5 kΩ
Current is limited by power dissipation chip rating
Continuous current is limited by package.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
Rev. 01 — 29 July 2002
2 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
03na19
120
03ni63
160
ID
(A)
Pder
(%)
120
80
80
40
Capped at 75A due to package
40
0
0
0
50
100
150
0
200
Tmb (°C)
P tot
P der = ----------------------- × 100%
P
°
50
100
150
200
Tmb (°C)
VGS ≥ 10 V
tot ( 25 C )
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Continuous drain current as a function of
mounting base temperature.
03nf55
103
ID
(A)
Limit RDSon = VDS/ID
tp = 10 µs
102
100 µs
Capped at 75 A due to package
1 ms
DC
10 ms
10
100 ms
1
1
102
10
VDS (V)
Tmb = 25 °C; IDM single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
Rev. 01 — 29 July 2002
3 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
4. Thermal characteristics
Table 3:
Thermal characteristics
Symbol
Parameter
Rth(j-a)
thermal resistance from junction to ambient
SOT426
Rth(j-mb)
thermal resistance from junction to mounting
base
Conditions
Min
Typ
Max Unit
minimum footprint; mounted on a PCB
-
50
-
Figure 4
-
-
0.55 K/W
K/W
4.1 Transient thermal impedance
03ni29
1
Z th(j-mb)
(K/W)
δ = 0.5
10-1
0.2
0.1
0.05
10-2
0.02
δ=
P
tp
T
single shot
t
tp
T
10-3
10-6
10-5
10-4
10-3
10-2
10-1
1
tp (s)
10
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
Rev. 01 — 29 July 2002
4 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
5. Characteristics
Table 4: Characteristics
Tj = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
VGS(th)
IDSS
drain-source breakdown
voltage
ID = 0.25 mA; VGS = 0 V
Tj = 25°C
55
-
-
V
Tj = −55 °C
50
-
-
V
gate-source threshold voltage ID = 1 mA; VDS = VGS;
Figure 9
drain-source leakage current
Tj = 25°C
2
3
4
V
Tj = 175 °C
1
-
-
V
Tj = −55 °C
-
-
4.4
V
Tj = 25°C
-
0.1
10
µA
Tj = 175 °C
-
-
250
µA
20
22
-
V
Tj = 25 °C
-
22
1000
nA
Tj = 175 °C
-
-
10
µA
Tj = 25°C
-
5.8
7
mΩ
Tj = 175 °C
-
-
14
mΩ
VDS = 55 V; VGS = 0 V
V(BR)GSS
gate-source breakdown
voltage
IG = ±1 mA;
−55°C < Tj <175 °C
IGSS
gate-source leakage current
VGS = ±10 V; VDS = 0 V
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 50 A;
Figure 7 and 8
VF
forward voltage, temperature
sense diode
IF = 250 µA
648
658
668
mV
SF
temperature coefficient
temperature sense diode
IF = 250 µA;
−55°C < Tj <175 °C
−1.4
−1.54
−1.68
mV/K
Vhys
temperature sense diode
forward voltage hysteresis
125 µA < IF < 250 µA
25
32
50
mV
VGS = 10 V; VDS = 44 V;
ID = 25 A; Figure 14
-
116
-
nC
Dynamic characteristics
Qg(tot)
total gate charge
Qgs
gate-source charge
-
19
-
nC
Qgd
gate-to-drain (Miller) charge
-
50
-
nC
Ciss
input capacitance
-
4500
-
pF
-
960
-
pF
-
510
-
pF
-
36
-
ns
-
115
-
ns
VGS = 0 V; VDS = 25 V;
f = 1 MHz; Figure 12
Coss
output capacitance
Crss
reverse transfer capacitance
td(on)
turn-on delay time
tr
rise time
td(off)
turn-off delay time
-
159
-
ns
tf
fall time
-
111
-
ns
VDD = 30 V; RL = 1.2 Ω;
VGS = 10 V; RG = 10 Ω
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
Rev. 01 — 29 July 2002
5 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
Table 4: Characteristics…continued
Tj = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Ld
internal drain inductance
from upper edge of drain
mounting base to center of
die
-
2.5
-
nH
Ls
internal source inductance
from source lead to source
bond pad
-
7.5
-
nH
Source-drain diode
VSD
source-drain (diode forward)
voltage
IS = 25 A; VGS = 0 V;
Figure 17
-
0.85
1.2
V
trr
reverse recovery time
-
80
-
ns
Qr
recovered charge
IS = 20 A; dIS/dt = −100 A/µs
VGS = −10 V; VDS = 30 V
-
200
-
nC
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
Rev. 01 — 29 July 2002
6 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
03ni65
400
03ni66
8
10
12
ID
(A)
RDSon
(mΩ)
8.5
8
20
300
7
VGS (V) = 7.5
7
6
200
6.5
6
100
5
5.5
4
4.5
4
0
0
2
4
6
8
5
10
VDS (V)
Tj = 25 °C; tp = 300 µs
10
15
20
VGS (V)
Tj = 25 °C; ID = 50 A
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 6. Drain-source on-state resistance as a function
of gate-source voltage; typical values.
03ni67
12
RDSon
(mΩ)
10
03ne89
2
VGS (V) = 5.5
a
6
1.5
6.5
8
7
8
10
6
1
4
0.5
2
0
0
0
20
40
60
80
100
120
ID (A)
Tj = 25 °C; tp = 300 µs
-60
60
120
180
Tj (°C)
R DSon
a = ---------------------------R DSon ( 25 °C )
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
0
Rev. 01 — 29 July 2002
7 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
03aa32
5
03aa35
10-1
ID
(A)
VGS(th)
(V)
4
max
10-2
3
typ
10-3
2
min
10-4
1
10-5
0
10-6
-60
0
60
120
Tj (°C)
180
min
0
typ
2
max
4
VGS (V)
6
Tj = 25 °C; VDS = VGS
ID = 1 mA; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
03ni68
80
gfs
(S)
03ni69
8000
C
(pF)
60
6000
40
4000
20
C iss
Coss
Crss
2000
0
0
0
20
40
60
10-2
80 I (A) 100
D
Tj = 25 °C; VDS = 25 V
1
10 V
102
DS (V)
VGS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of
drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
10-1
Rev. 01 — 29 July 2002
8 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
03ni70
120
ID
(A)
100
03nf25
10
VGS
(V)
8
80
VDS = 14 V
6
VDS = 44 V
60
4
40
175 °C
2
Tj = 25 °C
20
0
0
0
2
4
VGS (V)
0
6
40
80
QG (nC)
120
Tj = 25 °C; ID = 25 A
VDS = 25 V
Fig 13. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
03ne84
700
VF
(mV)
Fig 14. Gate-source voltage as a function of turn-on
gate charge; typical values.
03ne85
1.70
-SF
(mV/K)
1.65
max
1.60
600
typ
1.55
500
1.50
1.45
400
min
1.40
0
50
100
150
Tj (ºC)
200
IF = 250 µA
645
655
660
665
670
675
VF (mV)
VF at Tj = 25 °C; IF = 250 µA
Fig 15. Forward voltage of temperature sense diode as
a function of junction temperature; typical
values.
Fig 16. Temperature coefficient of temperature sense
diode as a function of forward voltage; typical
values.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
650
Rev. 01 — 29 July 2002
9 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
03ni72
100
IS
(A)
80
60
40
175 °C
20
Tj = 25 °C
0
0.0
0.2
0.4
0.6
0.8
1.0
VSD (V)
VGS = 0 V
Fig 17. Reverse diode current as a function of reverse diode voltage; typical values.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
Rev. 01 — 29 July 2002
10 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
6. Package outline
Plastic single-ended surface mounted package (Philips version of D2-PAK); 5 leads
(one lead cropped)
SOT426
A
A1
E
D1
mounting
base
D
HD
3
1
2
4
e
e
Lp
5
b
e
c
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
c
D
max.
D1
E
e
Lp
HD
Q
mm
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
11
1.60
1.20
10.30
9.70
1.70
2.90
2.10
15.80
14.80
2.60
2.20
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
98-12-14
99-06-25
SOT426
Fig 18. SOT426 (D2-PAK).
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
Rev. 01 — 29 July 2002
11 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
7. Soldering
10.85
10.60
10.50
handbook, full pagewidth
1.50
7.50
7.40
1.70
2.25 2.15
8.15
8.275
8.35
1.50
4.60
0.30
4.85
5.40
7.95
8.075
3.00
solder lands
solder resist
0.20
1.70
(2×)
3.40
0.90
1.00
8.15
MSD058
occupied area
solder paste
Dimensions in mm.
Fig 19. Reflow soldering footprint for SOT426.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
Rev. 01 — 29 July 2002
12 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
8. Revision history
Table 5:
Revision history
Rev Date
01
20020729
CPCN
Description
-
Product data; initial version
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Product data
Rev. 01 — 29 July 2002
13 of 15
BUK7107-55ATE
Philips Semiconductors
TrenchPLUS standard level FET
9. Data sheet status
Data sheet status[1]
Product status[2]
Definition
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips Semiconductors
reserves the right to change the specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published at a
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to
improve the design and supply the best possible product.
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
make changes at any time in order to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change Notification (CPCN) procedure
SNW-SQ-650A.
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
[2]
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
10. Definitions
11. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
Right to make changes — Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
12. Trademarks
— TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: [email protected]
Product data
Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09875
Rev. 01 — 29 July 2002
14 of 15
Philips Semiconductors
BUK7107-55ATE
TrenchPLUS standard level FET
Contents
1
1.1
1.2
1.3
1.4
2
3
4
4.1
5
6
7
8
9
10
11
12
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Transient thermal impedance . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
© Koninklijke Philips Electronics N.V. 2002.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 29 July 2002
Document order number: 9397 750 09875