Integrated Triple Video Filter and Buffer with Selectable Cutoff Frequencies and Multiplexed Inputs for RGB, HD/SD ADA4411-3 FEATURES FUNCTIONAL BLOCK DIAGRAM Y1/G1 IN Y2/G2 IN ×2 ×4 Y/G OUT 36MHz, 18MHz, 9MHz ×2 ×4 Pb/B OUT 36MHz, 18MHz, 9MHz ×2 ×4 Pr/R OUT 36MHz, 18MHz, 9MHz Pb1/B1 IN Pb2/B2 IN Pr1/R1 IN Pr2/R2 IN INPUT SELECT DC OFFSET LEVEL1 ADA4411-3 LEVEL2 CUTOFF SELECT GAIN SELECT DISABLE 2 05527-001 Sixth-order adjustable video filters 36 MHz, 18 MHz, and 9 MHz Many video standards supported: RGB, YPbPr, YUV, SD, Y/C Ideal for 720p and 1080i resolutions −1 dB bandwidth of 30.5 MHz for HD Low quiescent power Only 265 mW for 3 channels on 5 V supply Disable feature cuts supply current to 15 μA 2:1 mux on all inputs Variable gain: ×2 or ×4 DC output offset adjust: ±0.5 V, input referred Excellent video specifications Wide supply range: +4.5 V to ±5 V Rail-to-rail output Output can swing 4.5 V p-p on single 5 V supply Small packaging: 24-lead QSOP Figure 1. APPLICATIONS Set-top boxes Personal video recorders DVD players and recorders HDTVs Projectors GENERAL DESCRIPTION The ADA4411-3 is a comprehensive filtering solution designed to give designers the flexibility to easily filter and drive various video signals, including high definition video. Cutoff frequencies of the sixth-order video filters range from 9 MHz to 36 MHz and can be selected by two logic pins to obtain four filter combinations that are tuned for RGB, high definition, and standard definition video signals. The ADA4411-3 has a railto-rail output that can swing 4.5 V p-p on a single 5 V supply. The ADA4411-3 offers gain and voltage offset adjustments. With a single logic pin, the throughput filter gain can be selected to be ×2 or ×4. Output voltage offset is continuously adjustable over an input-referred range of ±500 mV by applying a differential voltage to an independent offset control input. The ADA4411-3 offers 2:1 multiplexers on all of its video inputs, which are useful in applications where filtering is required for multiple sources of video signals. The ADA4411-3 can operate on a single +5 V supply as well as on ±5 V supplies. Single-supply operation is ideal in applications where power consumption is critical. The disable feature allows for further power conservation by reducing the supply current to typically 15 μA when a particular device is not in use. Dual-supply operation is best for applications where the negative-going video signal excursions must swing at or below ground while maintaining excellent video performance. The output buffers have the ability to drive two 75 Ω doubly terminated cables that are either dc-coupled or ac-coupled. The ADA4411-3 is available in the 24-lead, wide body QSOP and is rated for operation over the extended industrial temperature range of −40°C to +85°C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. ADA4411-3 TABLE OF CONTENTS Features .............................................................................................. 1 Overview ..................................................................................... 11 Applications....................................................................................... 1 Multiplexer Select Inputs........................................................... 11 Functional Block Diagram .............................................................. 1 Throughput Gain........................................................................ 11 General Description ......................................................................... 1 Disable ......................................................................................... 11 Revision History ............................................................................... 2 Cutoff Frequency Selection....................................................... 11 Specifications..................................................................................... 3 Output DC Offset Control ........................................................ 11 Absolute Maximum Ratings............................................................ 5 Input and Output Coupling ...................................................... 12 Thermal Resistance ...................................................................... 5 Printed Circuit Board Layout ................................................... 13 ESD Caution.................................................................................. 5 Video Encoder Reconstruction Filter...................................... 13 Pin Configuration And Function Descriptions............................ 6 Outline Dimensions ....................................................................... 15 Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 15 Theory of Operation ...................................................................... 10 Applications..................................................................................... 11 REVISION HISTORY 7/05—Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADA4411-3 SPECIFICATIONS VS = 5 V, @ TA = 25°C, VO = 1.4 V p-p, G = ×2, RL = 150 Ω, unless otherwise noted. Table 1. Parameter OVERALL PERFORMANCE Offset Error Offset Adjust Range Input Voltage Range, All Inputs Output Voltage Swing, All Outputs Linear Output Current per Channel Integrated Voltage Noise, Referred to Input Filter Input Bias Current Total Harmonic Distortion at 1 MHz Gain Error Magnitude FILTER DYNAMIC PERFORMANCE −1 dB Bandwidth −3 dB Bandwidth Out-of-Band Rejection Crosstalk Input Mux Isolation Propagation Delay Group Delay Variation Differential Gain Differential Phase CONTROL INPUT PERFORMANCE Input Logic 0 Voltage Input Logic 1 Voltage Input Bias Current DISABLE PERFORMANCE DISABLE Assert Voltage DISABLE Assert Time DISABLE Deassert Time DISABLE Input Bias Current Input-to-Output Isolation—Disabled POWER SUPPLY Operating Range Quiescent Current Quiescent Current—Disabled PSRR, Positive Supply PSRR, Negative Supply Test Conditions/Comments Min Input referred, all channels Input referred Positive swing Negative swing VS− − 0.1 VS+ − 0.33 All channels All channels FC = 36 MHz, FC = 18 MHz/FC = 9 MHz G = ×2/G = ×4 Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz f = 75 MHz f = 5 MHz, FC = 36 MHz f = 1 MHz, RSOURCE = 300 Ω f = 5 MHz, FC = 36 MHz Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz NTSC, FC = 9 MHz NTSC, FC = 9 MHz All inputs except DISABLE All inputs except DISABLE All inputs except DISABLE 26.5 13.5 6.5 34 16 8 −31 Typ Max Unit 12 ±500 30 mV mV V V V mA mV rms μA % dB VS+ − 2.0 VS+ − 0.22 VS− + 0.10 30 0.52 6.6 0.01/0.04 0.13/0.15 MHz MHz MHz MHz MHz MHz dB dB dB ns ns ns ns % Degrees 0.8 2.0 10 f = 10 MHz 4.5 Rev. 0 | Page 3 of 16 0.38/0.40 30.5 15.5 7.8 37 18 9 −43 −62 91 20 7 11 24 0.16 0.05 VS+ − 0.5 100 130 10 90 All channels All channels VS− + 0.13 62 57 53 15 70 65 15 15 12 56 150 V V μA V ns ns μA dB V mA μA dB dB ADA4411-3 VS = ±5 V, @ TA = 25°C, VO = 1.4 V p-p, G = ×2, RL = 150 Ω, unless otherwise noted. Table 2. Parameter OVERALL PERFORMANCE Offset Error Offset Adjust Range Input Voltage Range, All Inputs Output Voltage Swing, All Outputs Linear Output Current per Channel Integrated Voltage Noise, Referred to Input Filter Input Bias Current Total Harmonic Distortion at 1 MHz Gain Error Magnitude FILTER DYNAMIC PERFORMANCE −1 dB Bandwidth −3 dB Bandwidth Out-of-Band Rejection Crosstalk Input MUX Isolation Propagation Delay Group Delay Variation Differential Gain Differential Phase CONTROL INPUT PERFORMANCE Input Logic 0 Voltage Input Logic 1 Voltage Input Bias Current DISABLE PERFORMANCE DISABLE Assert Voltage DISABLE Assert Time DISABLE Deassert Time DISABLE Input Bias Current Input-to-Output Isolation—Disabled POWER SUPPLY Operating Range Quiescent Current Quiescent Current—Disabled PSRR, Positive Supply PSRR, Negative Supply Test Conditions/Comments Min Input referred, all channels Input referred Positive swing Negative swing VS− − 0.1 VS+ − 0.42 Typ Max Unit 13 ±500 32 mV mV V V V mA mV rms μA % dB VS+ − 2.0 All channels All channels FC = 36 MHz, FC = 18 MHz/FC = 9 MHz G = ×2/G = ×4 VS+ − 0.24 VS− + 0.24 30 0.50 6.3 0.01/0.03 0.13/0.13 Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz f = 75 MHz f = 5 MHz, FC = 36 MHz f = 1 MHz, RSOURCE = 300 Ω f = 5 MHz, FC = 36 MHz Cutoff frequency select = 36 MHz Cutoff frequency select = 18 MHz Cutoff frequency select = 9 MHz NTSC, FC = 9 MHz NTSC, FC = 9 MHz 30.0 15.0 7.8 36 18 9 −42 −62 91 19 7 13 22 0.04 0.16 All inputs except DISABLE All inputs except DISABLE All inputs except DISABLE 33 17 8 −31 25 0.8 10 f = 10 MHz 4.5 Rev. 0 | Page 4 of 16 0.34/0.36 2.0 VS+ − 0.5 75 125 34 90 All channels All channels VS− + 0.42 64 57 57 15 74 65 15 45 12 60 150 MHz MHz MHz MHz MHz MHz dB dB dB ns ns ns ns % Degrees V V μA V ns ns μA dB V mA μA dB dB ADA4411-3 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltage Power Dissipation Storage Temperature Operating Temperature Range Lead Temperature Range (Soldering 10 sec) Junction Temperature Rating 12 V See Figure 2 –65°C to +125°C –40°C to +85°C 300°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, θJA is specified for device soldered in circuit board for surface-mount packages. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to load drive depends on the particular application. For each output, the power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. The power dissipated due to all of the loads is equal to the sum of the power dissipations due to each individual load. RMS voltages and currents must be used in these calculations. Airflow increases heat dissipation, effectively reducing θJA. In addition, more metal directly in contact with the package leads from metal traces, through-holes, ground, and power planes reduces the θJA. Figure 2 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 24-lead QSOP (83°C/W) on a JEDEC standard 4-layer board. θJA values are approximations. Table 4. Thermal Resistance Package Type 24 Lead QSOP 2.5 θJA 83 Unit °C/W 2.3 2.1 Maximum Power Dissipation 1.9 1.7 WATTS 1.5 1.3 1.1 0.9 05527-002 The maximum safe power dissipation in the ADA4411-3 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4411-3. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices potentially causing failure. 0.7 0.5 –40 –20 0 20 40 60 80 AMBIENT TEMPERATURE (°C) Figure 2. Maximum Power Dissipation vs. Temperature for a 4-Layer Board ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 5 of 16 ADA4411-3 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS LEVEL1 1 LEVEL2 23 G_SEL Y1/G1 3 22 VCC 21 Y/G_OUT 20 VEE 19 Pb/B_OUT 18 VEE 17 Pr/R_OUT GND 4 Pb1/B1 5 GND 6 Pr1/R1 7 ADA4411-3 TOP VIEW (Not to Scale) F_SEL_A 8 F_SEL_B 9 16 VCC Y2/G2 10 15 MUX DGND 11 14 Pr2/R2 Pb2/B2 12 13 DGND Figure 3. 24-Lead QSOP Pin Configuration Table 5. 24-Lead QSOP Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Name LEVEL1 DISABLE Y1/G1 GND Pb1/B1 GND Pr1/R1 F_SEL_A F_SEL_B Y2/G2 DGND Pb2/B2 DGND Pr2/R2 MUX VCC Pr/R_OUT VEE Pb/B_OUT VEE Y/G_OUT VCC G_SEL LEVEL2 Description DC Level Adjust Pin 1 Disable/Power Down Channel 1 Y/G Video Input Signal Ground Reference Channel 1 Pb/B Video Input Signal Ground Reference Channel 1 Pr/R Video Input Filter Cutoff Select Input A Filter Cutoff Select Input B Channel 2 Y/G Video Input Digital Ground Reference Channel 2 Pb/B Video Input Digital Ground Reference Channel 2 Pr/R Video Input Input Mux Select Line Positive Power Supply Pr/R Video Output Negative Power Supply Pb/B Video Output Negative Power Supply Y/G Video Output Positive Power Supply Gain Select DC Level Adjust Pin 2 Rev. 0 | Page 6 of 16 05527-003 24 2 DISABLE ADA4411-3 TYPICAL PERFORMANCE CHARACTERISTICS FC = 36MHz FC = 9MHz GAIN (dB) FC = 18MHz BLACK LINE: VS = +5V GRAY LINE: VS = ±5V 1 10 15 12 9 6 3 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 –33 –36 –39 –42 –45 FC = 36MHz FC = 9MHz FC = 18MHz BLACK LINE: VS = +5V GRAY LINE: VS = ±5V 05527-007 9 6 3 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 –33 –36 –39 –42 –45 –48 05527-004 GAIN (dB) Unless otherwise noted, G = ×2, RL = 150 Ω, VO = 1.4 V p-p, VS = 5 V, TA = 25°C. 1 100 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 4. Frequency Response vs. Power Supply and Cutoff Frequency (G = ×2) Figure 7. Frequency Response vs. Power Supply and Cutoff Frequency (G = ×4) 12.5 6.5 FC = 36MHz 12.0 6.0 11.5 5.5 FC = 9MHz FC = 36MHz GAIN (dB) 5.0 FC = 18MHz 4.5 11.0 FC = 18MHz 10.5 BLACK LINE: VS = +5V GRAY LINE: VS = ±5V 10.0 4.0 BLACK LINE: VS = +5V GRAY LINE: VS = ±5V 3.0 1 10 05527-008 9.5 05527-005 3.5 9.0 100 1 10 FREQUENCY (MHz) Figure 8. Frequency Response Flatness vs. Power Supply and Cutoff Frequency (G = ×4) FC = 36MHz FC = 9MHz GAIN (dB) FC = 18MHz BLACK LINE: VOUT = 100mV p-p GRAY LINE: VOUT = 2V p-p 1 05527-006 GAIN (dB) Figure 5. Frequency Response Flatness vs. Power Supply and Cutoff Frequency (G = ×2) 9 6 3 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 –33 –36 –39 –42 –45 –48 10 100 FREQUENCY (MHz) 9 6 3 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 –33 –36 –39 –42 –45 –48 FC = 36MHz FC = 9MHz FC = 18MHz –40°C +25°C +85°C 1 100 05527-009 GAIN (dB) FC = 9MHz 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 6. Frequency Response vs. Cutoff Frequency and Output Amplitude Rev. 0 | Page 7 of 16 Figure 9. Frequency Response vs. Temperature and Cutoff Frequency ADA4411-3 100 BLACK LINE: VS = +5V GRAY LINE: VS = ±5V 90 3.5 2.5 OUTPUT 2 × INPUT 3.3 2.0 3.1 1.5 FC = 9MHz 50 FC = 18MHz 40 30 2.9 2.7 FC = 36MHz 10 1 10 0.5 ERROR 2.5 0 2.3 –0.5 2.1 –1.0 1.9 05527-010 20 1.0 0.5% (70ns) –2.0 50ns/DIV 1.5 FREQUENCY (MHz) –2.5 Figure 13. Settling Time Figure 10. Group Delay vs. Frequency, Power Supply, and Cutoff Frequency –40 FC = 36MHz –50 –60 FC = 9MHz –70 FC = 18MHz –80 –90 –100 –110 0.1 1 10 RSOURCE = 300Ω UNSELECTED MUX IS DRIVEN –50 –60 –70 FC = 9MHz –80 –90 –100 –110 0.1 100 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 11. Channel-to-Channel Crosstalk vs. Frequency and Cutoff Frequency Figure 14. MUX Isolation vs. Frequency and Cutoff Frequency 3.5 3.5 3.3 3.3 3.1 3.1 FC = 36MHz OUTPUT VOLTAGE (V) FC = 36MHz 2.9 2.7 FC = 18MHz FC = 9MHz 2.3 2.1 2.9 2.7 FC = 18MHz 2.5 FC = 9MHz 2.3 2.1 1.7 100ns/DIV 1.5 1.7 100ns/DIV 1.5 Figure 15. Transient Response vs. Cutoff Frequency (G = ×4) Figure 12. Transient Response vs. Cutoff Frequency (G = ×2) Rev. 0 | Page 8 of 16 05527-015 1.9 1.9 05527-014 OUTPUT VOLTAGE (V) FC = 18MHz FC = 36MHz 05527-012 –40 MUX ISOLATION REFERRED TO INPUT (dB) RSOURCE = 300Ω Y AND Pr SOURCE CHANNELS Pb RECEPTOR CHANNEL 05527-011 CROSSTALK REFERRED TO INPUT (dB) –30 2.5 –1.5 1% (58ns) 1.7 100 ERROR (%) 60 05527-013 70 OUTPUT VOLTAGE (V) GROUP DELAY (ns) 80 5 5 –5 –5 PSRR REFERRED TO INPUT (dB) FC = 9MHz –15 –25 FC = 18MHz –35 FC = 36MHz –45 –55 –75 0.1 1 10 –15 –25 FC = 9MHz –35 FC = 36MHz –45 –55 –65 05527-016 –65 FC = 18MHz –75 0.1 100 05527-017 PSRR REFERRED TO INPUT (dB) ADA4411-3 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 16. Positive Supply PSRR vs. Frequency and Cutoff Frequency Figure 18. Negative Supply PSRR vs. Frequency and Cutoff Frequency 6 FC = 36MHz 2× INPUT 4 FC = 18MHz 3 NETWORK ANALYZER Tx FC = 9MHz 2 RL = 150Ω 50Ω NETWORK ANALYZER Rx 118Ω DUT 50Ω 0 200ns/DIV –1 86.6Ω 50Ω MINIMUM-LOSS MATCHING NETWORK LOSS CALIBRATED OUT Figure 17. Overdrive Recovery vs. Cutoff Frequency Rev. 0 | Page 9 of 16 Figure 19. Basic Test Circuit for Swept Frequency Measurements 05527-051 1 05527-022 OUTPUT VOLTAGE (V) 5 ADA4411-3 THEORY OF OPERATION The ADA4411-3 is an integrated video filtering and driving solution that offers variable bandwidth to meet the needs of a number of different video resolutions. There are three filters, targeted for use with component video signals. The filters have selectable bandwidths that correspond to the popular component video standards. Each filter has a sixth-order Butterworth response that includes group delay optimization. The group delay variation from 1 MHz to 36 MHz in the 36 MHz section is 7 ns, which produces a fast settling pulse response. The ADA4411-3 is designed to operate in many video environments. The supply range is 5 V to 12 V, single supply or dual supply, and requires a relatively low nominal quiescent current of 15 mA per channel. In single-supply applications, the PSRR is greater than 60 dB, providing excellent rejection in systems with supplies that are noisy or under-regulated. In applications where power consumption is critical, the part can be powered down to draw typically 15 μA by pulling the DISABLE pin to the most positive rail. The ADA4411-3 is also well-suited for high encoding frequency applications because it maintains a stop-band attenuation of more than 40 dB to 400 MHz. The ADA4411-3 is intended to take dc-coupled inputs from an encoder or other ground referenced video signals. The ADA4411-3 input is high impedance. No minimum or maximum input termination is required, though input terminations above 1 kΩ can degrade crosstalk performance at high frequencies. No clamping is provided internally. For applications where dc restoration is required, dual supplies work best. Using a termination resistance of less than a few hundred ohms to ground on the inputs and suitably adjusting the level-shifting circuitry provides precise placement of the output voltage. For single-supply applications (VS− = GND), the input voltage range extends from 100 mV below ground to within 2.0 V of the most positive supply. Each filter section has a 2:1 input multiplexer that includes level-shifting circuitry. The levelshifting circuitry adds a dc component to ground-referenced input signals so that they can be reproduced accurately without the output buffers hitting the negative rail. Because the filters have negative rail input and rail-to-rail output, dc level shifting is generally not necessary, unless accuracy greater than that of the saturated output of the driver is required at the most negative edge. This varies with load but is typically 100 mV in a dc-coupled, single-supply application. If ac coupling is used, the saturated output level is higher because the drivers have to sink more current on the low side. If dual supplies are used (VS− < GND), no level shifting is required. In dual-supply applications, the level-shifting circuitry can be used to take a ground referenced signal and put the blanking level at ground while the sync level is below ground. The output drivers on the ADA4411-3 have rail-to-rail output capabilities. They provide either 6 dB or 12 dB of gain with respect to the ground pins. Gain is controlled by the external gain select pin. Each output is capable of driving two ac- or dccoupled 75 Ω source-terminated loads. If a large dc output level is required while driving two loads, ac coupling should be used to limit the power dissipation. Input MUX isolation is primarily a function of the source resistance driving into the ADA4411-3. Higher resistances result in lower isolation over frequency, while a low source resistance, such as 75 Ω, has the best isolation performance. See Figure 14 for the MUX isolation performance. Rev. 0 | Page 10 of 16 ADA4411-3 APPLICATIONS OVERVIEW CUTOFF FREQUENCY SELECTION With its high impedance multiplexed inputs and high output drive, the ADA4411-3 is ideally suited to video reconstruction and antialias filtering applications. The high impedance inputs give designers flexibility with regard to how the input signals are terminated. Devices with DAC current source outputs that feed the ADA4411-3 can be loaded in whatever resistance provides the best performance, and devices with voltage outputs can be optimally terminated as well. The ADA4411-3 outputs can each drive up to two source-terminated 75 Ω loads and can therefore directly drive the outputs from set-top boxes, DVD players, and the like without the need for a separate output buffer. Four combinations of cutoff frequencies are provided for the video signals. The cutoff frequencies have been selected to correspond with the most commonly deployed component video scanning systems. Selection between the cutoff frequency combinations is controlled by the logic signals applied to the F_SEL_A and F_SEL_B inputs. Table 7 summarizes cutoff frequency selection. Binary control inputs are provided to select cutoff frequency, throughput gain, and input signal. These inputs are compatible with 3 V and 5 V TTL and CMOS logic levels referenced to GND. The disable feature is asserted by pulling the DISABLE pin to the positive supply. The LEVEL1 and LEVEL2 inputs comprise a differential input that controls the dc level at the output pins. Table 7. Filter Cutoff Frequency Selection F_SEL_A 0 0 1 1 Pb/B Cutoff 36 MHz 18 MHz 18 MHz 9 MHz Pr/R Cutoff 36 MHz 18 MHz 18 MHz 9 MHz The LEVEL1 and LEVEL2 inputs work as a differential, inputreferred output offset control. In other words, the output offset voltage of a given channel is equal to the difference in voltage between the LEVEL1 and LEVEL2 inputs, multiplied by the overall filter gain. This relationship is expressed in Equation 1. VOS (OUT ) = (LEVEL1− LEVEL2)(G) Selection between the two multiplexer inputs is controlled by the logic signals applied to the MUX inputs. Table 6 summarizes the multiplexer operation. THROUGHPUT GAIN The throughput gain of the ADA4411-3 signal paths can be either × 2 or × 4. Gain selection is controlled by the logic signal applied to the G_SEL pin. Table 6 summarizes how the gain is selected. (1) LEVEL1 and LEVEL2 are the voltages applied to the respective inputs, and G is the throughput gain. For example, with the G_SEL input set for ×2 gain, setting LEVEL1 to 300 mV and LEVEL2 to 0 V shifts the offset voltages at the ADA4411-3 outputs to 600 mV. This particular setting can be used in most single-supply applications to keep the output swings safely above the negative supply rail. The maximum differential voltage that can be applied across the LEVEL1 and LEVEL2 inputs is ±500 mV. From a single-ended standpoint, the LEVEL1 and LEVEL2 inputs have the same range as the filter inputs. See the Specifications tables for the limits. The LEVEL1 and LEVEL2 inputs must each be bypassed to GND with a 0.1 μF ceramic capacitor. DISABLE The ADA4411-3 includes a disable feature that can be used to save power when a particular device is not in use. As indicated in the Overview section, the disable feature is asserted by pulling the DISABLE pin to the positive supply. Table 6 summarizes the disable feature operation. The DISABLE pin also functions as a reference level for the logic inputs and therefore must be connected to ground when the device is not disabled. In single-supply applications, a positive output offset must be applied to keep the negative-most excursions of the output signals above the specified minimum output swing limit. Table 6. Logic Pin Function Description MUX 1 = Channel 1 Selected 0 = Channel 2 Selected Y/G Cutoff 36 MHz 36 MHz 18 MHz 9 MHz OUTPUT DC OFFSET CONTROL MULTIPLEXER SELECT INPUTS DISABLE VS+ = Disabled GND = Enabled F_SEL_B 0 1 0 1 G_SEL 1 = ×2 Gain 0 = ×4 Gain Rev. 0 | Page 11 of 16 ADA4411-3 Figure 20 and Figure 21 illustrate several ways to use the LEVEL1 and LEVEL2 inputs. Figure 20 shows examples of how to generate fully adjustable LEVEL1 and LEVEL2 voltages from ±5 V and single +5 V supplies. These circuits show a general case, but a more practical approach is to fix one voltage and vary the other. Figure 21 illustrates an effective way to produce a 600 mV output offset voltage in a single-supply application. Although the LEVEL2 input could simply be connected to GND, Figure 21 includes bypassed resistive voltage dividers for each input so that the input levels can be changed, if necessary. Additionally, many in-circuit testers require that I/O signals not be tied directly to the supplies or GND. DNP indicates do not populate. DUAL SUPPLY +5V +5V 9.53kΩ 1kΩ LEVEL1 1kΩ 9.53kΩ LEVEL2 0.1μF 9.53kΩ –5V Inputs to the ADA4411-3 are normally dc-coupled. Ac coupling the inputs is not recommended; however, if ac coupling is necessary, suitable circuitry must be provided following the ac coupling element to provide proper dc level and bias currents at the ADA4411-3 input stages. The ADA4411-3 outputs can be either ac- or dc-coupled. When driving single ac-coupled loads in standard 75 Ω video distribution systems, 220 μF coupling capacitors are recommended for use on all but the chrominance signal output. Since the chrominance signal is a narrow-band modulated carrier, it has no low frequency content and can therefore be coupled with a 0.1 μF capacitor. There are two ac coupling options when driving two loads from one output. One simply uses the same value capacitor on the second load, while the other is to use a common coupling capacitor that is at least twice the value used for the single load (see Figure 22 and Figure 23). 9.53kΩ 0.1μF INPUT AND OUTPUT COUPLING –5V SINGLE SUPPLY 75Ω ADA4411-3 +5V 220μF 75Ω CABLE 220μF 75Ω CABLE +5V LEVEL1 1kΩ 0.1μF 75Ω LEVEL2 0.1μF 05527-018 1kΩ 9.09kΩ 75Ω Figure 20. Generating Fully Adjustable Output Offsets 05527-020 75Ω 9.09kΩ Figure 22. Driving Two AC-Coupled Loads with Two Coupling Capacitors +5V LEVEL1 634Ω ADA4411-3 DNP 0.1μF 75Ω LEVEL2 0Ω 75Ω CABLE 470μF DNP 75Ω 05527-019 10kΩ 75Ω Figure 21. Flexible Circuits to Set the LEVEL1 and LEVEL2 Inputs to Obtain a 600 mV Output Offset on a Single Supply 75Ω CABLE 75Ω 05527-021 +5V Figure 23. Driving Two AC-Coupled Loads with One Common Coupling Capacitor When driving two parallel 150 Ω loads (75 Ω effective load), the 3 dB bandwidth of the filters typically varies from that of the filters with a single 150 Ω load. For the 9 MHz and 18 MHz filters, the typical variation is within ±1.0%; for the 36 MHz filters, the typical variation is within ±2.5%. Rev. 0 | Page 12 of 16 ADA4411-3 PRINTED CIRCUIT BOARD LAYOUT As with all high speed applications, attention to printed circuit board layout is of paramount importance. Standard high speed layout practices should be adhered to when designing with the ADA4411-3. A solid ground plane is recommended, and surface-mount, ceramic power supply decoupling capacitors should be placed as close as possible to the supply pins. All of the ADA4411-3 GND pins should be connected to the ground plane with traces that are as short as possible. Controlled impedance traces of the shortest length possible should be used to connect to the signal I/O pins and should not pass over any voids in the ground plane. A 75 Ω impedance level is typically used in video applications. All signal outputs of the ADA4411-3 should include series termination resistors when driving transmission lines. When the ADA4411-3 receives its inputs from a device with current outputs, the required load resistor value for the output current is often different from the characteristic impedance of the signal traces. In this case, if the interconnections are sufficiently short (<< 0.1 wavelength), the trace does not have to be terminated in its characteristic impedance. Traces of 75 Ω can be used in this instance, provided their lengths are an inch or two at the most. This is easily achieved because the ADA4411-3 and the device feeding it are usually adjacent to each other, and connections can be made that are less than one inch in length. VIDEO ENCODER RECONSTRUCTION FILTER The ADA4411-3 is easily applied as a reconstruction filter at the DAC outputs of a video encoder. Figure 24 illustrates how to use the ADA4411-3 in this type of application with an ADV7322 video encoder in a single-supply application with ac-coupled outputs. Rev. 0 | Page 13 of 16 ADA4411-3 5V (ANALOG) 0.1μF 0.1μF DNP 10kΩ 22 16 VCC VCC 0Ω 634Ω 0.1μF 1 24 LEVEL1 LEVEL2 ADA4411-3 0.1μF 2 23 BINARY CONTROL INPUTS ADV7322 VIDEO ENCODER 15 8 9 3 RL VIDEO DAC OUTPUTS 10 5 RL 12 RL 14 7 DISABLE G_SEL MUX F_SEL_A F_SEL_B Y1/G1 Y/G_OUT 220μF 21 75Ω Y2/G2 Pb1/B1 Pb/B_OUT Pb2/B2 Pr1/R1 Pr/R_OUT 19 75Ω 220μF 220μF 17 75Ω Pr2/R2 GND 4, 6 DGND 11, 13 VEE 18, 20 05527-024 CHANNEL 2 VIDEO INPUTS Figure 24. The ADA4411-3 Applied as a Single-Supply Reconstruction Filter Following the ADV7322 Rev. 0 | Page 14 of 16 ADA4411-3 OUTLINE DIMENSIONS 0.341 BSC 24 13 0.154 BSC 1 0.236 BSC 12 PIN 1 0.065 0.049 0.010 0.004 0.025 BSC COPLANARITY 0.004 0.069 0.053 0.012 0.008 SEATING PLANE 0.010 0.006 8° 0° 0.050 0.016 COMPLIANT TO JEDEC STANDARDS MO-137AE Figure 25. 24-Lead Shrink Small Outline Package [QSOP] (RQ-24) Dimensions shown in inches ORDERING GUIDE Model ADA4411-3ARQZ 1 ADA4411-3ARQZ-R71 ADA4411-3ARQZ-RL1 1 Temperature Range –40°C to +85°C –40°C to +85°C –40°C to +85°C Package Description 24-Lead QSOP 24-Lead QSOP 24-Lead QSOP Z = Pb-free part. Rev. 0 | Page 15 of 16 Order Quantity 1 1,000 2,500 Package Option RQ-24 RQ-24 RQ-24 ADA4411-3 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05527–0–7/05(0) Rev. 0 | Page 16 of 16