ETC CS8311YD8

CS8311
Micropower 10 V, 100 mA
Low Dropout Linear
Regulator with RESET
and ENABLE
Features
10 V ±4.0% Output
Low 100 µA Quiescent Current
Active RESET
ENABLE Input for ON/OFF and Active/Sleep Mode Control
100 mA Output Current Capability
Fault Protection
– +60 V Peak Transient Voltage
– –15 V Reverse Voltage Short Circuit Thermal Overload
• Low Reverse Current (Output to Input)
•
•
•
•
•
•
 Semiconductor Components Industries, LLC, 2001
April, 2001 – Rev. 5
1
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SO–8
D SUFFIX
CASE 751
8
1
PIN CONNECTIONS AND
MARKING DIAGRAM
VOUT
VOUTSense
ENABLE
GND
A
WL, L
YY, Y
WW, W
1
8
8311
ALYWX
The CS8311 is a precision 10 V micropower voltage regulator with
very low quiescent current (100 µA typ at 100 µA load). The 10 V
output is accurate within ±4.0% and supplies 100 mA of load current
with a typical dropout voltage of only 400 mV. Microprocessor control
logic includes an ENABLE input and an active RESET.
The active RESET circuit includes hysteresis, and operates
correctly at an output voltage as low as 1.0 V. The RESET function is
activated during the power up sequence or during normal operation if
the output voltage drops outside the regulation limits by more than
1.0 V typ. The logic level compatible ENABLE input allows the user to
put the regulator into a shutdown mode where it draws only 20 µA
typical of quiescent current.
The regulator is protected against reverse battery, short circuit, over
voltage, and thermal overload conditions. The device can withstand
load dump transients making it suitable for use in automotive
environments.
VIN
NC
NC
RESET
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
Package
Shipping
CS8311YD8
SO–8
95 Units/Rail
CS8311YDR8
SO–8
2500 Tape & Reel
Publication Order Number:
CS8311/D
CS8311
VOUT
VIN
Current Source
(Circuit Bias)
Over Voltage
Shutdown
ENABLE
Current Limit
Sense
VOUTSense
+
–
Error
Amplifier
Thermal
Protection
Bandgap
Reference
RESET
+
–
Reset
Comparator
GND
Figure 1. Block Diagram
ABSOLUTE MAXIMUM RATINGS*
Rating
Value
Unit
VIN
38
V
Peak Transient Voltage (46 V Load Dump @ VIN = 14 V)
60
V
–0.3 to +10.4
V
2.0
kV
Junction Temperature Range
–40 to +150
°C
Storage Temperature Range
–55 to +150
°C
230 peak
°C
ENABLE, RESET
ESD Susceptibility (Human Body Model)
Lead Temperature Soldering:
Reflow (SMD styles only) (Note 1.)
1. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
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2
CS8311
ELECTRICAL CHARACTERISTICS (11 V ≤ VIN ≤ 26 V; IOUT = 1.0 mA; –40 ≤ TA ≤ 125, –40°C ≤ TJ ≤ 150°C;
unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Output Voltage, VOUT
11 V < VIN < 26 V, 100 µA ≤ IOUT ≤ 100 mA
9.60
10.00
10.40
V
Dropout Voltage (VIN – VOUT)
IOUT = 100 mA
IOUT = 100 µA
–
–
400
100
600
150
mV
mV
Load Regulation
VIN = 14 V, 100 µA ≤ IOUT ≤ 100 mA
–
5.0
100
mV
Line Regulation
11 V < V < 26 V, IOUT = 1.0 mA
–
5.0
100
mV
Quiescent Current, (IQ) Active Mode
IOUT = 100 µA
IOUT = 50 mA
IOUT = 100 mA
–
–
–
100
4.0
12
250
6.0
20
µA
mA
mA
Quiescent Current, (IQ) Sleep Mode
VOUT = OFF, VIN = 12 V, VENABLE = 2.0 V
–
20
50
µA
Ripple Rejection
14 ≤ VIN ≤ 26 V, IOUT = 100 mA, f = 120 Hz
60
75
–
dB
–
105
200
–
mA
Output Stage
Current Limit
Short Circuit Output Current
VOUT = 0 V
25
125
–
mA
Overvoltage Shutdown
VOUT ≤ 1.0 V
30
34
38
V
Reverse Current
VOUT = 5.0 V, VIN = 0 V
–
100
250
µA
Threshold High
(VOUT OFF)
–
1.4
2.0
V
Threshold Low
(VOUT ON)
0.6
1.4
–
V
Input Current
VENABLE = 2.4 V
–
30
100
µA
RESET Threshold High (VRH)
VOUT Increasing
8.50
9.00
VOUT – 0.50
V
RESET Threshold Low (VRL)
VOUT Decreasing
8.30
8.90
VOUT – 0.45
V
RESET Hysteresis
(High – Low)
50
100
200
mV
Reset Output Leakage
RESET = High
VOUT ≥ VRH
–
–
25
µA
Output Voltage Low (VRLO)
RRESET = 10 k, 1.0 V ≤ VOUT ≤ VRL
–
0.1
0.4
V
Output Voltage Low (VRPEAK)
RRESET = 10 k, VOUT,
Power up, Power down
–
0.6
1.0
V
ENABLE Input (ENABLE)
Reset Function (RESET)
PACKAGE LEAD DESCRIPTION
PACKAGE LEAD #
SO–8
LEAD SYMBOL
1
VOUT
2
VOUTSense
3
ENABLE
4
GND
5
RESET
6, 7
NC
No connection.
8
VIN
Input voltage.
FUNCTION
10 V, ±4.0%, 100 mA output.
Kelvin connection which allows remote sensing of output voltage for improved
regulation. If remote sensing is not required, connect to VOUT.
Logic level switches output off when toggled HIGH.
Ground. All GND leads must be connected to Ground.
Active reset (accurate to VOUT ≥ 1.0 V).
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3
CS8311
CIRCUIT DESCRIPTION
VOLTAGE REFERENCE AND OUTPUT CIRCUITRY
ENABLE Function
The ENABLE function switches the output transistor ON
and OFF. When the voltage on the ENABLE lead exceeds
1.4 V typ, the output pass transistor turns off, leaving a high
impedance facing the load. The IC will remain in Sleep
mode, drawing only 50 µA (max), until the voltage on this
input drops below the ENABLE threshold.
Output Stage Protection
The output stage is protected against overvoltage, short
circuit and thermal runaway conditions (Figure 2).
> 30 V
VIN
RESET Function
A RESET signal (low voltage) is generated as the IC
powers up until VOUT is within 1.0 V of the regulated output
voltage, or when VOUT drops out of regulation, and is lower
than 1.1 V below the regulated output voltage. A hysteresis
of 50 mV is included in the function to minimize
oscillations.
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET signal is valid for VOUT as low
as 1.0 V.
VOUT
IOUT
Load
Dump
Current
Limit
Short
Circuit
Figure 2. Typical Circuit Waveforms for Output
Stage Protection
If the input voltage rises above 30 V (e.g. load dump), the
output shuts down. This response protects the internal
circuitry and enables the IC to survive unexpected voltage
transients.
Should the junction temperature of the power device
exceed 180°C (typ) the load current capability is reduced
thereby preventing thermal overload. This thermal
management function is an effective means to prevent die
overheating since the load current is the principle heat
source in the IC.
CS8311
Figure 4. RC Network for RESET Delay
An external RC network on the lead (Figure 4) provides
a sufficiently long delay for most microprocessor based
applications. RC values can be chosen using the following
formula:
For 11 V < VIN < 26 V
RTOTCRST VIN
ENABLE
RESET
–tDelay
V V
lnV T VOUT RST
OUT
where:
RRST = RESET Delay resistor
RIN = µP port impedance
RTOT = RRST in parallel with RIN
CRST = RESET Delay capacitor
tDelay = desired delay time
VRST = VSAT of RESET lead (0.7 V @ turn – ON)
VT = RESET threshold.
VIN(H)
VRH ON
VRL OFF
(1)
(2)
to µP
RESET
Port
CRST
The CS8311 contains two microprocessor compatible
control functions: ENABLE and RESET (Figure 3).
VRPEAK
COUT
RRST
RESET
REGULATOR CONTROL FUNCTIONS
VOUT
5.0 V to µP
and System
Power
VOUT
VRPEAK
VRLO
(1) = No Reset Delay Capacitor
(2) = With Reset Delay Capacitor
Figure 3. Circuit Waveform
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4
CS8311
APPLICATION NOTES
10 V, 100 mA
VIN
VBAT
VOUT
To Load
0.1 µF
CS8311
500 kΩ
ENABLE
COUT
RRST
To µP
RESET
GND
CRST
To µP
I/O
Q1
100 kΩ
500 kΩ
100 kΩ
SWITCH
Figure 5. Microprocessor Control of CS8311 Using External Switching Transistor Q1
STABILITY CONSIDERATIONS
The circuit depicted in Figure 5 lets the system control its
power source, the CS8311 regulator. A SWITCH
(potentially an I/O port on microprocessor) is used to drive
the base of Q1. When Q1 is driven into saturation, the
voltage on the ENABLE lead falls below its lower
threshold. The regulator’s output is enabled. When the drive
current is removed, the voltage on the ENABLE lead rises,
the output is switched off and the IC moves into Sleep mode
where it draws 50 µA (max).
By coupling these two controls with the ENABLE lead,
the system has added flexibility. Once the system is running,
the state of the SWITCH is irrelevant as long as the I/O port
continues to drive Q1. The microprocessor can turn off its
own power by withdrawing drive current, once the
SWITCH is open. This software control at the I/O port
allows the microprocessor to finish key housekeeping
functions before power is removed.
The logic options are summarized in Table 1.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start–up
delay, load transient response and loop stability.
VIN
Switch
ENABLE
Output
ON
Closed
LOW
ON
Open
LOW
ON
OFF
Closed
LOW
ON
Open
HIGH
OFF
CS8311
RRST
COUT**
10 µF
RESET
ENABLE
*CIN required if regulator is located far from the power supply filter.
*COUT required for stability. Capacitor must operate at
minimum temperature expected.
Figure 6. Test and Application Circuit Showing
Output Compensation
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum or
aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures (–25°C to –40°C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers data sheet usually provides this information.
The value for the output capacitor COUT shown in Figure
6 should work for most applications, however it is not
necessarily the optimized solution.
Table 1. Logic Control of CS8311 Output
Microprocessor
I/O Drive
VOUT
CIN*
0.1 µF
The I/O port of the microprocessor typically provides
50 µA to Q1. In automotive applications the SWITCH is
connected to the ignition switch.
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5
CS8311
To determine an acceptable value for COUT for a particular
application, start with a tantalum capacitor of the
recommended value and work towards a less expensive
alternative part.
Step 1: Place the completed circuit with a tantalum
capacitor of the recommended value in an environmental
chamber at the lowest specified operating temperature and
monitor the outputs with an oscilloscope. A decade box
connected in series with the capacitor will simulate the
higher ESR of an aluminum capacitor. Leave the decade box
outside the chamber, the small resistance added by the
longer leads is negligible.
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load while
observing the output for any oscillations. If no oscillations
are observed, the capacitor is large enough to ensure a stable
design under steady state conditions.
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that cause
the greatest oscillation. This represents the worst case load
conditions for the regulator at low temperature.
Step 4: Maintain the worst case load conditions set in
step 3 and vary the input voltage until the oscillations
increase. This point represents the worst case input voltage
conditions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capacitor
will usually cost less and occupy less board space. If the
output oscillates within the range of expected operating
conditions, repeat steps 3 and 4 with the next larger standard
capacitor value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7: Raise the temperature to the highest specified
operating temperature. Vary the load current as instructed in
step 5 to test for any oscillations.
where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current for the
application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum
permissible value of RΘJA can be calculated:
RJA (2)
The value of RΘJA can then be compared with those in the
package section of the data sheet. Those packages with
RΘJA’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
IIN
VIN
IOUT
SMART
REGULATOR
VOUT
Control
Features
IQ
Figure 7. Single Output Regulator With Key
Performance Parameters Labeled
HEAT SINKS
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RΘJA.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for the
tolerance of the capacitor and any variations in regulator
performance. Most good quality aluminum electrolytic
capacitors have a tolerance of ± 20% so the minimum value
found should be increased by at least 50% to allow for this
tolerance plus the variation which will occur at low
temperatures. The ESR of the capacitor should be less than
50% of the maximum allowable ESR found in step 3 above.
RJA RJC RCS RSA
(3)
where:
RΘJC = the junction–to–case thermal resistance,
RΘCS = the case–to–heatsink thermal resistance, and
RΘSA = the heatsink–to–ambient thermal resistance.
RΘJC appears in the package section of the data sheet. Like
RΘJA, it too is a function of package type. RΘCS and RΘSA
are functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
CALCULATING POWER DISSIPATION IN A SINGLE
OUTPUT LINEAR REGULATOR
The maximum power dissipation for a single output
regulator (Figure 7) is:
PD(max) VIN(max) VOUT(min)IOUT(max) VIN(max)IQ
150°C TA
PD
(1)
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6
CS8311
PACKAGE DIMENSIONS
SO–8
D SUFFIX
CASE 751–07
ISSUE W
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
–X–
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
–Y–
G
C
N
X 45 SEATING
PLANE
–Z–
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
S
PACKAGE THERMAL DATA
Parameter
SO–8
Unit
RΘJC
Typical
45
°C/W
RΘJA
Typical
165
°C/W
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7
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
CS8311
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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8
CS8311/D