ETC CS8371/D

CS8371
8.0 V/1.0 A, 5.0 V/250 mA
Dual Regulator
with Independent Output
Enables and NOCAP
The CS8371 is an 8.0 V/5.0 V dual output linear regulator. The 8.0
V ±5.0% output sources 1.0 A, while the 5.0 V ±5.0% output sources
250 mA. Each output is controlled by its own ENABLE lead. Setting
the ENABLE input high turns on the associated regulator output.
Holding both ENABLE inputs low puts the IC into sleep mode where
current consumption is less than 10 µA.
The regulator is protected against overvoltage, short–circuit and
thermal runaway conditions. The device can withstand 45 V load dump
transients making suitable for use in automotive environments. ON’s
proprietary NOCAP solution is the first technology which allows the
output to be stable without the use of an external capacitor.
The CS8371 is available in a 7 lead TO–220 package with copper
tab. The tab can be connected to a heatsink if necessary.
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TO–220
SEVEN LEAD
T SUFFIX
CASE 821E
1
7
TO–220
SEVEN LEAD
TVA SUFFIX
CASE 821J
1
TO–220
SEVEN LEAD
THA SUFFIX
CASE 821H
Features
• Two Regulated Outputs
– 8.0 V ±5.0%; 1.0 A
– 5.0 V ±5.0%; 250 mA
• Independent ENABLE for Each Output
• Seperate Sense Feedback Lead for 8.0 V Output
• < 10 µA Sleep Mode Current
• Fault Protection
– Overvoltage Shutdown
– +45 V Peak Transient Voltage
– Short Circuit
– Thermal Shutdown
• CMOS Compatible, Low Current ENABLE Inputs
1
7
PIN CONNECTIONS AND
MARKING DIAGRAM
CS8371
AWLYWW
Tab = GND
Pin 1. ENABLE1
2. ENABLE2
3. VOUT2
4. GND
5. Sense
6. VCC
7. VOUT1
1
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
Package
Shipping
CS8371ET7
TO–220*
STRAIGHT
50 Units/Rail
CS8371ETVA7
TO–220*
VERTICAL
50 Units/Rail
CS8371ETHA7
TO–220*
HORIZONTAL
50 Units/Rail
*Seven lead.
 Semiconductor Components Industries, LLC, 2001
January, 2001 – Rev. 8
1
Publication Order Number:
CS8371/D
CS8371
VCC
Overvoltage
Shutdown
ENABLE1
VOUT1
–
+
1.2 V
Current Limit
Pre–Regulator
Bias Generator
+
–
Sense
NOCAP
Trimmed Bandgap
Voltage Reference
Thermal
Shutdown
ENABLE2
–
+
1.2 V
–
+
VOUT2
Current Limit
GND
Figure 1. Block Diagram
ABSOLUTE MAXIMUM RATINGS*
Rating
Value
Unit
Internally Limited
–
ENABLE Input Voltage Range
–0.6 to +10
V
Load Current (8.0 V Regulator)
Internally Limited
–
Load Current (5.0 V Regulator)
Internally Limited
–
45
V
Storage Temperature Range
–65 to +150
°C
Junction Temperature Range
–40 to +150
°C
260 peak
°C
Power Dissipation
Transient Peak Voltage (31 V Load Dump @ 14 V VCC)
Lead Temperature Soldering:
Wave Solder (through hole styles only) (Note 1.)
1. 10 second maximum.
*The maximum package power dissipation must be observed.
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2
CS8371
ELECTRICAL CHARACTERISTICS: (–40°C ≤ TA ≤ +85°C, 10.5 V ≤ VCC ≤ 16 V, ENABLE1 = ENABLE2 = 5.0 V,
IOUT1 = IOUT2 = 5.0 mA, unless otherwise stated.)
Test Conditions
Characteristic
Min
Typ
Max
Unit
7.60
8.00
8.40
V
Primary Output (VOUT1)
Output Voltage
IOUT1 = 1.0 A
Line Regulation
10.5 V ≤ VCC ≤ 26 V
–
–
50
mV
Load Regulation
5.0 mA ≤ IOUT1 ≤ 1.0 A
–
–
150
mV
Sleep Mode Quiescent Current
VCC = 14 V, ENABLE1 = ENABLE2 = 0 V
0
0.2
10.0
µA
Quiescent Current
VCC = 14 V, IOUT1 = 1.0 A, IOUT2 = 250 mA
–
–
30
mA
Dropout Voltage
IOUT1 = 250 mA
IOUT1 = 1.0 A
–
–
–
1.2
1.5
V
V
Quiescent Bias Current
IOUT1 = 5.0 mA, ENABLE2 = 0 V, VCC = 14 V,
IQ = ICC – IOUT1
IOUT1 = 1.0 A, ENABLE2 = 0 V, VCC = 14 V,
IQ = ICC – IOUT1
–
–
10
mA
–
–
22
mA
Ripple Rejection
f = 120 Hz, VCC = 14 V with 1.0 VPP AC, COUT = 0 µF
f = 10 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 µF
f = 20 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 µF
–
–
–
90
74
68
–
–
–
dB
dB
dB
Current Limit
VCC = 16 V
1.1
–
2.5
A
Overshoot Voltage
5.0 mA ≤ IREG1 ≤ 1.0 A
–
–
6.0
V
Output Noise
10 Hz – 100 kHz
–
300
–
µVrms
Output Voltage
IOUT2 = 250 mA
4.75
5.00
5.25
V
Line Regulation
7.0 V ≤ VCC ≤ 26 V
–
–
40
mV
Load Regulation
5.0 mA ≤ IOUT2 ≤ 250 mA
–
–
100
mV
Dropout Voltage
IOUT2 = 5.0 mA
IOUT2 = 250 mA
–
–
–
2.2
2.5
V
V
Quiescent Bias Current
IOUT2 = 5.0 mA, ENABLE1 = 0 V, VCC = 14 V,
IQ = ICC – IOUT2
IOUT2 = 250 mA, ENABLE1 = 0 V, VCC = 14 V,
IQ = ICC – IOUT2
–
–
7.0
mA
–
–
8.0
mA
Ripple Rejection
f = 120 Hz, VCC = 14 V with 1.0 VPP AC, COUT = 0 µF
f = 10 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 µF
f = 20 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 µF
–
–
–
90
75
67
–
–
–
dB
dB
dB
Current Limit
VCC = 16 V
270
–
600
mA
Overshoot Voltage
5.0 mA ≤ IREG2 ≤ 250 mA
–
–
4.3
V
Output Noise
10 Hz – 100 kHz
–
170
–
µVrms
–150
–
150
µA
Secondary Output (VOUT2)
ENABLE Function (ENABLE)
Input Current
VCC = 14 V, 0 V ≤ ENABLE ≤ 5.5 V
Input Voltage
Low
High
0
2.0
–
–
0.8
5.0
V
V
Human Body Model
±2.0
±4.0
–
kV
24
–
30
V
150
180
–
°C
–
30
–
°C
Protection Circuitry
ESD Threshold
Overvoltage Shutdown
Thermal Shutdown
Thermal Hysteresis
–
Guaranteed by Design
–
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3
CS8371
PACKAGE PIN DESCRIPTION
PACKAGE LEAD #
7 Lead TO–220
LEAD SYMBOL
1
ENABLE1
ENABLE control for the 8.0 V, 1.0 A output.
2
ENABLE2
ENABLE control for the 5.0 V, 250 mA output.
3
VOUT2
4
GND
5
Sense
6
VCC
Supply voltage, usually from battery.
7
VOUT1
8.0 V ±5.0%, 1.0 A regulated output.
FUNCTION
5.0 V ±5.0%, 250 mA regulated output.
Ground.
Sense feedback for the primary 8.0 V output.
TYPICAL PERFORMANCE CHARACTERISTICS
8.05
8.04
5.00
VIN = 14 V
IOUT = 1.0 A
Output Voltage (V)
Output Voltage (V)
8.03
8.02
8.01
8.00
7.99
7.98
4.95
VIN = 14 V
IOUT = 250 A
4.90
7.97
7.96
7.95
4.85
–40 –20
0
20
40
60
80
100
120
140
–40 –20
0
20
40
60
80
100 120
Ambient Temperature (°C)
Ambient Temperature (°C)
Figure 2. Regulator 1 Output Voltage
Figure 3. Regulator 2 Output Voltage
2.0
140
2.5
1.8
2.0
Dropout Voltage (V)
Dropout Voltage (V)
1.6
1.4
1.2
–40°C
1.0
85°C
0.8
0.6
25°C
–40°C
1.5
85°C
25°C
1.0
0.5
0.4
0.2
0
0
0
100 200 300 400 500 600
0
700 800 900 1000
50
100
150
200
Output Current (mA)
Output Current (mA)
Figure 4. Regulator 1 Dropout Voltage
Figure 5. Regulator 2 Dropout Voltage
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4
250
CS8371
10
10
VIN = 14 V
TA = 25°C
8
7
6
5
4
3
2
0
7
6
5
4
3
2
0
0
1
2
3
0
300
400
Figure 6. Regulator 1 Current Limit
Figure 7. Regulator 2 Current Limit
500
1.0
Enable 1 = 5.0 V
Enable 2 = 5.0 V
VIN = 14 V
IOUT1 = 1.0 A
IOUT2 = 250 mA
7.5
0.9
Quiescent Current (µA)
8.0
7.0
6.5
6.0
5.5
5.0
0.8
Enable 1 = 0 V
Enable 2 = 0 V
VIN = 14 V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
4.5
0
4.0
–20
0
20
40
60
80
–40
–20
0
20
40
60
Ambient Temperature (°C)
Ambient Temperature (°C)
Figure 8. Quiescent Current
Figure 9. Quiescent Current
80
4.0
6.0
Enable 1 = 5.0 V
Enable 2 = 0 V
VIN = 14 V
Enable 1 = 0 V
Enable 2 = 5.0 V
VIN = 14 V
3.8
Quiescent Current (mA)
5.5
200
Reg 2 Output Current (mA)
8.5
–40
100
Reg 1 Output Current (A)
9.0
Quiescent Current (mA0
8
1
1
Quiescent Current (mA)
VIN = 14 V
TA = 25°C
9
Reg 2 Output Voltage (V)
Reg 1 Output Voltage (V)
9
5.0
4.5
IOUT = 5.0 mA
IOUT = 1.0 A
4.0
3.5
3.6
3.4
3.2
IOUT = 250 mA
IOUT = 5.0 mA
3.0
2.8
2.6
2.4
2.2
3.0
–40
–20
0
20
40
60
2.0
80
–40
–20
0
20
40
60
80
Ambient Temperature (°C)
Ambient Temperature (°C)
Figure 10. Regulator 1 Quiescent Current
Figure 11. Regulator 2 Quiescent Current
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CS8371
8.020
5.02
VIN = 14 V
8.015
5.01
8.010
5.00
8.005
Output Voltage (V)
Output Voltage (V)
VIN = 14 V
–40°C
85°C
8.000
25°C
7.995
4.97
7.985
4.95
0
200
250
1
2
3
4
5
6
7
8
9
10
11
Reg 2 Output Voltage
(V)
Figure 13. Regulator 2 Load Regulation
8
7
6
5
4
3
2
1
0
5
4
3
2
1
0
12
COUT = 0 µF
TA = 25°C
IOUT = 5.0 mA
0
1
2
3
4
5
6
7
8
9
10
Time (µs)
Time (µs)
Figure 14. Regulator 1 Startup
Figure 15. Regulator 2 Startup
16
14
12
10
0
150
Figure 12. Regulator 1 Load Regulation
COUT = 0 µF
TA = 25°C
2
1
0
–1
–2
100
Output Current (mA)
COUT = 0 µF
TA = 25°C
IOUT = 5.0 mA
0
50
Output Current (mA)
Enable 2 (V)
Enable 1 (V)
5
4
3
2
1
0
–40°C
4.94
100 200 300 400 500 600 700 800 900 1000
Input Voltage (V) Output Voltage Deviation (V)
Reg 1 Output Voltage
(V)
8
7
6
5
4
3
2
1
0
85°C
4.98
4.96
0
Input Voltage (V) Output Voltage Deviation (V)
4.99
7.990
7.980
25°C
100
200
300
400
500
600
11
COUT = 0 µF
TA = 25°C
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
16
14
12
10
0
100
200
300
400
500
Time (ns)
Time (ns)
Figure 16. Regulator 1 Line Transient
Response
Figure 17. Regulator 2 Line Transient
Response
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6
12
600
VIN = 14 V
COUT = 0 µF
TA = 25°C
3
2
1
0
–1
–2
–3
1000
5
0
5
10
15
20
25
30
VIN = 14 V
COUT = 0 µF
TA = 25°C
+500
0
–500
250
5
0
5
10
15
20
25
Time (µs)
Time (µs)
Figure 18. Regulator 1 Load Transient
Response
Figure 19. Regulator 2 Load Transient
Response
TA = 25°C
VIN = 14 V
COUT = 0 µF
80
60
30
TA = 25°C
VIN = 14 V
COUT = 0 µF
100
Ripple Rejection (dB)
100
80
60
40
40
20
20
1
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
Figure 20. Regulator 1 Ripple Rejection
Figure 21. Regulator 2 Ripple Rejection
5
Output Capacitor ESR (Ω)
Ripple Rejection (dB)
Load Current (mA) Output Voltage Deviation (mV)
Load Current (mA) Output Voltage Deviation (V)
CS8371
TA = 25°C
VIN = 14 V
RESR ≤ 1.6 Ω
IOUT = 5.0 mA to 1.0 A
1
Unstable
Region
0
.01
0.1
1
10
100
1000
Output Capacitor Size (µF)
Figure 22. Regulator 1 Stability
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7
1M
CS8371
DEFINITION OF TERMS
Load Regulation – The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability – Output voltage stability under
accelerated life–test conditions after 1000 hours with
maximum rated voltage and junction temperature.
Output Noise Voltage – The rms AC voltage at the
output, with constant load and no input ripple, measured
over a specified frequency range.
Quiescent Current – The part of the positive input
current that does not contribute to the positive load current.
The regulator ground lead current.
Ripple Rejection – The ratio of the peak–to–peak input
ripple voltage to the peak–to–peak output ripple voltage.
Temperature Stability of VOUT – The percentage
change in output voltage for a thermal variation from room
temperature to either temperature extreme.
Dropout Voltage – The input–output voltage differential
at which the circuit ceases to regulate against further
reduction in input voltage. Measured when the output
voltage has dropped 100 mV from the nominal value
obtained at 14 V input, dropout voltage is dependent upon
load current and junction temperature.
Current Limit – Peak current that can be delivered to the
output.
Input Voltage – The DC voltage applied to the input
terminals with respect to ground.
Input Output Differential – The voltage difference
between the unregulated input voltage and the regulated
output voltage for which the regulator will operate.
Line Regulation – The change in output voltage for a
change in the input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such that the average chip temperature is not significantly
affected.
C1 *
0.1 µF
VOUT1
8.0 V
CS8371
Control
VIN
ENABLE1
5.0 V
ENABLE2
VOUT2
Tuner IC
GND
* C1 is required if the regulator is far from the power source filter.
Figure 23. Applications Circuit
APPLICATION NOTES
load capacitor value, ESR (Equivalent Series Resistance)
and board layout parasitics all can create oscillations if not
properly accounted for.
NOCAP is an ON Semiconductor exclusive output stage
which internally compensates the LDO regulator over
temperature, load and line variations without the need for
an expensive external capacitor. It incorporates high gain
(>80 dB) and large unity gain bandwidth (>100 kHz) while
maintaining many of the characteristics of a single–pole
amplifier (large phase margin and no overshoot).
NOCAP is ideally suited for slow switching or steady
loads. If the load displays large transient current
requirements, such as with high frequency microprocessors,
an output storage capacitor may be needed. Some large
capacitor and small capacitor ESR values at the output may
With seperate control of each output channel, the CS8371
is ideal for applications where each load must be switched
independently. In an automotive radio, the 8.0 V output
drives the displays and tape drive motors while the 5.0 V
output supplies the Tuner IC and memory.
Stability Considerations/NOCAP
Normally a low dropout or quasi–low dropout regulator
(or any type requiring a slow lateral PNP in the control loop)
necessitates a large external compensation capacitor at the
output of the IC. The external capacitor is also used to curtail
overshoot, determine startup delay time and load transient
response.
Traditional LDO regulators typically have low unity gain
bandwidth, display overshoot and poor ripple rejection.
Compensation is also an issue because the high frequency
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8
CS8371
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
cause small signal oscillations at the output. This will
depend on the load conditions. With these types of loads, a
traditional output stage may be better suited for proper
operation.
Output 1 employs NOCAP. Refer to the plots in the
Typical Performance Characteristics section for
appropriate output capacitor selections for stability if an
external capacitor is required by the switching
characteristics of the load. Output 2 has a Darlington
NPN–type output structure and is inherently stable with any
type of capacitive load or no capacitor at all.
IIN
SMART
REGULATOR
VIN
Control
Features
Calculating Power Dissipation in a
Dual Output Linear Regulator
IOUT1
VOUT1
IOUT2
VOUT2
IQ
The maximum power dissipation for a dual output
regulator (Figure 24) is
Figure 24. Dual Output Regulator With Key
Performance Parameters Labeled.
PD(max) VIN(max) VOUT1(min)IOUT1(max) VIN(max) VOUT2(min)IOUT2(max) VIN(max)IQ (1)
Heat Sinks
where:
VIN(max) is the maximum input voltage,
VOUT1(min) is the minimum output voltage from VOUT1,
VOUT2(min) is the minimum output voltage from VOUT2,
IOUT1(max) is the maximum output current, for the
application,
IOUT2(max) is the maximum output current, for the
application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RΘJA:
RJA RJC RCS RSA
Once the value of PD(max) is known, the maximum
permissible value of RΘJA can be calculated:
RJA 150°C TA
PD
(3)
where:
RΘJC = the junction–to–case thermal resistance,
RΘCS = the case–to–heatsink thermal resistance, and
RΘSA = the heatsink–to–ambient thermal resistance.
RΘJC appears in the package section of the data sheet. Like
RΘJA, it too is a function of package type. RΘCS and RΘSA
are functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
(2)
The value of RΘJA can be compared with those in the
package section of the data sheet. Those packages with
RΘJA’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
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CS8371
PACKAGE DIMENSIONS
TO–220
SEVEN LEAD
T SUFFIX
CASE 821E–04
ISSUE C
Q
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.003 (0.076) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
A
G
B
D
L
DIM
A
B
C
D
G
H
J
K
L
M
Q
U
V
U
K
OPTIONAL
CHAMFER
M
M
SEATING
PLANE
C
H
M
V
INCHES
MIN
MAX
0.600
0.610
0.386
0.403
0.170
0.180
0.028
0.037
0.045
0.055
0.088
0.102
0.018
0.026
1.028
1.042
0.355
0.365
5 NOM
0.142
0.148
0.490
0.501
0.045
0.055
MILLIMETERS
MIN
MAX
15.24
15.49
9.80
10.23
4.32
4.56
0.71
0.94
1.15
1.39
2.24
2.59
0.46
0.66
26.11
26.47
9.02
9.27
5 NOM
3.61
3.75
12.45
12.72
1.15
1.39
M
J
TO–220
SEVEN LEAD
TVA SUFFIX
CASE 821J–02
ISSUE A
–T–
C
B
–Q–
E
W
A
U
H F
L
K
M
D
0.356 (0.014)
M
N
S
7 PL
T Q
M
G
R
J
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10
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION D DOES NOT INCLUDE
INTERCONNECT BAR (DAMBAR) PROTRUSION.
DIMENSION D INCLUDING PROTRUSION SHALL
NOT EXCEED 10.92 (0.043) MAXIMUM.
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
Q
R
S
U
W
INCHES
MIN
MAX
0.560
0.590
0.385
0.415
0.160
0.190
0.023
0.037
0.045
0.055
0.540
0.555
0.050 BSC
0.570
0.595
0.014
0.022
0.785
0.800
0.322
0.337
0.073
0.088
0.090
0.115
0.146
0.156
0.289
0.304
0.164
0.179
0.460
0.475
3°
MILLIMETERS
MIN
MAX
14.22
14.99
9.77
10.54
4.06
4.82
0.58
0.94
1.14
1.40
13.72
14.10
1.27 BSC
14.48
15.11
0.36
0.56
19.94
20.32
8.18
8.56
1.85
2.24
2.28
2.91
3.70
3.95
7.34
7.72
4.17
4.55
11.68
12.07
3°
CS8371
TO–220
SEVEN LEAD
THA SUFFIX
CASE 821H–02
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION D DOES NOT INCLUDE
INTERCONNECT BAR (DAMBAR) PROTRUSION.
DIMENSION D INCLUDING PROTRUSION SHALL
NOT EXCEED 10.92 (0.043) MAXIMUM.
1. LEADS MAINTAIN A RIGHT ANGLE WITH
RESPECT TO THE PACKAGE BODY TO WITH
0.020".
–T–
C
B
–Q–
E
W
A
U
F
L
K
M
D
0.356 (0.014)
M
J
7 PL
T Q
M
N
G
DIM
A
B
C
D
E
F
G
J
K
L
M
N
Q
S
U
W
INCHES
MIN
MAX
0.560
0.590
0.385
0.415
0.160
0.190
0.023
0.037
0.045
0.055
0.568
0.583
0.050 BSC
0.015
0.022
0.728
0.743
0.322
0.337
0.101
0.116
0.090
0.115
0.146
0.156
0.150
0.200
0.460
0.475
3°
S
PACKAGE THERMAL DATA
Parameter
TO–220
SEVEN LEAD
Unit
RΘJC
Typical
2.4
°C/W
RΘJA
Typical
50
°C/W
http://onsemi.com
11
MILLIMETERS
MIN
MAX
14.22
14.99
9.77
10.54
4.06
4.82
0.58
0.94
1.14
1.40
14.43
14.81
1.27 BSC
0.38
0.56
18.49
18.87
8.18
8.56
2.57
2.95
2.28
2.91
3.70
3.95
3.81
5.08
11.68
12.07
3°
CS8371
NOCAP is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without
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CS8371/D