ETC IR2108S

Data Sheet No. PD60161-O
IR2108(4) (S)
HALF-BRIDGE DRIVER
Features
• Floating channel designed for bootstrap operation
•
•
•
•
•
•
•
•
•
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
3.3V, 5V and 15V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
High side output in phase with HIN input
Low side output out of phase with LIN input
Logic and power ground +/- 5V offset.
Internal 540ns dead-time, and
programmable up to 5us with one
external RDT resistor (IR21084)
Part
Lower di/dt gate driver for better
noise immunity
2106
14-Lead SOIC
IR21084S
8-Lead SOIC
IR2108S
14-Lead PDIP
IR21084
8-Lead PDIP
IR2108
2106//2108//2109/2304 Feature Comparison
21064
2108
21084
2109
21094
Description
Packages
Input
logic
Crossconduction
prevention
logic
Dead-Time
HIN/LIN
no
none
HIN/LIN
yes
Internal 540ns
Programmable 0.54~5 µs
Ground Pins
COM
VSS/COM
COM
VSS/COM
COM
VSS/COM
Ton/Toff
220/200
220/200
The IR2108(4)(S) are high voltage, high
Internal 540ns
IN/SD
yes
750/200
speed power MOSFET and IGBT drivers with
Programmable 0.54~5 µs
yes
160/140
HIN/LIN
Internal
100ns
dependent high and low side referenced
2304
COM
output channels. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with
standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Typical Connection
up to 600V
VCC
VCC
VB
HIN
HIN
HO
LIN
LIN
VS
COM
LO
TO
LOAD
up to 600V
HO
IR2108
(Refer to Lead Assignments for correct pin
configuration). This/These diagram(s) show
electrical connections only. Please refer to our
Application Notes and DesignTips for proper
circuit board layout.
www.irf.com
VCC
V CC
VB
HIN
HIN
VS
LIN
LIN
IR21084
TO
LOAD
DT
V SS
RDT
V SS
COM
LO
1
IR2108(4) (S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
VB
High side floating absolute voltage
VS
Min.
Max.
-0.3
625
Units
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VCC
Low side and logic fixed supply voltage
-0.3
25
VLO
Low side output voltage
-0.3
VCC + 0.3
DT
Programmable dead-time pin voltage (IR21084 only)
VSS - 0.3
VCC + 0.3
VIN
Logic input voltage (HIN & LIN )
VSS - 0.3
VCC + 0.3
Logic ground (IR21084 only)
VCC - 25
VCC + 0.3
VSS
dVS/dt
PD
RthJA
Allowable offset supply voltage transient
Package power dissipation @ TA ≤ +25°C
Thermal resistance, junction to ambient
—
50
(8 lead PDIP)
—
1.0
(8 lead SOIC)
—
0.625
(14 lead PDIP)
—
1.6
(14 lead SOIC)
—
1.0
(8 lead PDIP)
—
125
(8 lead SOIC)
—
200
(14 lead PDIP)
—
75
(14 lead SOIC)
—
120
TJ
Junction temperature
—
150
TS
Storage temperature
-50
150
TL
Lead temperature (soldering, 10 seconds)
—
300
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Symbol
Min.
Max.
VB
High side floating supply absolute voltage
Definition
VS + 10
VS + 20
VS
High side floating supply offset voltage
Note 1
600
VB
VHO
High side floating output voltage
VS
VCC
Low side and logic fixed supply voltage
10
20
VLO
Low side output voltage
0
VCC
VIN
Logic input voltage
COM
VCC
DT
Programmable dead-time pin voltage (IR21084 only)
VSS
IR2108
IR21084
TA
VSS
VCC
VSS
VCC
Logic ground (IR21084 only)
-5
5
Ambient temperature
-40
125
Units
V
°C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2
www.irf.com
IR2108(4) (S)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified.
Symbol
Definition
Min.
Typ.
Max. Units Test Conditions
ton
toff
Turn-on propagation delay
—
220
300
Turn-off propagation delay
—
200
280
MT
Delay matching | ton - toff
|
—
0
30
tr
Turn-on rise time
—
150
220
tf
Turn-off fall time
—
50
80
Deadtime: LO turn-off to HO turn-on(DTLO-HO) &
HO turn-off to LO turn-on (DTHO-LO)
400
4
540
5
680
6
Deadtime matching = | DTLO-HO - DTHO-LO |
—
0
60
—
0
600
DT
MDT
VS = 0V
VS = 0V or 600V
nsec
VS = 0V
VS = 0V
usec
nsec
RDT= 0
RDT = 200k (IR21084)
RDT=0
RDT = 200k (IR21084)
Static Electrical Characteristics
VBIAS (VCC, VBS ) = 15V, VSS = COM, DT= V SS and TA = 25°C unless otherwise specified. The VIL, VIH and IIN
parameters are referenced to VSS/COM and are applicable to the respective input leads: HIN and LIN. The VO, IO and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
VIH
Logic “1” input voltage for HIN & logic “0” for LIN
2.9
—
—
VCC = 10V to 20V
VIL
Logic “0” input voltage for HIN & logic “1” for LIN
—
—
0.8
VCC = 10V to 20V
VOH
High level output voltage, VBIAS - VO
—
0.8
1.4
VOL
Low level output voltage, VO
—
0.3
0.6
ILK
Offset supply leakage current
—
—
50
IQBS
Quiescent VBS supply current
20
60
150
IQCC
Quiescent VCC supply current
0.4
1.0
1.6
IIN+
Logic “1” input bias current
—
5
20
IIN-
Logic “0” input bias current
—
1
2
VCCUV+
VCC and VBS supply undervoltage positive going
8.0
8.9
9.8
VBSUV+
threshold
VCCUV-
VCC and VBS supply undervoltage negative going
7.4
8.2
9.0
VBSUV-
threshold
VCCUVH
Hysteresis
0.3
0.7
—
IO+
Output high short circuit pulsed current
120
200
—
IO-
Output low short circuit pulsed current
250
350
—
V
IO = 20 mA
IO = 20 mA
VB = VS = 600V
µA
mA
VIN = 0V or 5V
VIN = 0V or 5V
RDT=0
HIN = 5V, LIN = 0V
µA
HIN = 0V, LIN = 5V
V
VBSUVH
www.irf.com
mA
VO = 0V,
PW ≤ 10 µs
VO = 15V,
PW ≤ 10 µs
3
IR2108(4) (S)
Functional Block Diagram
VB
UV
DETECT
2108
HO
R
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFT
HIN
DT
R
PULSE
FILTER
Q
S
VS
PULSE
GENERATOR
VCC
DEADTIME &
SHOOT-THROUGH
PREVENTION
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
LIN
LO
DELAY
COM
VSS
VB
21084
UV
DETECT
HO
R
VSS/COM
LEVEL
SHIFT
HIN
HV
LEVEL
SHIFTER
Q
S
VS
PULSE
GENERATOR
VCC
DEADTIME &
SHOOT-THROUGH
PREVENTION
DT
UV
DETECT
+5V
LIN
R
PULSE
FILTER
VSS/COM
LEVEL
SHIFT
DELAY
LO
COM
VSS
4
www.irf.com
IR2108(4) (S)
Lead Definitions
Symbol Description
HIN
Logic input for high side gate driver output (HO), in phase (referenced to COM for IR2108 and
VSS for IR21084)
LIN
Logic input for low side gate driver output (LO), out of phase (referenced to COM for IR2108
DT
Programmable dead-time lead, referenced to VSS. (IR21084 only)
VSS
Logic Ground (21084 only)
VB
High side floating supply
HO
High side gate driver output
VS
High side floating supply return
and VSS for IR21084)
VCC
Low side and logic fixed supply
LO
Low side gate driver output
COM
Low side return
Lead Assignments
VCC
VB
8
1
VCC
VB
8
HIN
HO
7
2
HIN
HO
7
3
LIN
VS
6
LIN
VS
6
4
COM
LO
5
COM
LO
5
1
2
www.irf.com
3
4
8 Lead PDIP
8 Lead SOIC
IR2108
IR2108S
1
VCC
2
HIN
VB
14
14
1
VCC
13
2
HIN
VB
13
12
11
3
LIN
HO
12
3
LIN
HO
4
DT
VS
11
4
DT
VS
5
VSS
10
5
VSS
10
6
COM
9
6
COM
9
7
LO
8
7
LO
8
14 Lead PDIP
14 Lead SOIC
IR21084
IR21084S
5
IR2108(4) (S)
HIN
LIN
LIN
HO
50%
50%
tr
toff
LO
ton
Figure 1. Input/Output Timing Diagram
90%
tf
90%
10%
LO
10%
50%
50%
HIN
ton
toff
tr
90%
HO
HIN
LIN
50%
10%
tf
90%
10%
50%
Figure 2. Switching Time Waveform Definitions
90%
HO
LO
DTLO-HO
10%
DT HO-LO
90%
10%
MDT=
DTLO-HO
- DT
HO-LO
Figure 3. Deadtime Waveform Definitions
6
www.irf.com
IR2108(4) (S)
Case outlines
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
D
DIM
B
5
A
FOOTPRINT
6
8
7
6
5
H
E
1
6X
2
3
0.25 [.010]
4
e
A
6.46 [.255]
3X 1.27 [.050]
e1
0.25 [.010]
A1
.0688
1.35
1.75
A1 .0040
.0098
0.10
0.25
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
.1574
3.80
4.00
E
.1497
e
.050 BASIC
e1
MAX
1.27 BASIC
.025 BASIC
0.635 BASIC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
y
0.10 [.004]
8X L
8X c
7
C A B
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
8-Lead SOIC
www.irf.com
MIN
.0532
K x 45°
A
C
8X b
8X 1.78 [.070]
MILLIMETERS
MAX
A
8X 0.72 [.028]
INCHES
MIN
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
7
IR2108(4) (S)
14-Lead PDIP
14-Lead SOIC (narrow body)
01-6010
01-3002 03 (MS-001AC)
01-6019
01-3063 00 (MS-012AB)
IR WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 5/13/2002
8
www.irf.com