RT9209/A Preliminary Synchronous Buck PWM DC-DC with Enable & PGOOD General Description The RT9209/A is a single power supply PWM DC-DC converter controller designed to drive N-Channel MOSFET in a synchronous buck topology. The IC integrates the control, output adjustment, monitoring and protection functions into a small 8-pin package. The RT9209/A uses an internal compensated voltage mode PWM control for simple application design. An internal 0.8V reference allows the output voltage to be precisely regulated to low voltage requirement. A fixed 260kHz/400kHz oscillator reduce the component size for saving board area. The RT9209/A future a enable control pin to shutdown PWM switching and a 90% power good flag indicator. The FB pin under voltage detection function monitor the output short circuit which trigger a three time hiccup sequence to latch off the chip function. Ordering Information RT9209/A Package Type S : SOP-8 Operating Temperature Range C: Commercial Standard 400kHz 260kHz DS9209/A-00 March 2003 Features Operates at 5V 0.8V Internal Reference Drives Two N-Channel MOSFET Voltage Mode PWM Control Fast Transient Response Fixed 260kHz/400kHz Oscillator Frequency Dynamic 0~100% Duty Cycle Internal PWM Loop Compensation Internal Soft-Start Adaptive Non-overlapping Gate Driver Over-voltage Protection Uses Lower MOSFET Applications Motherboard Power Regulation for Computers Subsystems Power Supplies Cable Modems, Set Top Box, and DSL Modems DSP and Core Communications processor Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies 5V-Input DC-DC Regulators Low Voltage Distributed Power Supplies Pin Configurations Part Number Pin Configurations RT9209/ACS (Plastic SOP-8) TOP VIEW FB 1 8 SS VCC 2 7 PGOOD LGATE 3 6 BOOT GND 4 5 UGATE www.richtek.com 1 RT9209/A Preliminary Typical Application Circuit 5V R1 R2 120 250 1 2 C3 1uF 3 4 FB SS VCC PGOOD LGATE BOOT GND UGATE RT9209/A R3 10K PGOOD 8 D1 C2 0.1uF 7 C1 470uF MU CBOOT 6 L1 VOUT 5uH 0.1uF 5 C4 1000uF ML Figure A. RT9209/A Booted from 5V 5V R1 R2 120 250 R4 10K PGOOD 1 2 C3 1uF 3 4 FB SS VCC PGOOD LGATE BOOT GND UGATE RT9209/A 12V C1 470uF 8 7 C2 0.1uF MU L1 6 5 VOUT 5uH ML C4 1000uF R3 10 C5 1uF Figure B. RT9209/A Booted from 12V www.richtek.com 2 DS9209/A-00 March 2003 RT9209/A Preliminary MU + CVCC 1µF D COUT 1000µF L 5µH G S CIN1 1µF GND CBOOT D 0.1µF RT9209/A CIN2 470µF ML BOOT VCC + G S GND Return Layout Placement Layout Notes 1. Put C1 & C2 to be near the MU drain and ML source nodes. 2. Put RT9209/A to be near the COUT 3. Put CBOOT as close as to BOOT pin 4. Put CVCC as close as to VCC pin Function Block Diagram 6.5V VCC BOOT Regulator PGOOD Power on Reset _ SS + PGOOD Sof t Start UGATE 0.72V 0.8V 1V _ Ref erence + OVP _ + 0.5V UVP Error Amp SS + + _ FB Control Logic + 0.8V PWM VCC _ LGATE PWM Loop Compensation GND DS9209/A-00 March 2003 260k/400kHz Oscillator www.richtek.com 3 RT9209/A Preliminary Absolute Maximum Ratings Supply Voltage VCC BOOT & UGATE to GND Input, Output or I/O Voltage Power Dissipation, PD @ TA = 25°C SOP-8 Package Thermal Resistance SOP-8, θJA Lead Temperature (Soldering, 10 sec.) Ambient Temperature Range Junction Temperature Range Storage Temperature Range 7V 19V GND-0.3V to 7V 0.625W 160°C/W 260°C 0°C to +70°C 0°C to +125°C −65°C to +150°C CAUTION: Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Characteristics (VCC = 5V, TA = 25°C, Unless otherwise specified.) Parameter Symbol Test Conditions Min Typ Max Units -- 3 -- mA Rising VCC Threshold -- 4.1 -- V VCC Threshold Hysteresis -- 0.5 -- V -- 0.8 -- V RT9209 -- 260 -- RT9209A -- 400 -- -- 1.75 -- VP-P -- 35 -- dB VCC Supply Current Nominal Supply Current ICC UGATE, LGATE open Power-On Reset Reference Reference Voltage Oscillator Free Running Frequency Ramp Amplitude ∆ VOSC kHz Error Amplifier DC gain PWM Controller Gate Driver Upper Drive Source RUGATE BOOT= 12V BOOT-VUGATE = 1V -- 7 -- Ω Upper Drive Sink RUGATE VUGATE = 1V -- 7 -- Ω Lower Drive Source RLGATE VCC - VLGATE = 1V, -- 7 -- Ω Lower Drive Sink RLGATE VLGATE = 1V -- 3 -- Ω To be continued www.richtek.com 4 DS9209/A-00 March 2003 RT9209/A Preliminary Parameter Symbol Test Conditions Min Typ Max Units Protection FB Over-Voltage Trip FB Rising -- 1 -- V FB Under-Voltage Trip FB Falling -- 0.6 -- V Power Good Threshold FB pin Rising -- 90 -- % -- 2 -- % 0.4 V -- µA Power Good Hysteresis Power Good Sink Capability IPGOOD=1mA SS Source Current --- 20 Functional Pin Description FB (Pin1) BOOT (Pin 6) This pin is connected to the PWM converter’s output divider. This pin also connects to internal PWM error amplifier inverting input and protection monitor. This pin provides ground referenced bias voltage to the upper MOSFET driver. A bootstrap circuit is used to create a voltage suitable to drive a logic-level NChannel MOSFET when operating at a single 5V power supply. This pin also could be powered from ATX 12V, in this situation, a internal 6.5V regulator will supply to VCC pin for internal voltage bias. VCC (Pin 2) This is the main bias supply for the RT9209/A. This pin also provides the gate bias charge for the lower MOSFETs gate. The voltage at this pin monitored for power-on reset (POR) purpose. This pin is also the internal 6.5V regulator output powered from BOOT pin when BOOT pin is directly powered from ATX 12V. LGATE (Pin 3) Connect LGATE to the PWM converter’s lower MOSFET gate. This pin provides the gate drive for the lower MOSFET. GND (Pin 4) Signal and power ground for the IC. All voltage levels are measured with respect to this pin. PGOOD (Pin 7) PGOOD is an open collector output used to indicate the status of the PWM converter output voltage. This pin is pulled low when the FB is not over 90% of the reference voltage. SS (Pin 8) Connect a capacitor from this pin to ground. This capacitor, along with an internal 22µA current source, sets the soft-start internal of the synchronous PWM converter. UGATE (Pin 5) Connect UGATE pin to the PWM converter’s upper MOSFET gate. This pin provides the gate drive for the upper MOSFET. DS9209/A-00 March 2003 www.richtek.com 5 RT9209/A Preliminary Typical Operating Characteristics Dead Time Dead Time Booted from 5V Booted from 5V UGATE UGATE LGATE LGATE IOUT = 0A IOUT = 0A Time (50ns/Div) Time (50ns/Div) Dead Time Dead Time Booted from 12V Booted from 12V UGATE UGATE LGATE LGATE IOUT = 0A IOUT = 0A Time (50ns/Div) Time (50ns/Div) Load Transient Load Transient UGATE UGATE VOUT IOUT VCC = 5V VOUT = 2.5V COUT = 1000µF IOUT = 10A to 0A Time (10us/Div) www.richtek.com 6 VCC = 5V VOUT = 2.5V COUT = 1000µF IOUT = 0A to 10A VOUT IOUT Time (10us/Div) DS9209/A-00 March 2003 RT9209/A Preliminary Power On Power Off Booted from 5V IOUT = 10A Booted from 5V IOUT = 10A CSS = 0.1µF VCC VCC VOUT VOUT Time (2.5ms/Div) Time (10ms/Div) Power On Power Off IOUT = 10A Booted from 12V IOUT = 10A Booted from 12V VCC VCC VOUT VOUT Time (2.5ms/Div) Time (50ms/Div) Boostrap Waveform Boostrap Waveform Booted from 12V Booted from 5V UGATE UGATE LGATE LGATE PHASE PHASE Time (1µs/Div) DS9209/A-00 March 2003 Time (1µs/Div) www.richtek.com 7 RT9209/A Preliminary Short Hiccup Short Hiccup Booted from 12V Booted from 5V UGATE UGATE VOUT VOUT Time (500ms/Div) Time (25ms/Div) VCC vs. VSS PGOOD vs. VOUT IOUT = 10A CSS = 0.1µF VCC PGOOD VOUT VSS Time (5ms/Div) Time (25ms/Div) Reference vs. Temperature 0.808 Oscillator Frequency vs. Temperature 410 0.806 400 Frequency (kHz) Reference (V) 0.804 0.802 0.8 0.798 0.796 0.794 0.792 380 370 360 0.79 RT9209A 0.788 350 -35 -15 5 25 45 65 Temperature (°C) www.richtek.com 8 390 85 105 125 -35 -15 5 25 45 65 85 105 125 Temperature (°C) DS9209/A-00 March 2003 Preliminary RT9209/A POR (Rising/Falling) vs. Temperature 4.2 4.1 Rising POR (V) 4 3.9 3.8 3.7 Falling 3.6 3.5 -35 -15 5 25 45 65 85 105 125 Temperature (°C) DS9209/A-00 March 2003 www.richtek.com 9 RT9209/A Preliminary Application Information The RT9209/A operates at either single 5V power supply with a bootstrap UGATE driver or a 5V/12V dual-power supply form the ATX SMPS. The dualpower supply is recommended for high current applications, the RT9209/A can deliver higher gate driving current while operating with ATX SMPS based on a dual-power supply. 5V VCC 1uF D1 1uF C1 UGATE 0.1uF + 5V + - PHASE VCC LGATE 5V + VCC In a single power supply system, the UGATE driver of RT9209/A is powered by an external bootstrap circuit, as shown in the Fig.1. The boot capacitor, CBOOT, generates a floating reference. Typically a 0.1µF CBOOT is enough for most of MOSFETs used with the RT9209/A. The voltage drop between BOOT and PHASE is refreshed to a voltage of VCC – diode drop (VD) while the lower MOSFET turning on. BOOT 12V 10 UGATE C2 VCC C1 R1 1uF The Bootstrap Operation C2 BOOT 6.5V Regulator LGATE RT9209/A Fig. 2 Dual Power Supply Operation Power On Reset The Power-On Reset (POR) monitors the supply voltage (normal +5V) at the VCC pin. The VCC POR level is set to 4.1V with 0.5V hysteresis. The POR function initiates soft-start operation after all supply voltages exceed their POR thresholds. Soft Start A built-in soft-start is used to prevent surge current from power supply input during power on. The softstart voltage is controlled by an internal 22µA to change a capacitor slowly. It clamps the ramping of reference voltage at the input of error amplifier and the pulse-width of the output driver slowly. Under Voltage and Over Voltage Protection RT9209/A Fig. 1 Single 5V power Supply Operation Dual Power Operation The RT9209/A was designed to supply a regulated 6.5V at VCC pin automatically when BOOT pin is powered by a 12V. In a system with ATX 5V/12V power supply, the RT9209/A is ideal for higher current applications due to the higher gate driving capability, VUGATE = 12V and VLGATE = 6.5V. A RC (10Ω/1µF) filter is also recommended at BOOT pin to prevent the ringing induced from fast power-on, as shown in Fig. 2. www.richtek.com 10 The voltage at FB pin is monitored and protected against OC (over current), and OV (over voltage). The UV threshold is 0.5V and OV-threshold is 1.0V. Both UV/OV detection have 30µS triggered delay. When OC or UV trigged, a hiccup re-start sequence will be initialized, as shown in Fig. 3. Only 3 times of trigger are allowed to latch off. Hiccup is disabled during softstart interval. DS9209/A-00 March 2003 RT9209/A Preliminary Internal SS COUNT = 1 COUNT = 2 COUNT = 3 INDUCTOR CURRENT L Q VL 4V D VI 2V 0V OVERLOAD APPLIED C R VO C.C.M. TS 0A T0 T1 T3 T2 TON TIME Fig. 3 Shutdown Pulling low the SS pin by a small single transistor can shutdown the RT9209/A PWM controller as shown in typical application circuit. VI - VO VL - VO iL µQ IL = IO µIL Inductor Selection The RT9209/A was designed for VIN = 5V, step-down application mainly. Fig. 4 shows the typical topology and waveforms of step-down converter. TOFF iQ IQ The ripple currents of inductor can be calculated as follows: ILRIPPLE = (5V - VOUT)/L × TON Because operation frequency is fixed at 260kHz/400kHz, TON = 3.85 × VOUT / 5V, or 2.5 × VOUT / 5V The VOUT ripple is VOUT RIPPLE = ILRIPPLE × ESR iD ID Fig. 4 ESR is output capacitor equivalent series resistor DS9209/A-00 March 2003 www.richtek.com 11 RT9209/A Preliminary Input / Output Capacitor Reference Voltage High frequency/long life decoupling capacitors should be placed as close to the power pins of the load as physically possible. Be careful not to add inductance to the PCB trace, as it could eliminate the performance from utilizing these low inductance components. Consult with the manufacturer of the load on specific decoupling requirements. Because RT9209/A use a low 35dB gain error amplifier, shown in Fig. 6. The voltage regulation is dependent on VIN & VOUT setting. The FB reference voltage of 0.8V were trimmed at VIN = 5V & VOUT = 2.5V condition. In a fixed VIN = 5V application, the FB reference voltage vs. VOUT voltage can be calculated as Fig. 7. I3 56K + EA PWM + I2 _ 1K _ FB + The output capacitors are necessary for filtering output and stabilizing the close loop (see the PWM loop stability). For powering advanced, high-speed processors, it is required to meet with the requirement of fast load transient, high frequency capacitors with low ESR/ESL capacitors are recommended. _ REP 0.8V RAMP 1.75V Fig. 6 Another concern is high ESR induced ripple may trigger UV or OV protections 0.82 VIN = 5V 0.81 The RT9209/A is a voltage mode buck controller designed for 5V step-down applications. The gain of error amplifier is fixed at 35dB for simplified design. The output amplitude of ramp oscillator is 1.6V, the loop gain and loop pole/zero are calculated as follows: DC loop gain GA = 35dB × 1 2 LC filter pole PO = × π × FB (V) PWM Loop Stability 0.80 0.79 0.78 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VOUT (V) 0.8 5 × VOUT 1.6 Fig. 7 LC Error Amp pole PA = 300kHz Feedback Divider 1 ESR zero ZO = × π × ESR × C 2 The reference of RT9209/A is 0.8V. The output voltage can be set using a resistor based divider as shown in Fig. 8. Put the R1 and R2 as close as possible to FB pin and R2 should less than 1 kΩ to avoid noise coupling. The RT9209/A Bode plot as shown Fig. 5 is stable in most of application conditions. VOUT = 3.3V COUT = 1500µF(33mΩ) L=2µH 40 30 VOUT = 1.5V VIN L PO = 2.9kHz VOUT = 2.5V V OUT ZO = 3.2kHz + VOUT = 3.3V C OUT R1 20 RT9209/A FB Loop Gain 10 100 1k R2 < 1K 10k 100k 1M Fig. 8 Fig. 5 www.richtek.com 12 DS9209/A-00 March 2003 RT9209/A Preliminary PWM Layout Considerations MOSFETs switch very fast and efficiently. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency and radiate noise, that results in ocer-voltage stress on devices. Careful component placement layout and printed circuit design can minimize the voltage spikes induced in the converter. Consider, as an example, the turn-off transition of the upper MOSFET prior to turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops flowing in the upper MOSFET and is picked up by the low side MOSFET or Schottky diode. Any inductance in the switched current path generates a large voltage spike during the switching interval. Careful component selections, layout of the critical components, and use shorter and wider PCB traces help in minimizing the magnitude of voltage spikes. There are two sets of critical components in a DC-DC converter using the RT9209/A. The switching power components are most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bypass current. power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node, but it is not necessary to oversize this particular island. Since the PHASE node is subjected to very high dV/dt voltages, the stray capacitance formed between these island and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal routing. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to carry 2A peak currents. IL IQ1 VOUT 5V + Q1 IQ2 + + LOAD Q2 GND LGATE VCC UGATE GND RT9209/A FB Fig. 9 The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Place the output inductor and output capacitors between the MOSFETs and the load. Also locate the PWM controller near by MOSFETs. A multi-layer printed circuit board is recommended. Fig. 9 shows the connections of the critical components in the converter. Note that the capacitors CIN and COUT each of them represents numerous physical capacitors. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support the input DS9209/A-00 March 2003 www.richtek.com 13 RT9209/A Preliminary Package Information H A M J B F C I D Symbol Dimensions In Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.254 0.007 0.010 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 8-Lead SOP Plastic Package www.richtek.com 14 DS9209/A-00 March 2003 Preliminary DS9209/A-00 March 2003 RT9209/A www.richtek.com 15 RT9209/A Preliminary RICHTEK TECHNOLOGY CORP. RICHTEK TECHNOLOGY CORP. Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] www.richtek.com 16 DS9209/A-00 March 2003